DETAILED ACTION
This Action is responsive to the Information Disclosure Statement (IDS) filed on 06/15/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Allowable Subject Matter
Applicant is advised that the Notice of Allowance mailed 05/01/2026 is vacated. If the issue fee has already been paid, applicant may request a refund or request that the fee be credited to a deposit account. However, applicant may wait until the application is either found allowable or held abandoned. If allowed, upon receipt of a new Notice of Allowance, applicant may request that the previously submitted issue fee be applied. If abandoned, applicant may request refund or credit to a specified Deposit Account.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Initially, and with respect to Claims 1-8 and 11-13, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe, 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which makes it clear that it is the final product per se which must be determined in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claims or not. As stated in Thorpe,
[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA); In re Pilkington, 411 F.2d 1345, 1348, 162 USPQ 145, 147 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26 USPQ 57, 61 (2d. Cir. 1935).
Note that the applicants have the burden of proof in such cases, as the above case law makes clear.
Claims 1-3 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 2020/0161518), in view of Huang (US 2020/0066698), in view of Mercier (US 2017/0133356).
Regarding claim 1, Lin (see, e.g., FIG. 2) discloses a package structure, comprising:
a first packaging member 140 having a first surface e.g., top surface of 140 and a second surface e.g., bottom surface of 140 oppositely arranged (Para 0031);
a chip 130a covered by the first packaging member 140 (Para 0043);
a plurality of conductors 146 provided on and protruding from the chip 130a and electrically connected to electrical contacts e.g., electrical pads of chip 130a (inherent feature of chips that allow the chip to connect to power, other chips, or wires; not shown) of the chip 130a, the plurality of conductors 146 being covered by the first packaging member 140, and ends e.g., top ends of 146 of the plurality of conductors 146 facing away from the chip 130a being flush with the first surface e.g., top surface of 140;
a wire pattern layer 150 disposed on the first surface e.g., top surface of 140 and electrically connected to the plurality of conductors 146 (Para 0033);
at least one light emitting element 170 located on the first surface e.g., top surface of 140 and electrically connected to the chip 130a via the wire pattern layer 150 (Para 0034); and
a second packaging member 180 covering the at least one light emitting element 170 and affixed to the first surface e.g., top surface of 140 and the wire pattern layer 150, a light beam emitted by the at least one light emitting element 170 being able to travel outward through the second packaging member 180 (Para 0037),
Examiner Note: The following limitation is a product-by process limitation: “a plurality of conductors provided on and protruding from the control chip by a wafer bumping process, wherein the plurality of conductors are metal bumps.” "[E]ven though product–by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). In this case, whether or not the plurality of conductors is provided by a wafer bumping process does not change the product, i.e., a plurality of conductors (metal bumps).
Although Lin shows substantial features of the claimed invention, Lin fails to expressly teach a control chip, the plurality of conductors are metal bumps, and the first packaging member is opaque.
Huang (see, e.g., FIG. 3), on the other hand, teaches a control chip 15 for the purpose controlling the brightness or color temperature of the light beam emitted by the light emitting unit (Para 0046).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the functionality of the chip of Lin to have the functionality of a control chip as described by Huang for the purpose controlling the brightness or color temperature of the light beam emitted by the light emitting unit (Para 0046).
Mercier (see, e.g., FIG. 1) teaches that the plurality of conductors 86 are metal bumps for the purpose of ensuring a mechanical and electrical connection between the control chip and the light emitting diodes (Para 0037, Para 0072).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the plurality of conductors of Lin to be metal bumps as described by Mercier for the purpose of ensuring a mechanical and electrical connection between the control chip and the light emitting diodes (Para 0037).
Lin fails to expressly teach that the first packaging member is opaque. Lin (see, e.g., FIG. 2) does, however, teach that the first packaging member 140 is transparent, e.g., benzocyclobutene (BCB) (Para 0031).
Huang, on the other hand, teaches that the first packaging member 12 can be either an opaque structure or a light transmitting structure (Para 0044).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either an opaque packaging member or a light transmitting packaging member in Lin’s device because these were recognized in the semiconductor art for their use as a packaging colloid, as taught by Huang, and selecting between known equivalents would be within the level of ordinary skill in the art.
Regarding claim 2, the combination of Lin (see, e.g., FIG. 2) / Huang (see, e.g., FIG. 3) teaches the package structure according to claim 1, wherein the second packaging member 180 (as taught by Lin) is made of a light transparent material and the electrical contacts e.g., electrical pads of chip 130a (inherent feature of chips that allow the chip to connect to power, other chips, or wires; not shown) of the control chip 130a (as taught by Lin, modified by Huang) are facing the first surface e.g., top surface of 140 (as taught by Lin) (Lin: Para 0037; Huang: Para 0046).
Regarding claim 3, Lin (see, e.g., FIG. 2) teaches that package structure according to claim 1, wherein a plurality of electrical connectors 144 are provided inside the first packaging member 140, each of the plurality of electrical connectors 144 is a conducting channel or a conducting cylinder, each of the plurality of electrical connectors 144 is perpendicular to the first surface e.g., top surface of 140 and penetrates the first packaging member 140, and one end e.g., top end of 144 of each of the plurality of electrical connectors 144 is connected to the wire pattern layer 150 (Para 0032, Para 0033).
Regarding claim 13, the combination of Lin (see, e.g., FIG. 2) / Huang (see, e.g., FIG. 3) teaches the package structure according to claim 1, wherein the at least one light emitting element 170 (as taught by Lin) comprises a plurality of the light emitting elements 170 (as taught by Lin), and a projection of the light emitting elements 170 (as taught by Lin) on the first surface e.g., top surface of 140 (as taught by Lin) overlaps at least partially with a projection of the control chip 130a (as taught by Lin, modified by Huang) on the first surface e.g., top surface of 140 (as taught by Lin) (Lin: Para 0036; Huang: Para 0046).
Claims 7-8 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 2020/0161518), in view of Huang (US 2020/0066698), in view of Mercier (US 2017/0133356), and further in view of Liu (US 2020/0185581).
Regarding claim 7, although Lin/Huang/Mercier show substantial features of the claimed invention, Lin/Huang/Mercier fail to expressly teach the package structure according to claim 1, wherein the package structure further comprises a third packaging member, and the third packaging member is connected to the first packaging member and surrounds a peripheral side of the second packaging member connecting to the first surface; both the third packaging member and the first packaging member are made of opaque material; a side of the third packaging member facing away from the first surface is flush with a side of the second packaging member facing away from the first surface, and an outer side of the third packaging member perpendicular to the first surface is flush with an outer side of the first packaging member perpendicular to the first surface.
Liu (see, e.g., FIG. 1I), on the other hand, teaches package structure according to claim 1, wherein the package structure further comprises a third packaging member 50, and the third packaging member 50 is connected to the first packaging member 12 and surrounds a peripheral side of the second packaging member 40, 42, 44 connecting to the first surface e.g., top surface of 12 (Para 0029, Para 0040, Para 0043); a side e.g., top side of 50 of the third packaging member 50 facing away from the first surface e.g., top surface of 12 is flush with a side e.g., top side of 44 of the second packaging member 40, 42, 44 facing away from the first surface e.g., top surface of 12, and an outer side e.g., the right outer surface of 50 (right opaque isolation feature) of the third packaging member 50 perpendicular to the first surface e.g., top surface of 12 is flush with an outer side e.g., right side of 12 of the first packaging member 12 perpendicular to the first surface e.g., top surface of 12 for the purpose of inhibiting optical crosstalk or interference between optical devices (Para 0029, Para 0040, Para 0043).
The combination of Lin (see, e.g., FIG. 2) / Liu (see, e.g., FIG. 1I) teaches that both the third packaging member 50 (as taught by Liu) and the first packaging member 140 (as taught by Lin, material modified by Huang) are made of opaque material (Lin: Para 0031, Huang: Para 0044; Liu: Para 0040)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the package structure of Lin/Huang/Mercier to include a third packaging member as described by Liu for the purpose of inhibiting optical crosstalk or interference between optical devices (Para 0040).
Regarding claim 8, Lin (see, e.g., FIG. 2) teaches the package structure according to claim 7, wherein the at least one light emitting element 170 comprises a plurality of the light emitting elements 170 and the light emitting elements 170 are located in the middle of the first surface e.g., top surface of 140 (Para 0036).
Regarding claim 11, although Lin/Huang/Mercier show substantial features of the claimed invention, Lin/Huang/Mercier fail to expressly teach the package structure according to claim 2, wherein the package structure further comprises a third packaging member, and the third packaging member is connected to the first packaging member and surrounds a peripheral side of the second packaging member connecting to the first surface; both the third packaging member and the first packaging member are made of opaque material; a side of the third packaging member facing away from the first surface is flush with a side of the second packaging member facing away from the first surface, and an outer side of the third packaging member perpendicular to the first surface is flush with an outer side of the first packaging member perpendicular to the first surface.
Liu (see, e.g., FIG. 1I), on the other hand, teaches package structure according to claim 1, wherein the package structure further comprises a third packaging member 50, and the third packaging member 50 is connected to the first packaging member 12 and surrounds a peripheral side of the second packaging member 40,42,44 connecting to the first surface e.g., top surface of 12 (Para 0029, Para 0040, Para 0043); a side e.g., top side of 50 of the third packaging member 50 facing away from the first surface e.g., top surface of 12 is flush with a side e.g., top side of 44 of the second packaging member 40, 42, 44 facing away from the first surface e.g., top surface of 12, and an outer side e.g., the right outer surface of 50 (right opaque isolation feature) of the third packaging member 50 perpendicular to the first surface e.g., top surface of 12 is flush with an outer side e.g., right side of 12 of the first packaging member 12 perpendicular to the first surface e.g., top surface of 12 for the purpose of inhibiting optical crosstalk or interference between optical devices (Para 0029, Para 0040, Para 0043).
The combination of Lin (see, e.g., FIG. 2) / Liu (see, e.g., FIG. 1I) teaches that both the third packaging member 50 (as taught by Liu) and the first packaging member 140 (as taught by Lin, material modified by Huang) are made of opaque material (Lin: Para 0031, Huang: Para 0044; Liu: Para 0040)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the package structure of Lin/Huang/Mercier to include a third packaging member as described by Liu for the purpose of inhibiting optical crosstalk or interference between optical devices (Para 0040).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Huang (US 2020/0066698), in view of Chen (TW I239038 B).
Regarding claim 9, Huang (see, e.g., FIG. 5, FIG. 6) discloses a packaging method for preparing a package structure, comprising:
preparing a plurality of conductors 142 on a control chip 15, the plurality of conductors 142 being electrically connected to electrical contacts e.g., electrical pads of chip 15 (inherent feature of control chips that allow the chip to connect to power, other chips, or wires; not shown) of the control chip 15 (Para 0047, Para 0048);
covering the control chip 15 and the plurality of conductors 142 with a first packaging member 12, the control chip 15 not being exposed from the first packaging member 12 (Para 0044);
preparing a wire pattern layer 13 on a first surface e.g., top surface of 12 of the first packaging member 12, the wire pattern layer 13 being electrically connected to the plurality of conductors 142, wherein the plurality of conductors 142 are metal bumps, and the first packaging member 12 is opaque (Para 0040, Para 0044, Para 0048);
mounting at least one light emitting element 14 on one side e.g., top side of 13 of the wire pattern layer 13 away from the first packaging member 12 (Para 0041, Para 0042); and
covering the at least one light emitting element 14 with a second packaging member 11, the second packaging member 11 being affixed to the first surface e.g., top surface of 13 and the wire pattern layer 13 (Para 0041)
Although Huang shows substantial features of the claimed invention, Huang fails to expressly teach preparing a plurality of conductors on a control chip by a wafer bumping process.
Chen (see, e.g., FIG. 3), on the other hand, teaches preparing a plurality of conductors 12, 13 on a chip 10 by a wafer bumping process for the purpose of ensuring the bumps are of uniform height thereby allowing the subsequent chip bumping bonding process to proceed smoothly and reducing the occurrence of bonding failures (pg 2, para 1; pg 3, para 1; pg 4, para 3; pg 5, para 1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method step of preparing the plurality of conductors on a control chip in Huang to preparing a plurality of conductors on a chip by a wafer bumping process as described by Chen for the purpose of ensuring the bumps are of uniform height thereby allowing the subsequent chip bumping bonding process to proceed smoothly and reducing the occurrence of bonding failures (pg 2, para 1; pg 5, para 1).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 2020/0161518), in view of Huang (US 2020/0066698), and in view of Liu (US 2020/0185581).
Regarding claim 15, Lin (see, e.g., FIG. 2) discloses a package structure, comprising:
a first packaging member 140 having a first surface e.g., top surface of 140 and a second surface e.g., bottom surface of 140 oppositely arranged (Para 0031);
a chip 130a covered by the first packaging member 140 (Para 0043);
a plurality of conductors 146 provided on and protruding from the chip 130a and electrically connected to electrical contacts e.g., electrical pads of chip 130a (inherent feature of chips that allow the chip to connect to power, other chips, or wires; not shown) of the chip 130a, the plurality of conductors 146 being covered by the first packaging member 140, and ends e.g., top ends of 146 of the plurality of conductors 146 facing away from the chip 130a being flush with the first surface e.g., top surface of 140,
a wire pattern layer 150 disposed on the first surface e.g., top surface of 140 and electrically connected to the plurality of conductors 146 (Para 0033);
at least one light emitting element 170 located on the first surface e.g., top surface of 140 and electrically connected to the chip 130a via the wire pattern layer 150 (Para 0034); and
a second packaging member 180 covering the at least one light emitting element 170 and affixed to the first surface e.g., top surface of 140 and the wire pattern layer 150, a light beam emitted by the at least one light emitting element 170 being able to travel outward through the second packaging member 180 (Para 0037),
wherein the at least one light emitting element 170 comprises a plurality of the light emitting elements 170 and the light emitting elements 170 are located in the middle of the first surface e.g., top surface of 140 (Para 0036),
Although Lin shows substantial features of the claimed invention, Lin fails to expressly teach a control chip, and wherein the package structure further comprises a third packaging member, and the third packaging member is connected to the first packaging member and surrounds a peripheral side of the second packaging member connecting to the first surface; both the third packaging member and the first packaging member are made of opaque material; a side of the third packaging member facing away from the first surface is flush with a side of the second packaging member facing away from the first surface, and an outer side of the third packaging member perpendicular to the first surface is flush with an outer side of the first packaging member perpendicular to the first surface.
Huang (see, e.g., FIG. 3), on the other hand, teaches a control chip 15 for the purpose controlling the brightness or color temperature of the light beam emitted by the light emitting unit (Para 0046).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the functionality of the chip of Lin to have the functionality of a control chip as described by Huang for the purpose controlling the brightness or color temperature of the light beam emitted by the light emitting unit (Para 0046).
Lin fails to expressly teach that the first packaging member is opaque. Lin (see, e.g., FIG. 2) does, however, teach that the first packaging member 140 is transparent, e.g., benzocyclobutene (BCB) (Para 0031).
Huang, on the other hand, teaches that the first packaging member can be either an opaque structure or a light transmitting structure (Para 0044).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either an opaque packaging member or a light transmitting packaging member in Lin’s device because these were recognized in the semiconductor art for their use as a packaging colloid, as taught by Huang, and selecting between known equivalents would be within the level of ordinary skill in the art.
Liu (see, e.g., FIG. 1I), on the other hand, teaches package structure according to claim 1, wherein the package structure further comprises a third packaging member 50, and the third packaging member 50 is connected to the first packaging member 12 and surrounds a peripheral side of the second packaging member 40, 42, 44 connecting to the first surface e.g., top surface of 12 (Para 0029, Para 0040, Para 0043); a side e.g., top side of 50 of the third packaging member 50 facing away from the first surface e.g., top surface of 12 is flush with a side e.g., top side of 44 of the second packaging member 40, 42, 44 facing away from the first surface e.g., top surface of 12, and an outer side e.g., the right outer surface of 50 (right opaque isolation feature) of the third packaging member 50 perpendicular to the first surface e.g., top surface of 12 is flush with an outer side e.g., right side of 12 of the first packaging member 12 perpendicular to the first surface e.g., top surface of 12 for the purpose of inhibiting optical crosstalk or interference between optical devices (Para 0029, Para 0040, Para 0043).
The combination of Lin (see, e.g., FIG. 2) / Liu (see, e.g., FIG. 1I) teaches that both the third packaging member 50 (as taught by Liu) and the first packaging member 140 (as taught by Lin, material modified by Huang) are made of opaque material (Lin: Para 0031, Huang: Para 0044; Liu: Para 0040)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the package structure of Lin/Huang to include a third packaging member as described by Liu for the purpose of inhibiting optical crosstalk or interference between optical devices (Para 0040).
Allowable Subject Matter
Claim 14 is allowed.
The following is a statement of reasons for the indication of allowable subject matter: Regarding independent claim 14, the applied prior art neither anticipates nor renders obvious the claimed package structure comprising the package structure further comprises a metal member, the metal member provided on one side of the control chip away from the plurality of conductors and covers at least part of a surface of the control chip, and the metal member is covered by the first packaging member, and a side of the metal member facing away from the control chip is flush with the second surface, and the package structure further comprises a grounded zone provided on the second surface, the grounded zone is electrically connected to the metal member, and the grounded zone is electrically connected to one of the plurality of conductors through one of the plurality of electrical connectors and the wire pattern layer, in combination with the remaining claimed limitations.
Claims 4-6, 10, and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Remarks
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Regarding independent claim 14, Lin (US 2020/0161518; see, e.g., FIG. 2) discloses a package structure, comprising: a first packaging member 140 having a first surface e.g., top surface of 140 and a second surface e.g., bottom surface of 140 oppositely arranged (Para 0031); a chip 130a covered by the first packaging member 140 (Para 0043); a plurality of conductors 146 provided on and protruding from the chip 130a and electrically connected to electrical contacts e.g., electrical pads of chip 130a (inherent feature of control chips that allow the chip to connect to power, other chips, or wires; not shown) of the chip 130a, the plurality of conductors 146 being covered by the first packaging member 140, and ends e.g., top ends of 146 of the plurality of conductors 146 facing away from the chip 130a being flush with the first surface e.g., top surface of 140; a wire pattern layer 150 disposed on the first surface e.g., top surface of 140 and electrically connected to the plurality of conductors 146 (Para 0033); at least one light emitting element 170 located on the first surface e.g., top surface of 140 and electrically connected to the chip 130a via the wire pattern layer 150 (Para 0034); and a second packaging member 180 covering the at least one light emitting element 170 and affixed to the first surface e.g., top surface of 140 and the wire pattern layer 150, a light beam emitted by the at least one light emitting element 170 being able to travel outward through the second packaging member 180 (Para 0037), wherein a plurality of electrical connectors 144 are provided inside the first packaging member 140, each of the plurality of electrical connectors 144 is a conducting channel or a conducting cylinder, each of the plurality of electrical connectors 144 is perpendicular to the first surface e.g., top surface of 140 and penetrates the first packaging member 140, and one end e.g., top end of 144 of each of the plurality of electrical connectors 144 is connected to the wire pattern layer 150 (Para 0032, Para 0033).
Conclusion
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/ANTONIO B CRITE/Primary Examiner, Art Unit 2817