DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed have been fully considered but they are not persuasive.
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Regarding amended claim 1, Lee discloses a third insulating layer 360 covering the light-emitting element (see 360 covers the sides), wherein the third insulating layer is in direct contact with a top surface of the second insulating layer in a region not overlapped with the light-emitting element.
Regarding amended claim 14, Lee discloses wherein the third insulating layer is in direct contact with a top surface of the second insulating layer in a region (see fig. 7) not overlapped with the first light-emitting element and the second light-emitting element.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 5-6, 10-11 and 15-16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee et al. 20220077269.
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Regarding claim 1, fig. 1 of Lee discloses a display device comprising:
a transistor Tp over a substrate 110;
a first insulating layer 142 over the transistor;
a second insulating layer (composite multi-layer of 162/143/161/180) over the first insulating layer;
a plug (DE2 plug) placed to be embedded in the first insulating layer and the second insulating layer; and
a light-emitting element LED (figs. 1 and 3) over the second insulating layer, the light-emitting element comprising:
a first conductive layer 191,
an EL layer 370 over the first conductive layer; and
a second conductive layer over the EL layer,
a third insulating layer 360 covering the light-emitting element (see 360 covers the sides),
wherein the plug electrically connects one of a source and a drain of the transistor to the first conductive layer 191, and
wherein the second insulating layer has higher capability of inhibiting hydrogen diffusion than the first insulating layer (this is necessary the case as the first insulating layer 142 is a gate insulating layer and the second insulating layer as taken by the examiner to be a composite multi-layer of 162/143/161/180 which is much thicker and therefore has higher capability of inhibiting hydrogen diffusion as claimed), and
wherein the third insulating layer is in direct contact with a top surface of the second insulating layer in a region not overlapped with the light-emitting element.
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Regarding claim 14, fig. 1 of Lee discloses a display device comprising:
a first transistor Tp and a second transistor Tp over a substrate;
a first insulating layer 142 over the first transistor and the second transistor;
a second insulating layer (composite multi-layer of 162/143/161/180) over the first insulating layer;
a first plug DE2 and a second plug DE2 placed to be embedded in the first insulating layer and the second insulating layer;
a first light-emitting element LED and a second light-emitting element LED over the second insulating layer; and
a third insulating layer 360 covering the first light-emitting element and the second light- emitting element (see 360 covers the sides), wherein the first light-emitting element comprises:
a first conductive layer 191,
a first EL layer 370 over the first conductive layer; and
a second conductive layer 270 over the first EL layer,
wherein the second light-emitting element comprises:
a third conductive layer 191,
a second EL layer 370 over the third conductive layer; and
a fourth conductive layer 270 over the second EL layer,
wherein the first plug electrically connects one of a source and a drain of the first transistor to the first conductive layer,
wherein the second plug electrically connects one of a source and a drain of the second transistor to the third conductive layer, and
wherein the third insulating layer is in direct contact with a top surface of the second insulating layer in a region (see fig. 7) not overlapped with the first light-emitting element and the second light-emitting element.
Regarding claims 2 and 17, par [0088] of Lee discloses wherein the second insulating layer contains nitrogen and silicon (a silicon nitride).
Regarding claim 5, fig. 1 of Lee discloses wherein the third insulating layer has higher capability of inhibiting hydrogen diffusion than the first insulating layer (this necessary the case as 390 is a thicker layer than the gate insulating layer 142).
Regarding claim 10, par [0136] of Lee discloses wherein the first conductive layer 191 has a property of reflecting visible light.
Regarding claim 11, par [0113] of Lee discloses wherein the second conductive layer has a property of transmitting and reflecting visible light.
Regarding claim 15, fig. 1 of Lee necessary discloses wherein the second insulating layer has higher capability of inhibiting hydrogen diffusion than the first insulating layer (this is necessary the case as the first insulating layer 142 is a gate insulating layer and the second insulating layer as taken by the examiner to be a composite multi-layer of 162/143/161/180).
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Regarding claim 16, fig. 1 of Lee necessary discloses wherein the third insulating layer has higher capability of inhibiting hydrogen diffusion than the first insulating layer (this is necessary the case as the first insulating layer 142 is a gate insulating layer and the third insulating layer is a thicker layer).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of BOK et al. 20210367020.
Regarding claim 3, Lee discloses wherein the second insulating layer includes a first layer 161 and a second layer 143 over the first layer, wherein the first layer contains nitrogen and silicon (par [0088] – silicon nitride) and wherein the second layer contains nitrogen and silicon (par [0092] – silicon nitride)
Lee does not disclose wherein the second layer contains oxygen and aluminum. However, note that Lee that the second layer 143 is a gate insulating layer.
However, par [0203] of Bok discloses that gate insulating layer 112 may include an inorganic insulating material, such as silicon oxide (SiO.sub.2), silicon nitride (SiN.sub.x), silicon oxynitride (SiON), aluminum oxide (Al.sub.2O.sub.3), titanium oxide (TiO.sub.2), tantalum oxide (Ta.sub.2O.sub.5), hafnium oxide (HfO.sub.2), or zinc oxide (ZnO.sub.2).
Note that silicon nitride (SiN.sub.x) and aluminum oxide (Al.sub.2O.sub.3) interchangeable as gate insulating layer.
As such it would have been obvious to form a device of Lee comprising wherein the second layer contains oxygen and aluminum instead of nitrogen and silicon such as taught by Bok in order to select a material of desired dielectric constant.
Regarding claim 4, Lee discloses wherein the second insulating layer includes a first layer 161 and a second layer 143 over the first layer, wherein the first layer contains nitrogen and silicon (par [0088] – silicon nitride) and wherein the second layer contains nitrogen and silicon (par [0092] – silicon nitride)
Lee does not disclose wherein the second layer contains oxygen and hafnium. However, note that Lee that the second layer 143 is a gate insulating layer.
However, par [0203] of Bok discloses that gate insulating layer 112 may include an inorganic insulating material, such as silicon oxide (SiO.sub.2), silicon nitride (SiN.sub.x), silicon oxynitride (SiON), aluminum oxide (Al.sub.2O.sub.3), titanium oxide (TiO.sub.2), tantalum oxide (Ta.sub.2O.sub.5), hafnium oxide (HfO.sub.2), or zinc oxide (ZnO.sub.2).
Note that silicon nitride (SiN.sub.x) and hafnium oxide (HfO.sub.2) are interchangeable as gate insulating layer.
As such it would have been obvious to form a device of Lee comprising wherein the second layer contains oxygen and hafnium instead of nitrogen and silicon such as taught by Bok in order to select a material of desired dielectric constant.
Claim 7 and 13 and 18 area rejected under 35 U.S.C. 103 as being unpatentable over Lee.
Regarding claim 7, fig. 1 of Lee discloses wherein the third insulating layer 360 includes a third layer (layer between 191) and a fourth layer (layer of 360 between 365) over the third layer.
Lee does not disclose wherein the third layer contains oxygen and aluminum, and wherein the fourth layer contains nitrogen and silicon.
However, the court has held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v.Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) .
As such it would have been obvious to form a device of Lee comprising wherein the third layer contains oxygen and aluminum, and wherein the fourth layer contains nitrogen and silicon since these materials can cross-contaminate during processing steps.
Regarding claim 13, fig. 1 of Lee disclose wherein an oxide semiconductor film 135 is provided over the substrate, and wherein the transistor Tp does not include the oxide semiconductor film in a channel formation region.
Lee discloses wherein the transistor 130 includes polycrystalline silicon in a channel formation region. However, Lee discloses of a transistor comprising oxide semiconductor film 135 in a channel formation region 130.
Note that oxide semiconductor film and polycrystalline silicon are interchangeable as channel formation region in order to achieve a desirable current flow and speed.
In view of such teaching, it would have been obvious to forma device of Lee comprising wherein the transistor includes oxide semiconductor film in a channel formation region in order to obtain a desirable device speed.
Regarding claim 18, fig. 1 of Lee discloses claim 14. Lee discloses wherein the first transistor and the second transistor each does not includes an oxide semiconductor film in a channel formation region, respectively.
Lee discloses that each includes an polycrystalline silicon film in a channel formation region, respectively.
However, Lee discloses of a transistor comprising oxide semiconductor film 135 in a channel formation region 130.
Note that oxide semiconductor film and polycrystalline silicon are interchangeable as channel formation region in order to achieve a desirable current flow.
In view of such teaching, it would have been obvious to forma device of Lee discloses wherein the first transistor and the second transistor each includes an oxide semiconductor film in a channel formation region, respectively in order a desirable current flow and speed.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of KURATA et al. 20200321360.
Regarding claim 12, Lee discloses claim 1. Lee does not disclose further comprising a second transistor under the transistor, wherein the substrate is a silicon substrate, and wherein the second transistor includes silicon in a channel formation region.
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However, fig. 23 of Kurata discloses a device comprising:
A transistor 330 over a substrate;
further comprising a second transistor 2200 under the transistor, wherein the substrate is a silicon substrate 111 (par [0184]), and wherein the second transistor includes silicon in a channel formation region.
In view of such teaching, it would have been obvious to form a device of Lee further comprising further comprising a second transistor under the transistor, wherein the substrate is a silicon substrate, and wherein the second transistor includes silicon in a channel formation region such as taught by Kurata in order integrate a CMOS device into the display device for the applicant design specification.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VONGSAVANH SENGDARA whose telephone number is (571)270-5770. The examiner can normally be reached 9AM-6PM EST.
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/VONGSAVANH SENGDARA/ Primary Examiner, Art Unit 2893
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