DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 87-95 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species B,C,D,E, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 02/20/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 67,84,86 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Application Publication Number 2006/0011128 A1 to Ellison et al., “Ellison”.
Regarding claim 67, Ellison discloses an electronic semiconductor component (e.g. Figure 10 “device layer or layers”, e.g. Schottky diode ¶ [0038]) comprising a crystal made of monocrystalline SiC (SiC substrate with SiC homoepitaxial layer, Abstract), wherein the orientation of at least subsections of a first surface of the crystal deviates by less than 0.5° from a direction perpendicularly to the C direction of the crystal structure of the crystal (Figure 9 left-most data points, ¶ [0018],[0020],).
Regarding claim 84, Ellison discloses the electronic semiconductor component of claim 67, and Ellison further discloses wherein the monocrystalline SiC is of the hexagonal 4H polytype (¶ [0015],[0017],[0033]).
Regarding claim 86, Ellison discloses the electronic semiconductor component of claim 67, and the device of Ellison inherently anticipates wherein the A plane of the crystal deviates by less than 0.5° from a direction perpendicularly to the first surface of the crystal (since c-plane (0001) deviates less than 0.5° and A-plane is orthogonal to c-plane).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 85 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication Number 2006/0011128 A1 to Ellison et al., “Ellison”, as applied to claim 67 above, and further in view of U.S. Patent Application Publication Number 2006/0249073 A1 to Asaoka et al., “Asaoka”.
Regarding claim 85, although Ellison anticipates the electronic semiconductor component of claim 67, Ellison fails to clearly anticipate wherein the crystal is a crystal made of high-quality semi-insulating SiC material of high purity. Applicant’s specification notes “[0163] The embodiment of the donor substrate 12 shown in FIG. 1 is a wafer composed of high-quality semi-insulating SiC material of high purity. In particular, this is understood to mean a material wherein the concentration of elemental impurities, for example N, B, P, is less than 5E15 cm.sup.−3.”
Asaoka teaches a heat treatment for growing silicon carbide (Abstract) which makes it possible to form single crystal SiC having a high purity of background, approximately 5E15/cm-3 or lower (¶ [0071]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Ellison using high purity SiC as taught by Asaoka in order to desirably achieve high quality SiC with low defects without using complicated processes (Asaoka ¶ [0012],[0013]) with high quality and improved growth speed (Asaoka ¶ [0081]).
Allowable Subject Matter
Claims 68-83 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Prior art generally teaches on-axis substrates e.g. U.S. Patent Application Publication Number 2013/0285069 A1 to Yano et al. teaches an electronic semiconductor component (e.g. Fig. 10 DMOSFET or UMOSFET, FIG. 11) comprising a crystal made of monocrystalline SiC, wherein the orientation of at least subsections of a first surface of the crystal is along the C direction of the crystal structure of the crystal (on-axis 0° in Fig. 14(1), ¶ [0085], Fig. 15(a) ¶ [0086]). However, it is unclear whether such on-axis substrates necessarily have a first surface of the crystal deviates by less than 0.5° from a direction perpendicularly to the C direction of the crystal structure of the crystal as required by claim 67 since U.S. Patent Number 9,464,366 B2 to Myers-Ward et al. states “commonly available on-axis substrates may not be precisely 0° but may still be considered an on-axis substrate” column 4 lines 23-24. Although prior art e.g. U.S. Patent Application Publication Number 2006/001128 A1 to Ellison et al. teaches homoepitaxy of SiC on an SiC substrate relative to the c-plane (0001) basal plane at an angle higher than 0.1° but less than 1° (Abstract, Figure 9) as discussed above, prior art fails to reasonably teach or suggest further comprising an active component region comprising: a first zone having a near-surface shielding structure or JFET structure in a region comprising at least subsections of the first surface of the crystal; a second zone having a voltage-absorbing layer, arranged on a side of the first zone remote from the first surface of the crystal and adjoining the first zone; and a field-free contact zone or field stop zone arranged on a side of the second zone remote from the first zone, as claimed in claim 68 together with all of the limitations of claim 67 as claimed. Claims 69-83 are objected to as allowable insofar as they depend upon and include all of the limitations of claims 68 and 67 together.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC A WARD whose telephone number is (571)270-3406. The examiner can normally be reached M-F 10-6 ET.
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/Eric A. Ward/ Primary Examiner, Art Unit 2891
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