DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The last Office action dated 12/1/2025 is hereby withdrawn.
Election/Restrictions
Applicant’s election of Species 9 with claims 1-10 and 13-16 indicated by Applicant to read thereon, in the reply filed on 11/18/2025 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 11-12 and 17-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/18/2025.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-10 and 13-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamashita, US Pub. No. 2012/0205739A1.
Re claim 1. Yamashita discloses an SiC semiconductor device comprising: an SiC semiconductor chip that has a main surface (e.g., fig. 1); an n-type drift region (3, 7b, 7c) that is formed in a surface layer portion of the main surface and has an impurity concentration adjusted by at least two types of pentavalent elements (e.g., Nitrogen/Phosphorus/Antimony; paragraphs 65, 67, 70); and a p-type impurity region that is formed inside the drift region 4a/4b such as to form a pn- junction portion with the drift region (e.g., fig. 1), see figs. 1-10 and pages 1-11 for more details.
Re claim 2. Yamashita discloses an SiC semiconductor device comprising: an SiC semiconductor chip that has a main surface (e.g., fig. 1); an n-type drift region (3, 7b, 7c) that is formed in a surface layer portion of the main surface (e.g., fig. 1); and a p-type impurity region 4a/4b that is formed inside the drift region such as to form a pn- junction portion with the drift region and has an impurity concentration adjusted by a trivalent element (e.g., Al, paragraph 66) other than boron, see figs. 1-10 and pages 1-11 for more details.
Re claim 3. The SiC semiconductor device according to Claim 2, wherein the drift region has an impurity concentration adjusted by at least two types of pentavalent elements (e.g., Nitrogen/Phosphorus/Antimony; paragraphs 65, 67, 70).
Re claim 4. The SiC semiconductor device according to Claim 1, wherein the drift region has a concentration distribution that increases toward the main surface (e.g., from n- to n, fig. 1 and paragraphs 65, 67, 70), and the impurity region has a concentration distribution that increases toward the main surface (e.g., from p to p+, fig. 1).
Re claim 5. The SiC semiconductor device according to Claim 1, wherein the drift region includes a pentavalent element other phosphorus (e.g., paragraphs 65, 67, 70).
Re claim 6. The SiC semiconductor device according to Claim 1, wherein the impurity region includes at least one type of trivalent element among aluminum, gallium, and indium (e.g., Al, paragraph 66).
Re claim 7. The SiC semiconductor device according to Claim 1, wherein the impurity region 4a extends in a thickness direction inside the drift region 3 such as to form a super junction structure by the pn-junction portion with the drift region (e.g., fig. 1).
Re claim 8. The SiC semiconductor device according to Claim 1, wherein the impurity region 4a traverses an intermediate portion of the drift region 3 in regard to a thickness direction of the drift region (e.g., fig. 1).
Re claim 9. The SiC semiconductor device according to Claim 1, wherein the impurity region 4a is formed at an interval to the main surface side from a bottom portion of the drift region 3 (e.g., fig. 1).
Re claim 10. The SiC semiconductor device according to Claim 1, wherein the drift region includes a basal concentration (3) due to a first impurity that is a pentavalent element (e.g., paragraph 65) and an added concentration (7b, 7c) due to a second impurity that is a pentavalent element other than the first impurity (paragraph 67, 70).
Re claim 13. The SiC semiconductor device according to Claim 10, wherein the added concentration 7b, 7c has a concentration distribution that increases toward the main surface (e.g., fig. 1).
Re claim 14. The SiC semiconductor device according to Claim 10, wherein the basal concentration (3) has a concentration distribution (e.g., n-) that is substantially constant in a thickness direction (fig. 1).
Re claim 15. The SiC semiconductor device according Claim 10, wherein the first impurity is a pentavalent element other than phosphorus (e.g., paragraphs 65, 67, 70).
Re claim 16. The SiC semiconductor device according to Claim 10, wherein the first impurity is nitrogen (e.g., paragraph 65), and the second impurity is at least one among arsenic and antimony (e.g., paragraphs 67, 70).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACK CHEN whose telephone number is (571)272-1689. The examiner can normally be reached Monday to Friday, 8am to 4pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached at (571)270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JACK S CHEN/Primary Examiner, Art Unit 2893