DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 2, 2026 has been entered.
Response to Amendment
Applicant's arguments with respect to claims 16 – 22 have been considered but they are not persuasive. In the response to the Office Action dated December 2, 2025, Applicant first argues that the prior art, Young, does not disclose that the insulating substrate 141 is made of glass as the inorganic material, as now required by independent claims 16 and 19. Applicant contends that in paragraphs [0038] and [0039], Young only discloses that the insulating substrate 141 may be made of a material containing glass fiber and a resin. Applicant is reminded that independent claims 16 and 19 merely recite that the insulating substrates are made of glass as an inorganic material. Since the insulating substrate 141 of Young is formed of glass fiber and resin, it is formed of a glass material (which is an inorganic material). Claims 16 and 19 do not preclude the insulating substrate 141 from being made of glass fiber nor do these claims recite that the insulating substrates are made of only glass.
Next, Applicant argues that the secondary prior art, Koji, does not disclose a semiconductor chip being an optical device. Applicant is reminded that Examiner did not cite Koji as teaching the semiconductor chip being an optical device. In the rejection to claims 16 and 19, Examiner stated that forming and utilizing an optical device in a wiring board is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill.
Claim Objections
Claims 16 and 19 are objected to because of the following:
In particular, regarding amended claim 16, lines 10 – 12 recite “a first external electrode provided on a lower surface in the laminating direction of the optical device is configured to be connected by conductive paste with which a second insulating substrate of the insulating substrates made of the glass as the inorganic material is filled.” It is not clear as to what the first external electrode is connected to. Is it meant to recite “a first external electrode provided on a lower surface in the laminating direction of the optical device is configured to be connected by conductive paste to a second insulating substrate of the insulating substrates made of the glass as the inorganic material”?
Similarly, amended claim 19 recites “connecting a first external electrode provided on a lower surface in the laminating direction of the optical device by conductive paste with which a second insulating substrate of the insulating substrates made of the glass as the inorganic material is filled.” Is it meant to recite “connecting a first external electrode provided on a lower surface in the laminating direction of the optical device by conductive paste to a second insulating substrate of the insulating substrates made of the glass as the inorganic material.”
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 16 – 22 are rejected under 35 U.S.C. 103 as being unpatentable over Young (KR 10-2015-0087682A) in view of Koji (JP 2009-164287A).
Regarding claim 16, in Figure 1, Young discloses a circuit board being a multilayer wiring board in which insulating substrates (121, 141, 122, 142) which are made of glass as an inorganic material (insulating substrates 121, 141, 122, 142 may be formed of a material including glass fiber and a resin material; 9th and 12th paragraphs, page 3) on which metal layers (132, 133, 131, 151, 152, 153) are formed are laminated while interposing heat-resistant adhesive layers (160; 8th paragraph, page 3), comprising a configuration in which an embedment portion (portion of insulating substrate 141 that element 150 is disposed in) penetrated in a laminating direction in a first insulating substrate (141) of the insulating substrates made of the glass as the inorganic material (9th paragraph, page 3) is formed and a semiconductor device (150) is embedded in the embedment portion, wherein the adhesive layers contain a thermoplastic resin (9th paragraph, page 3), the semiconductor device is an optical device, and a first external electrode (151) provided on a lower surface in the laminating direction of the optical device is configured to be connected by conductive paste (153) with which a second insulating substrate (142) of the insulating substrates made of the glass as the inorganic material is filled. Young does not disclose that conductive portion 153 is formed of conductive paste and that element 150 is an optical device. However, in Figures 3 – 4, Koji teaches conductive vias 25 made of conductive paste (6th paragraph, page 5) connecting to a semiconductor device and being disposed/filled in a second insulating substrate 17.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the conductive portion 153 of Young to be formed of conductive paste as taught by Koji in that it is typical and well known in the art for conductive paste to be used in forming vias in multilayer wiring boards.
Further, forming and utilizing an optical device in a wiring board is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill.
Regarding claim 17, Young discloses wherein the optical device includes a second external electrode on an upper surface, a first electronic component is mounted on the first insulating substrate, an optical waveguide is formed on the first insulating substrate, the first electronic component is connected to the second external electrode provided on an upper surface in the laminating direction of the optical device, and the optical device is coupled to the optical waveguide (Figure 1).
Regarding claim 18, Young discloses an electronic device comprising the circuit board according to claim 16 (Figure 1).
Regarding claim 19, in Figure 1, Young discloses a method for manufacturing a circuit board being a multilayer wiring board by laminating insulating substrates (121, 141, 122, 142) which are made of glass as an inorganic material (insulating substrates 121, 141, 122, 142 may be formed of a material including glass fiber and a resin material; 9th and 12th paragraphs, page 3) on which metal layers (132, 133, 131, 151, 152, 153) are formed while interposing heat-resistant adhesive layers (160; 8th paragraph, page 3), wherein an embedment portion (portion of insulating substrate 141 that element 150 is disposed in) penetrated in a laminating direction in a first insulating substrate (141) of the insulating substrates made of the glass as the inorganic material (9th paragraph, page 3) is formed, and a semiconductor device (150) is embedded in the embedment portion, and the adhesive layers contain a thermoplastic resin (9th paragraph, page 3), the semiconductor device is an optical device, and the method for manufacturing a circuit board comprising: embedding the optical device in the embedment portion after laminating the first insulating substrate (Figures 2 – 8), and connecting a first external electrode (151) provided on a lower surface in the laminating direction of the optical device by conductive paste (153) with which a second insulating substrate of the insulating substrates made of the glass as the inorganic material is filled. Young does not disclose that conductive portion 153 is formed of conductive paste and that element 150 is an optical device. However, in Figures 3 – 4, Koji teaches conductive vias 25 made of conductive paste (6th paragraph, page 5) connecting to a semiconductor device and being disposed/filled in a second insulating substrate 17.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the conductive portion 153 of Young to be formed of conductive paste as taught by Koji in that it is typical and well known in the art for conductive paste to be used in forming vias in multilayer wiring boards.
Further, forming and utilizing an optical device in a wiring board is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill.
Regarding claim 20, Young discloses wherein the optical device includes a second external electrode on an upper surface, a first electronic component is mounted on the first insulating substrate, an optical waveguide is formed on the first insulating substrate, the first electronic component is connected to the second external electrode, and the optical device is coupled to the optical waveguide (Figure 1).
Regarding claim 21, Young discloses forming the embedment portion by etching (Figure 1).
Regarding claim 22, Young discloses forming the optical waveguide by patterning or ion exchange processing (Figure 1).
Conclusion
All claims are identical to or patentably indistinct from, or have unity of invention with claims in the application prior to the entry of the submission under 37 CFR 1.114 (that is, restriction (including a lack of unity of invention) would not be proper) and all claims could have been finally rejected on the grounds and art of record in the next Office action if they had been entered in the application prior to entry under 37 CFR 1.114. Accordingly, THIS ACTION IS MADE FINAL even though it is a first action after the filing of a request for continued examination and the submission under 37 CFR 1.114. See MPEP § 706.07(b). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TREMESHA W BURNS whose telephone number is (571)270-3391. The examiner can normally be reached Monday-Friday 8am - 4:30 pm EST.
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TREMESHA W. BURNS
Primary Examiner
Art Unit 2847