Prosecution Insights
Last updated: April 19, 2026
Application No. 18/271,919

SOLID OXYGEN IONIC CONDUCTOR BASED FIELD-EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
Jul 12, 2023
Examiner
DEGRASSE, IAN ISAAC
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
UNIVERSITY OF SCIENCE AND TECHNOLOGY OF CHINA
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
3y 5m
To Grant
61%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
10 granted / 12 resolved
+15.3% vs TC avg
Minimal -22% lift
Without
With
+-22.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
54 currently pending
Career history
66
Total Applications
across all art units

Statute-Specific Performance

§103
51.7%
+11.7% vs TC avg
§102
34.8%
-5.2% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 12 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 5-7 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 2017-199825 A to Takeuchi et al. (hereinafter “Takeuchi”). Regarding claim 1, Takeuchi discloses a solid oxygen ionic conductor based field-effect transistor, comprising: a substrate; a gate dielectric layer located on the substrate, wherein the gate dielectric layer is a solid oxygen ionic conductor thin film (three-terminal element 100B having a conductive substrate 10 with a solid electrolyte layer 40 thereon, where layer 40 may comprise an oxide ion conductive material; Fig. 8; paragraphs [0067], [0083]-[0085]); a channel layer covered on a part of the gate dielectric layer (first layer 50 forms channel and is disposed over layer 40; Fig; 8; paragraphs [0054], [0071]); and a source electrode and a drain electrode respectively located on the gate dielectric layer not covered by the channel layer and on a part of the channel layer (source and drain electrodes 20B, 30B on layer 40 and over a portion of layer 50; Fig. 8; paragraph [0083]). Regarding claim 2, Takeuchi discloses the solid oxygen ionic conductor based field-effect transistor according to claim 1, wherein the substrate is a metal conductive substrate, comprising one of niobium-doped strontium titanate or indium tin oxide conductive glass (substrate 10 may be SrTiO3 doped with Nb; paragraph [0064]). Regarding claim 3, Takeuchi discloses the solid oxygen ionic conductor based field-effect transistor according to claim 1, wherein the material of the solid oxygen ion conductor thin film is gadolinium-doped ceric oxide; and the thickness of the gate dielectric layer is in a range of 400 nm to 1 µm (layer 40 may comprise gadolinium-doped ceria film, where the layer 40 may be at least 400 nm as shown in Fig. 8 given the disclosed thickness of the electrodes 20B, 30B as being 100 nm or more; Fig. 8; paragraphs [0056], [0060]). Regarding claim 5, Takeuchi discloses the solid oxygen ionic conductor based field-effect transistor according to claim 1, wherein both of the source and the drain electrodes are one of the metal elemental films or indium tin oxide conductive films (electrodes 20B, 30B may be made from Au by thin film fabrication; paragraphs [0073], [0094]). Regarding claim 6, Takeuchi discloses a method of manufacturing a solid oxygen ionic conductor based field-effect transistor according to claim 1, comprising: providing a metal conductive substrate as a gate electrode of the solid oxygen ionic conductor based field-effect transistor (see claim 1); manufacturing a solid oxygen ionic conductor based gate dielectric layer on the surface of the metal conductive substrate (see claim 1); manufacturing a channel layer on the surface of the gate dielectric layer by using thin film growing and etching process or material mechanical peeling and transferring technology, wherein the channel layer is covered on a part of the gate dielectric layer (layer 50 formed over layer 40 and may be epitaxially grown and etched; Fig. 8; paragraphs [0093]-[0094]); and manufacturing a source electrode and a drain electrode on the gate dielectric layer not covered by the channel layer and on a part of the channel layer (see claim 1) by using a coating process (source and drain electrodes 20B, 30B may be formed by vapor deposition; paragraph [0094]). Regarding claim 7, Takeuchi discloses the method according to claim 6, wherein the process of manufacturing the solid oxygen ionic conductor based gate dielectric layer on the surface of the metal conductive substrate comprises one of magnetron sputtering or pulsed laser deposition (layer 40 may be deposited via RF magnetron sputtering; paragraph [0091]). Regarding claim 10, Takeuchi discloses the method according to claim 6, wherein the thin film growing and etching process comprises one of the argon ion etching process, reactive ion beam etching process or focused ion beam etching process (dry etching process may be performed; paragraphs [0087], [0093]); the material mechanical peeling and transferring technology comprises one of dry transfer or wet transfer (this limitation depends from optional language in claim 6); and the coating process comprises one of electron beam evaporation process or thermal evaporation process (source and drain electrodes 20B, 30B may be formed by vapor deposition; paragraph [0094]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Takeuchi. Regarding claim 4, Takeuchi discloses the solid oxygen ionic conductor based field-effect transistor according to claim 1, wherein the material of the channel layer is an oxide thin film or thin flake, comprising one of: copper oxide, strontium cobaltate, or strontium iridium oxide (layer 50 may comprise copper oxide; paragraphs [0071]-[0072]). Takeuchi fails to disclose the thickness of the channel layer is in a range of 5 nm to 30 nm. However, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Takeuchi in this manner in order to potentially provide improved device stability, enhanced gate electrostatic control, optimized field-effect mobility, and better uniformity and process control in sputtering. See MPEP 2144.04 IV Changes in size/proportion. Regarding claim 8, Takeuchi discloses the method according to claim 7, wherein the process of manufacturing the gate dielectric layer comprises: a temperature at which the metal conductive substrate is heated is in a range of 600° C to 750° C (formation of layer 40 may include heating up entire structure including substrate 10 to about 750°; paragraph [0097]). Takeuchi fails to disclose a power density is in a range of 1.5 W/cm2 to 3.5 W/cm2; a distance between a target and the metal conductive substrate is in a range of 5 cm to 12 cm; and a gas flow ratio of process gas to reaction gas is in a range of 2:1 to 3:1. However, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Takeuchi in this manner in order to utilize well-known parameters of RF sputtering for ease and efficiency of manufacture. Specifically, RF sputtering commonly operates in the range of 1 to 50 W/cm2 with a distance to target of 3 to 10 cm and ratio of 4:1 to 1:1 of process to reaction gases. Examples of such parameters are disclosed in patents such as US 6,007,685 A to MacChesney et al. See also MEPE 2144.05 I overlapping, approaching, and similar ranges, amounts, and proportions. Regarding claim 9, Takeuchi discloses the method according to claim 8. Takeuchi fails to disclose wherein the process gas is argon and the reaction gas is oxygen. However, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Takeuchi in this manner in order to utilize well-known process and reaction gases for RF sputtering for ease and efficiency of manufacture. Examples of using such process and reaction gases are disclosed in patents such as US 6,007,685 A to MacChesney et al. Conclusion The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure: each of US 6,007,685 A to MacChesney et al. and US 2005/0048802 A1 to Zhang et al. disclose related parameters of RF sputtering in a similar context. Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF NATALINI can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IAN DEGRASSE/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

Jul 12, 2023
Application Filed
Feb 07, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
61%
With Interview (-22.2%)
3y 5m
Median Time to Grant
Low
PTA Risk
Based on 12 resolved cases by this examiner. Grant probability derived from career allow rate.

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