Prosecution Insights
Last updated: April 19, 2026
Application No. 18/276,080

DISPLAY DEVICE

Non-Final OA §103
Filed
Aug 07, 2023
Examiner
BREVAL, ELMITO
Art Unit
2875
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Energy Laboratory Co. Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
87%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
1052 granted / 1380 resolved
+8.2% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
43 currently pending
Career history
1423
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
51.6%
+11.6% vs TC avg
§102
30.6%
-9.4% vs TC avg
§112
11.0%
-29.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1380 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 10/13/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 3-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Maeda et al. (US. Pub: 2018/0358573 A1~ hereinafter “Maeda”) of record in view of Kaneta et al. (US. Pub: 2011/0241027 A1~ hereinafter “Kaneta”). Regarding claim 3, Maeda discloses (in at least fig. 6 below) a display device comprising: a first lower electrode (119); a second lower electrode (119); a third lower electrode (119); an auxiliary electrode (200; [0071]; [0099]) between the first lower electrode and the second lower electrode (see below); a partition wall (522Y; [0013]) over the first lower electrode, the second lower electrode, the third lower electrode, and the auxiliary electrode (see fig. 6); a first light-emitting layer (123; [0085]) over the first lower electrode and in a first opening in the partition wall; a first layer (121; [0096]) between the first lower electrode and the first light-emitting layer; a second light-emitting layer (123) over the second lower electrode (119) and in a second opening in the partition wall (see fig. 6 below); a second layer (121) between the second lower electrode and the second light-emitting layer (123); a third light-emitting layer (123) over the third lower electrode (119) and in a third opening in the partition wall; a third layer (121) between the third lower electrode and the third light-emitting layer (see fig. 6); and an upper electrode (125) over the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer (see fig. 6), wherein the upper electrode (125) is electrically connected to the auxiliary electrode (200) through a conductive layer (124), and wherein the partition wall (522Y) has a stacked-layer structure of a first insulator (522YL) and a second insulator (522 YU). PNG media_image1.png 439 759 media_image1.png Greyscale Maeda does not expressly disclose the stacked-layer partition wall structure a first insulator containing an inorganic material and a second insulator containing an organic material. However, Maeda discloses (in at least [0112]) “each of the column banks 522Y are provided with an upper layer 522YU and a lower layer 522YL. The upper layer 522YU may have liquid repellency more than a defined value with respect to liquid ink, while the lower layer 522 YL and the auxiliary column banks 532 and 533 may have liquid repellency less than a defined value.” Kaneta in the same field of a display device discloses (in at least fig. 1) a partition wall (23) has a stacked-layer structure of a first insulator (23a) containing an inorganic material ([0066]-[0069]) and a second insulator (23b) containing an organic material ([0070]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form the partition wall of Maeda with the material of Kaneta, since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination. Regarding claim 4, Maeda discloses (in at least fig. 6 above) a display device comprising: a first lower electrode (119); a second lower electrode (119); a third lower electrode (119); an auxiliary electrode (200) between the first lower electrode and the second lower electrode (see fig. 6 above); a partition wall (522Y) over the first lower electrode, the second lower electrode, the third lower electrode, and the auxiliary electrode (see at least fig. 6 above); a first light-emitting layer (123; [0085]) over the first lower electrode and in a first opening in the partition wall (522Y); a first layer (121) between the first lower electrode and the first light-emitting layer; a second light-emitting layer (123; [0085]) over the second lower electrode and in a second opening in the partition wall; a second layer (121) between the second lower electrode and the second light-emitting layer; a third light-emitting layer (123; [0085]) over the third lower electrode and in a third opening in the partition wall; a third layer (121) between the third lower electrode and the third light-emitting layer; and an upper electrode (125) over the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer (see at least fig. 6), wherein the upper electrode (125) is electrically connected to the auxiliary electrode (200) through a contact hole (118b; [0095]) between the first lower electrode and the second lower electrode (see figs. 4 and 6), wherein the partition wall (522Y) has a stacked-layer structure of a first insulator (522YL) and a second insulator (522YU), wherein the contact hole (118b) comprises a first opening in the first insulator (522YL) and a second opening in the second insulator (522YU); wherein the first insulator (522YL) comprises an end portion exposed from the second opening in a top view of the contact hole (118b), and wherein the upper electrode (125) is electrically connected to the auxiliary electrode (200) through a conductive layer (124) exposed from the first opening in the first insulator (522YL). Maeda does not expressly disclose the stacked-layer partition wall structure a first insulator containing an inorganic material and a second insulator containing an organic material. However, Maeda discloses (in at least [0112]) “each of the column banks 522Y are provided with an upper layer 522YU and a lower layer 522YL. The upper layer 522YU may have liquid repellency more than a defined value with respect to liquid ink, while the lower layer 522 YL and the auxiliary column banks 532 and 533 may have liquid repellency less than a defined value.” Kaneta in the same field of a display device discloses (in at least fig. 1) a partition wall (23) has a stacked-layer structure of a first insulator (23a) containing an inorganic material ([0066]-[0069]) and a second insulator (23b) containing an organic material ([0070]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form the partition wall of Maeda with the material of Kaneta, since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination. Regarding claim 5, Maeda discloses (in at least fig. 6 below) a height of the partition wall (522Y) along an X direction is lower than a height of the partition wall along a Y direction (see fig. 6 above). Regarding claim 6, Maeda discloses (in at least fig. 6 below) the second lower electrode (119) is positioned in a region adjacent to the first lower electrode (119) in an X direction in a top view (see fig. 6), and wherein the third lower electrode (119) is positioned in a region adjacent to the first lower electrode in a Y direction in the top view (see fig. 6). Regarding claim 7, Maeda discloses (in at least fig. 6 below) each of the first layer (121), the second layer (121), and the third layer comprises a hole-transport layer or a hole-injection layer ([0096]). Regarding claim 8, Maeda discloses (in at least fig. 6 below) a height of the partition wall (522Y) along an X direction is lower than a height of the partition wall along a Y direction (see fig. 6 above). Regarding claim 9, Maeda discloses (in at least fig. 6 below) the second lower electrode (119) is positioned in a region adjacent to the first lower electrode (119) in an X direction in a top view (see fig. 6), and wherein the third lower electrode (119) is positioned in a region adjacent to the first lower electrode in a Y direction in the top view (see fig. 6). Regarding claim 10, Maeda discloses (in at least fig. 6 below) each of the first layer (121), the second layer (121), and the third layer comprises a hole-transport layer or a hole-injection layer ([0096]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELMITO BREVAL whose telephone number is (571)270-3099. The examiner can normally be reached M-Th~ 7:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James R. Greece can be reached at 571-272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ELMITO BREVAL Primary Examiner Art Unit 2875 /ELMITO BREVAL/Primary Examiner, Art Unit 2875
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Prosecution Timeline

Aug 07, 2023
Application Filed
Feb 04, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
87%
With Interview (+10.8%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 1380 resolved cases by this examiner. Grant probability derived from career allow rate.

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