Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Mark-up
The latest claim set (dated 5/19/26) submitted with the Request for Continued Examination (RCE) is marked-up with changes from the previous submitted after-final claim set (4/15/26), which in turn is mark-up from the previously examined claim set (dated 2/4/26). The filing of the RCE enters both of these claim sets. Therefore the latest claim set (dated 5/19.26) being examined incorporates amendments from both of these claim sets (dated 2/4/26 and 4/15/26). Hopefully all of these changes have been captured in the instant action.
Response to Arguments
Applicant's arguments filed 5/19/26 have been fully considered but they are not persuasive.
Applicant argues:
Claims 1, 2, 5, 6, 16-18, and 20 stand rejected under 35 U.S.C. § 102(a)(1)/102(a)(2) as allegedly being anticipated by Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation). Office Action, page 4.
Claims 1 and 2, as amended, recite "at least one semiconductor chip being connected to a cooling structure comprising a plurality of pin fins at a first main side of a base plate, wherein the pin fins are formed integrally with the base plate, and wherein a tip of each pin fin of the pin fins extends in a vertical direction facing away from the first main side, and wherein the at least one semiconductor chip is arranged on the base plate at a second main side opposite the first main side."
. . .
Specifically, Tsuyuno does not disclose or teach "the at least one semiconductor chip is arranged on the base plate at a second main side opposite the first main side" as recited by claims 1 and 2 as amended. In Tsuyuno, "the fin bases 800 are bonded to the lower surface of the collector-side wiring board 423 and the upper surface of the emitter-side wiring board 422, respectively. The collector-side wiring board 423 or the emitter-side wiring board 422 and the fin base 800 are bonded by a metal bonding member 51 such as solder or sintered metal." Tsuyuno, column 6, lines 39-44. The semiconductor chips in Tsuyuno are mounted on wiring boards that are bonded to the fin bases 800, not directly arranged on the fin base 800 (which the Examiner identifies as the base plate) at a second main side opposite the first main side where the pin fins are located.
The structural arrangement in Tsuyuno is fundamentally different from that recited by claims 1 and 2 as amended. In Tsuyuno, the fin base 800 is a separate heat dissipation member that is bonded to wiring boards using solder or sintered metal. As disclosed in Tsuyuno, "the fin base 800 having a large number of fins 800a is a heat dissipation member, and has the connecting portion 810 extending outward from an outer peripheral end 422a of the emitter- side wiring board 422 or an outer peripheral end 423a of the collector-side wiring board 423. The connecting portion 810 has low rigidity formed to a thickness substantially equal to or thinner than the thickness (length in the Z direction) from the bottom surface of the fin base 800 to the base of the fin 800a." Tsuyuno, column 6, lines 50-56. Further, in Tsuyuno, "the fin bases 800 are arranged above and below the first to fourth conductors 410 to 413, and the first to fourth conductors 410 to 413 are sealed by the resin 850 filled between the connecting portions 810 of the fin base 800." Tsuyuno, column 12, lines 35-41.
In contrast, claims 1 and 2 as amended require that "the at least one semiconductor chip is arranged on the base plate at a second main side opposite the first main side" where the pin fins are located. This specific structural relationship-where the semiconductor chip is arranged on the base plate at a side opposite to where the pin fins extend-is not disclosed or taught by Tsuyuno. In Tsuyuno, the semiconductor chips are arranged on wiring boards (collector-side wiring board 423 and emitter-side wiring board 422), which are then bonded to the fin bases 800 via metal bonding members. The semiconductor chips in Tsuyuno are not arranged on the fin base 800 itself.
Accordingly, Tsuyuno does not anticipate claims 1 and 2 as amended, and Applicant respectfully requests withdrawal of the rejection of claims 1 and 2 under 35 U.S.C. § 102. (Applicant’s remarks of 5/19/26, pp. 8-9).
The application discloses a semiconductor chip 5 that is arranged on the base plate 2 on the second main side 6. Likewise, Tsuyuno (WO 2020/105463) discloses at least one semiconductor chip (fig. 4(c), elements 155 and 156) on the base plate (fig. 5, horizontal portion of 800 {which does not include 800a]) on the second main side (fig. 5(b), lower side of upper 800). The Examiner understands the phrase “arranged on” is a grammatical phrase to indicate that ‘the at least one semiconductor chip” is arranged on “a second main side.”
First, the claims do not indicate what specific element has the claimed “second main side.” The specification is of no help in interpreting the claim because the Examiner believes that the specification discloses the first and second main sides as elements 4 and 6, respectively, which are referring to the near and far sides of the power semiconductor module 1 as shown in fig. 1.
Second, Applicant argues that “[t]he semiconductor chips in Tsuyuno are mounted on wiring boards that are bonded to the fin bases 800, not directly arranged on the fin base 800” (emphasis added). Claims 1 and 2 require “arranged on,” not “directly arranged on” as Applicant argues. By the phrase “arranged on” lacking the term “directly,” this allows for intervening elements between the at least one power semiconductor chip and the base plate such as the wiring boards and bonding materials of Tsuyuno. In fact, Applicant’s new claim 25 requires “a substrate arranged on the base plate at the second main side, wherein the at least one semiconductor chip is directly disposed on the substrate” (emphasis added) which requires the substrate to be in between the base plate and the at least one semiconductor chip. New Claim 25 requires an intervening element, “a substrate,” that defeats Applicant’s argument that Tsuyuno’s wiring boards and bonding materials preclude Tsuyuno from being able to meet the limitation of “the at least one semiconductor chip is arranged on the base plate.”
Third, “[t]he semiconductor chip is based, for example, on silicon or a wide bandgap material, exemplarily silicon carbide” (page 3, lines 17-19) and new claim 24 requires “the at least one semiconductor chip is based on silicon.” The at least one semiconductor chip 5 is shown in figure 1 as part of a “block” encapsuled within housing 23, which is molding compound 8, without illustrating any detail of the at least one semiconductor chip 5 including the substrate that is required by newly added claim 25. Are Applicant’s arguments based upon that just the silicon-based semiconductor chip or “die per se” being arranged on the base plate ignoring any electrical or mechanical structure including a substrate that might be actually present?
Fourth, the specification at page 3, lines 32 – page 4, line 1 discloses the at least one semiconductor chip 5 as being at least two semiconductor chip including a switch (i.e., transistor) and a diode. Applicant’s drawings lack any detailed structure that is needed to electrically or mechanically interconnect the switch and the diode such as their disclosed lead frame or substrate (page 3, lines 12-13). The structure of the at least one semiconductor chip, which in Tsuyuno is two semiconductor chips is shown with all its detail instead of just as a “block” in the instant application.
In summary, the specification states “a base plate 2 . . . with a cooling structure 3 at a first main side. The cooling structure 3 is formed of a plurality of pin fins. Further, at least one semiconductor chip 5 is arranged on the base plate 2 . . ., not shown here since the semiconductor chip 5 is covered by a housing 23, which is in this exemplary embodiment a mold compound 8” (specification, page 18, line 29-page 19, line 3). The specification further states “[t]he power semiconductor module exemplarily comprises at least two semiconductor chips. The two semiconductor chips are spaced apart from one another in lateral directions. . . The at least two semiconductor chips being connected antiparallel to one another form, for example, a half bridge” (page 3, line 29-page 4, line 4). Two semiconductor chips are permitted because the claim requires “at least one semiconductor chip.” The instant application lacks any detail of what structure is necessary to interconnect the two semiconductor chips, whereas Tsuyuno details this interconnection structure, which includes the wiring boards and bonding materials that Applicant has cited in their arguments. There is no claimed requirement “the at least one semiconductor chip to be arranged directly on the base plate” allowing intervening elements such as wiring boards and bonding materials to be present. Therefore, Tsuyuno properly anticipates not only the previously present claims (dated 2/5/26), but also the presently amended claim set (dated 5/19/26).
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “substrate” (claim 25) and “scratch marks” (claim 27) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 3 and 4 are objected to because of the following informalities:
Claim 3, line 2, “at least one the respective first alignment holes” should be “at least one of the respective first alignment holes” (see claim 4, line 2 and claim 6, line 2).
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 3 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 3 requires “the respective first alignment holes are configured for alignment with the at least two second alignment holes of the cooler.” The first alignment holes are supported by element 10 and the second alignment are supported by element 14. No where does the originally filed application disclose that “the respective first alignment holes are configured for alignment with the at least two second alignment holes because there is no disclosure of a common pin being able to pass through pairs of first and second alignment holes. Figure 8 depicts first alignment hole 10 and second alignment hole 14 having different pins 26 and 27 so that “a relative position of the at least two first alignment holes with respect to the at least two second alignment holes is preset”.(page 15, lines 5-8). This rejection does not apply if the meaning of “configured for alignment” is that these holes are spaced apart from each other so that an alignment or set distance between the first and second alignment holes can be maintained. If this is the case,, is the “alignment” based upon a “line” can pass through “the respective first alignment holes” and at least one of “the at least two second alignment holes”?
Since the combination of the after-final amendments dated 4/15/26 and the further amendments filed on 5/19/26 have added “the pin fins are formed integrally with the base plate, a tip of each pin fin of the pin fins extends in a vertical direction facing away from the first main side to independent claims 1 and 2. The amendment atter non-final action, dated 2/4/26 previously added “a cooling structure comprising a plurality of pin fins at a first main side of a base plate.” The disclosure provides that the base plate is supported by element 2, the cooling structure is supported by element 3 and the fin pins are not labeled with a reference numeral.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4, 6, 15, 17, and 27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4, line 6 and Claim 2, line 14 each require “lateral directions.” Should the “lateral directions” of claim 5 have antecedence in claim 2?
Claim 6, line 4 and Claim 2, line 6 each require “a vertical direction.” Should the “vertical direction” of claim 6 have antecedence in claim 2?
Claim 15, line 5 and Claim 1, line 12 each require “lateral directions.” Should the “lateral directions” of claim 16 have antecedence in claim 1?
Claim 17, line 4 and Claim 1, line 12 each require “lateral directions.” Should the “lateral directions” of claim 17 have antecedence in claim 1?
Claim 17, line 4 requires “at least in regions” in two places. Should the second occurrence of “at least in regions” have antecedence in the first occurrence?
Claim 27 requires “the at least two power terminals include scratch marks of traces of an alignment process at a first side.” Are the “scratch marks of traces” the result of “an alignment process” being performed? Since claim 27 is based upon the power semiconductor module, and not the power semiconductor device as claim 2 requires, the scratch marks would not be present as the alignment process has yet to be performed. The power semiconductor module of claims 1 and 2 is a final product that is incorporated as an intermediate product into the power semiconductor device of claim 2. The “scratch marks of traces of an alignment process” appears to be “a product-by-process” limitation (see MPEP 2113) that the “scratch marks of traces” are not present until after the alignment process is performed when the power semiconductor module is incorporated into the power semiconductor device; and
Claim 27, lines 1-2 requires “a first side” and Claim 1, line 3 requires “a first main side.” Are these the same or different elements being claimed?
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 23 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 23 requires “the cooling structure and the base plate are formed integrally with each other” and Claim 1, lines 2-3 requires “a cooling structure comprising a plurality of pin fins . . . the pin fins are formed integrally with the base plate.” Claim 1 requires the pin fins of the cooling structure to be formed integrally with the base plat, so the added limitation of claim 23 does not further limit claim 1.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 5, 6, 16-18, 20, and 22-27 are rejected under 35 U.S.C. 102(a)(1) / 102(a)(2) as being anticipated by Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation).
With respect to Claim 1, Tsuyuno teaches a power semiconductor module (figs. 1 and 2), with at least one semiconductor chip (fig. 3, 155,156) being connected to a cooling structure (fig. 1, 800a; fig. 2, upper 800a) comprising a plurality of pin fins (fig. 2, upper 800a) at a first main side (fig. 2, upper side of upper 800) of a base plate (fig. 1, 800; fig. 2, upper 800), wherein the pin fins are formed integrally (see fig. 2) with the base plate, a tip (fig. 2, uppermost end of upper 800a) of each pin fin of the pin fins extends in a vertical direction (see fig. 2) facing away from the first main side, and the at least one semiconductor chip is arranged on the base plate at a second main side (fig. 2, lower side of upper 800) opposite the first main side, at least two power terminals (319B,320B) being in electrical contact (see fig. 3) to the at least one semiconductor chip, and a housing (301) for the at least one power semiconductor chip and the at least two power terminals, wherein each of the at least two power terminals has a respective protruding part (fig. 1, protruding portions of 319B,320B extending out of 301) protruding beyond (see fig. 1) the housing in a respective one of lateral directions (upper-left and lower-right directions of fig. 1), and each of the at least two protruding parts is provided with a respective first alignment hole (fig. 1, holes in 319B,320B) and at least one (319B) of the at least two protruding parts are provided on a first lateral side (fig. 1, upper-left side) of the power semiconductor module and at least another one (320B) of the at least two protruding parts are provided on a second lateral side (fig. 1, lower-right side) of the power semiconductor module being opposite the first lateral side.
With respect to Claim 2, Tsuyuno teaches a power semiconductor device (fig. 16B), comprising: at least one power semiconductor module (figs. 1 and 2, 300), comprising: at least one semiconductor chip (fig. 3, 155,156) being connected to a cooling structure (fig. 1, 800a; fig. 2, upper 800a) comprising a plurality of pin fins (fig. 2, upper 800a) at a first main side (fig. 2, upper side of upper 800) of a base plate (fig. 2, upper 800), wherein the pin fins are formed integrally (see fig. 2) with the base plate, a tip (fig. 2, uppermost end of upper 800a) of each pin fin of the pin fins extends in a vertical direction (see fig. 2) facing away from the first main side, and the at least one semiconductor chip is arranged on the base plate at a second main side fig. 2, lower side of upper 800) opposite the first main side, at least two power terminals (319B,320B) being in electrical contact (see fig. 3) to the at least one semiconductor chip, and a housing (301) for the at least one power semiconductor chip and the at least two power terminals, wherein each of the at least two power terminals has a respective protruding part (protruding portions of 319B,320B extending out of 301) protruding beyond (see fig. 1) the housing in a respective one of lateral directions (upper-left and lower-right directions of fig. 1), and each of the at least two protruding parts is provided with a respective first alignment hole (holes in 319B,320B), and at least one (319B) of the at least two protruding parts are provided on a first lateral side (fig. 1, upper-left side) of the power semiconductor module and at least another one (320B) of the at least two protruding parts are provided on a second lateral side (fig. 1, lower-right side) of the power semiconductor module being opposite the first lateral side; and a cooler (fig. 16, 600B) on which the at least one power semiconductor module is arranged (see fig. 16), wherein the cooler is provided with at least two second alignment holes (fig. 15(a), holes in corner of 600B).
With respect to Claims 5, 6, 16-18, 20, and 22-27, Tsuyuno further teaches the cooling structure is formed integrally (integrally is understood as forming a unit) with the cooler, or the cooler is provided with at least one opening (opening in 620 for pin-fins of three 800s in top row), and the at least one power semiconductor module is provided on (see fig. 16) one (opening in 620 for pin-fins of three 800s in top row) of the at least one opening such that the cooling structure protrudes into a cooling cavity (612) of the cooler (claim 5) and at least one of the respective first alignment holes has at least one side surface extending in a vertical direction (see fig. 15(a), and at least one of the at least two second alignment holes has at least one side surface extending in the vertical direction (see fig. 15(a)) (claim 6), the housing comprises a mold compound (fig. 7(b), 850) arranged on (see fig. 9(a)) the at least one power semiconductor chip, the at least two power terminals, and the base plate, and wherein the at least one semiconductor chip is encapsulated completely (see fig. 9(a)) by the mold compound and the base plate (claim 16), at least two auxiliary terminals (325C,325K,325L,325M,325S,325U) configured to provide electrical signals (col. 4, ll. 13-23) to the at least one semiconductor chip, wherein the at least two auxiliary terminals are embedded (see fig. 1) in the housing at least in regions and extend at least in regions in a vertical direction (see fig. 1, upward extending portions of 325C,325K,325L,325M,325S,325U) (claim 17), the cooler comprises an inlet port (fig. 16, 14 [written description at col. 16, ll. 55-56 describes 13 as inlet and 14 as outlet]) and an outlet port (fig. 16, 13), and wherein one (fig. 15, hole in upper-right corner) of the at least two second alignment holes is located in a region (right side of fig. 15(a)) of the inlet port and another one (fig. 15, hole in upper-left corner) of the at least two second alignment holes is located in a region (fig. 15, hole in upper-right corner) of the outlet port (claim 18), the cooler comprises a cooling cavity (fig. 16, inside of 600B) for receiving a cooling medium (col 18, l. 11), an inlet port (fig. 16, 14 [written description at col. 16, ll. 55-56 describes 13 as inlet and 14 as outlet]), and an outlet port (fig. 16, 13), and wherein the cooler is adapted for a flow direction (see flow arrows of fig. 16) of the cooling medium within the cooling cavity from the inlet port to the outlet port (claim 20), the pin fins include a same material (fig. 5, 800 which includes 800a is an integral structure made of aluminum [col. 8, l. 38]) as the base plate (claim 22), the cooling structure and the base plate are formed integrally with one another (the cooling structure is 800a the base plate is horizontal portion of 800 which are integrally formed, (see 35 USC 112d rejection above) (claim 23), the at least one semiconductor chip is based on silicon (col. 5, ll. 14-15) (claim 24) and a substrate (410,420,51,423) arranged on the base plate at the second main side, wherein the at least one semiconductor chip is directly disposed (see fig. 4) on the substrate (claim 25) the at least two power terminals comprise copper (col. 6, l. 4 for 320B; and col. 7 , ll. 60-61) (the claim does not require that “each of the at least two power terminals comprise copper”) (claim 26) and the at least two power terminals include scratch marks of traces of an alignment process at a first side (this is a product-by-process limitation where the structure of the process is considered to determine patentability. See MEP 2113, Since the process of alignment is not preformed until the power semiconductor module is assembled into the power semiconductor device, not “scratch marks of traces” would be present. See 35 USC 112b rejection above) (claim 27).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 4 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation) and Juncosa (US 6,309,601).
With respect to Claim 3, Tsuyuno discloses the claimed invention including the respective first alignment holes (holes in 319B,320B) are configured for alignment (the holes in 319B,320B are able [“configured to”] to be set to be a preset distance from holes in corners of 600B) in with the at least two second alignment holes (fig. 15(a), holes in corners of 600B) of the cooler (see 35 USC 112a rejection above for interpretation). Tsuyuno fails to disclose at least one [of] the respective first alignment holes has a shape being different to at least another one of the respective first alignment holes, wherein the different shapes facilitate alignment and positioning of the power semiconductor module, and wherein the respective first alignment holes are configured for alignment with the at least two second alignment holes of the cooler. Juncosa teaches at least one (fig. 5, 222, col. 9, ll. 49-50 circular) [of] the respective first alignment holes (222,224) has a shape (see fig. 5) being different to at least another one (224, col. 9, l. 50, slot) of the respective first alignment holes. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the first alignment holes of Tsuyuno with the first alignment holes of Juncosa for the purpose of that one of the first alignment holes indexes and another of the first alignment holes has latitude in the wide direction in slot 224 to compensate for manufacturing variations between the two in the distance between the first alignment holes and the corresponding holes of a mating part. While Juncosa fails to disclose a power semiconductor module, the combination of Tsuyuno and Juncosa substituting Juncosa for the first alignment holes of Tsuyuno teaches or suggests disclose a power semiconductor module having “at least one the respective first alignment holes has a shape being different to at least another one of the respective first alignment holes.”
With respect to Claim 4, Tsuyuno discloses the claimed invention including at least one (fig. 1, hole in 319B) of the respective first alignment holes has a circular shape, Tsuyuno fails to disclose at least another one of the respective first alignment holes has a slotted hole shape, the circular shape facilitates exact positioning in lateral directions and the slotted hole shape is configured for rotational positioning, and the slotted hole shape compensates for variations in a distance between the respective first alignment holes. Juncosa teaches at least one (fog. 5, 222) of the respective two first alignment holes (222,224) has a circular shape (col. 9, ll. 49-50), at least another one (224) of the respective first alignment holes has a slotted hole shape (col. 9, l. 50), the circular shape facilitates exact positioning in lateral directions and the slotted hole shape is configured for rotational positioning, and the slotted hole shape compensates for variations in a distance between the respective first alignment holes (Juncosa has the same structure of a circular and slotted holes as claimed, so the circular and slotted holes permit the exact and rotational positions as being claimed). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the first alignment holes of Tsuyuno with the first alignment holes of Juncosa for the purpose of that one of the first alignment holes indexes and another of the first alignment holes has latitude in the wide direction in slot 224 to compensate for manufacturing variations between the two in the distance between the first alignment holes and the corresponding holes of a mating part. While Juncosa fails to disclose a power semiconductor module, the combination of Tsuyuno and Juncosa substituting Juncosa for the first alignment holes of Tsuyuno teaches or suggests disclose a power semiconductor module having “at least one the respective first alignment holes has a shape being different to at least another one of the respective first alignment holes.”
Claim 15 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation) and Xu (WO 2019/041292, using US 11,127,659 as English translation).
Tsuyuno discloses the claimed invention except for at least one of the at least two power terminals has an additional hole configured for a screwed interconnection with an external busbar, and wherein dimensions in lateral directions of the additional hole are larger than dimensions in lateral directions of the respective first alignment hole of the at least one of the at least two power terminals having the additional hole. Xu teaches at least one (fig. 5, 116) of the at least two power terminals has an additional hole (one of 1161s) configured for a screwed interconnection (col. 7, ll. 6-7) with an external busbar (fig. 3, 114) (“for a screwed interconnection with an external busbar” is intended use and is not positively claimed; further there is not requirement that even if positively claimed that the screwed interconnection uses the additional hole to provide an electrical connection between the protruding portion and the external busbar), wherein dimensions (dimensions of the one of 1161s) in lateral directions of the additional hole are larger (col. 6, l. 51) than dimensions (dimensions of one of 1162s) in lateral directions of the respective first alignment hole (the one of 1162s) of the at least one of the at least two power terminals having the additional hole. It would be obvious to modify the module of Tsuyuno with the additional hole of Xu for the purpose of allowing interconnection of a protruding portion to an external bus bar when there are stacked power terminals without shorting these power terminals.
Alternately, Tsuyuno discloses the claimed invention except for at least one of the at least two power terminals has an additional hole configured for a screwed interconnection with an external busbar, and wherein dimensions in lateral directions of the additional hole are larger than dimensions in lateral directions of the respective first alignment hole of the at least one of the at least two power terminals having the additional hole. Xu teaches at least one (fig. 6A, 137) of the at least two power terminals has an additional hole (one of holes in 137) configured for a screwed interconnection with an external busbar (“for a screwed interconnection with an external busbar” is intended use and is not positively claimed) and the first alignment hole (fig. 6A, another of holes in 137). It would be obvious to modify the module of Tsuyuno with the additional hole of Xu for the purpose of allowing interconnection of a protruding portion to an external bus bar when there are stacked power terminals without shorting these power terminals. Tsuyuno and Xu fail to disclose dimensions in lateral directions of the additional hole are larger than dimensions in lateral directions of the respective first alignment hole of the at least one of the at least two power terminals having the additional hole. It would have been an obvious matter of choice to the size of one of the first alignment hole and the additional hole so that the additional hole is larger than the alignment hole so that a fastener of a size to fit in the additional hole cannot fit into the alignment hole, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim 19 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation) and Tsuyuno (US 2019/0157185).
Tsuyuno ‘463 discloses the claimed invention including a seal (fig. 10, 650 and col. 13, l. 9, “Adhesion . . . using resin”) is arranged between the cooler (fig. 16, 600B) and the at least one power semiconductor module (300,800), and wherein the seal comprises a material (material of 650) being impermeable to a cooling medium (col 18, l. 11). Tsuyuno fails to disclose a flexible material. Tsuyuno ‘185 discloses a flexible (¶[0062, ll. 1-3, 2 MPa is flexible silicon resin) material (901) as a seal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tsuyuno ‘463 with the flexible seal of Tsuyuno ‘185 for the purpose of allow the compression of the flexible seal to seal and prevent cooling medium from passing between Tsuyuno ‘463’s cooler and the at power semiconductor module to prevent any loss of the cooling medium.
Claim 21 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation) and Tsuyuno (WO 2019/142545, using US 11,367,671 as English translation).
Tsuyuno ‘463 discloses the claimed invention including the base plate comprises aluminum (col. 8, l. 48). Tsuyuno ‘463 fails to disclose the base plate comprises copper. Tsuyuno ‘545 teaches the base plate comprises copper (col. 4, l. 28) as an alternative to aluminum. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the copper of Tsuyuno ‘545 for the aluminum of Tsuyuno ‘463 for the purpose of using a good thermal conductive material that is the same as mating parts so that is no difference in thermal expansion between the base plate and mating components in order prevent warpage (Tsuyuno ‘463, col. 8, ll. 39-43).
Claim 27 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Tsuyuno (WO 2020/105463, using US 11,961,780 as English translation) and Kornrumpf (US 2006/0027536).
Tsuyuno discloses the claimed invention except for the at least two power terminals include scratch marks of traces of an alignment process at a first side. Kornrumpf teaches scratch marks (¶[0039], l. 11) of traces of an alignment process. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the modify the power semiconductor module of Tsuyuno with the scratch mark of Kornrumpf for the purpose of providing “a mechanical indentation in one of the elements to be connected” (¶[0039], ll. 12-13) to providing a visual mark to aid in the alignment process. Kornrumpf fails to disclose the at least two power terminals include scratch marks of traces of an alignment process at a first side. The combination of Tsuyuno and Kornrumpf would have the scratch marks of traces of Kornrumpf on the power terminals of Tsuyuno. It would have been an obvious matter of choice for the “scratch marks of traces” to be on any side including the first side where the visual indicators can be seen to assist in the alignment process, since applicant has not disclosed that having the “scratch marks of traces” specifically on the first side solves any stated problem or is for any particular purpose and it appears that the invention would perform equally well with the “scratch marks of traces” on any side. (Note that the claimed “a first side” does not have antecedence in any element previously claimed. Also “a first side” does not specify what the first side is a first side of).
Conclusion
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RJH 6/7/2026
/ROBERT J HOFFBERG/
Primary Examiner, Art Unit 2835
Prosecution Insights