Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 16 – 17, 20 – 23 are rejected under 35 U.S.C. 103 as being unpatentable over Schulze (Pub. No. 20210265484 A1), hereinafter Schulze, in view of Schulze.
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Regarding Independent Claim 16 (New), Schulze teaches a compound semiconductor layered structure comprising:
i. a silicon carbide semiconductor substrate ( Schulze, FIG. 2, 130, silicon carbide substrate (130) ) having a bottom surface ( Schulze, FIG. 2, 132 ) and a top surface ( Schulze, FIG. 2, 131 ); and
ii. a silicon carbide semiconductor film ( Schulze, FIG. 2, 101, 102; [0057], a first layer (101) of silicon carbide (e.g., of epitaxial silicon carbide) supported by a silicon carbide substrate (130); providing a second layer (102) of epitaxial silicon carbide on the first layer (101) ) on top of said silicon carbide semiconductor substrate ( Schulze, FIG. 2, 130 ), said silicon carbide semiconductor film ( Schulze, FIG. 2, 101, 102 ) comprising a nonporous bottom layer, a porous core ( Schulze, FIG. 2, 130, 101, FIG. 8, void density 301/302 in 101 is larger than 0; FIG. 15, pore density 801/802 in 101 is larger than 0 ; [0093], The current density can set the pore density (sometimes also referred to as porosity) of the porous layer; [0110], The interface layer 101 includes cavities. For example, the interface layer 101 may be a porous layer or may include voids ), and a nonporous top layer ( Schulze, FIG. 2, 102, FIG. 8, void density in 102 is 0; FIG. 15, pore density in 102 is 0; [0118], the device layer 102 may be facilitated by a high-quality epitaxial growth process … All this facilitates a morphology of the device layer 102 that supports low defect densities; [0155], FIG. 8 illustrates aspects with respect to the void density as a function of the vertical position; [0178], In some examples, this is used to prepare multiple sublayers of the interface layer 102 having different pore densities and/or pore sizes; [0179], FIG. 15 illustrates aspects with respect to the pore density as a function of the vertical position ), whereby said bottom layer of said silicon carbide semiconductor film is in direct contact with said top surface of said silicon carbide semiconductor substrate ( Schulze, FIG. 2, 130 ).
Schulze fails to directly disclose:
ii. a silicon carbide semiconductor film on top of said silicon carbide semiconductor substrate comprising a nonporous bottom layer,
whereby said bottom layer of said silicon carbide semiconductor film is in direct contact with said top surface of said silicon carbide semiconductor substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to duplicate the 102/101 structure ( Schulze , [0121], in other examples (not shown in FIG. 2), the front side carrier 106 may be removed ) in Schulze’s FIG. 2, and bond duplicated 101 with the original 110; and then bond duplicated 102 with the original 130 substrate, to create:
ii. a silicon carbide semiconductor film ( original 102/101 + duplicated 101/102 ) on top of said silicon carbide semiconductor substrate ( 130 ) comprising a nonporous bottom layer ( duplicated 102 ),
whereby said bottom layer ( duplicated 102 ) of said silicon carbide semiconductor film is in direct contact with said top surface of said silicon carbide semiconductor substrate ( 130 ), since this is within the skill level of one in the art.
Regarding Claim 17 (New), Schulze teaches the compound semiconductor layered structure as claimed in claim 16, on which this claim is dependent, Schulze further teaches:
wherein said silicon carbide semiconductor substrate comprises a polycrystalline material ( Schulze, [0035], crystalline SiC for high charge carrier mobility; [0048], For example, it would be possible that the substrate, the interface layer, and the device layer all include SiC in crystalline form ).
Regarding Claim 20 (New), Schulze teaches the compound semiconductor layered structure as claimed in claim 16, on which this claim is dependent, Schulze further teaches:
wherein said bottom layer and/or said top layer of said silicon carbide semiconductor film have a thickness of at least 10 nm and at most 250 nm ( Schulze, [0185], A thickness 101-2A can be in the range of 0.2 μm to 20 μm ); however, Schulze does not explicitly disclose that wherein said bottom layer and/or said top layer of said silicon carbide semiconductor film have a thickness of at least 10 nm and at most 250 nm. However, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above to optimize the teaching of Schulze ( thickness of 0.2 μm ) to have thickness of 10 – 250 nm. Furthermore, “ [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. ” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Regarding Claim 21 (New), Schulze teaches the compound semiconductor layered structure as claimed in claim 16, on which this claim is dependent, Schulze further teaches:
wherein said silicon carbide semiconductor film has a thickness of 0.5 μm to 40 μm ( Schulze, [0034], For example, the thickness of the drain region may be in the range of … or in the range of at least 10 μm to at most 100 μm; [0045], a thickness of the interface layer, may be in the range of at least 1 μm, for example at least 2 μm or for example at least 5 μm … It is possible that the thickness of the interface layer is at most 50% of the thickness of the device layer, optionally at most 20% of the thickness of the device layer, further optionally at most 5% of the thickness of the device layer ).
Regarding Claim 22 (New), Schulze teaches the compound semiconductor layered structure as claimed in claim 16, on which this claim is dependent, Schulze further teaches:
further comprising a semiconductor overlayer ( Schulze, FIG. 2, 102, 106; [0057], providing a second layer (102) of epitaxial silicon carbide on the first layer (101); [0121], a front side carrier 106 is attached to the device layer 102 ) having a bottom surface layer and a top surface layer, whereby said bottom surface layer of said semiconductor overlayer ( Schulze, FIG. 2, 102, 106 ) is in direct contact with said top layer of said silicon carbide semiconductor film ( Schulze, FIG. 2, 101, 102 ) .
Regarding Claim 23 (New), Schulze teaches the compound semiconductor layered structure as claimed in claim 22, on which this claim is dependent, Schulze further teaches:
wherein said semiconductor overlayer comprises one or more materials selected from the group consisting of gallium arsenide, gallium nitride ( Schulze, [0031], Wide band-gap semiconductor materials such as SiC or gallium nitride (GaN) ), silicon germanium, and silicon carbide ( [Schulze, [0057], providing a second layer (102) of epitaxial silicon carbide on the first layer (101) ).
Claims 18 – 19 are rejected under 35 U.S.C. 103 as being unpatentable over Schulze, in view of Leitgeb ( Markus Leitgeb et al 2017 J. Electrochem. Soc. 164 E337 ), hereinafter Leitgeb.
Regarding Claim 18 (New), Schulze teaches the compound semiconductor layered structure as claimed in claim 16, on which this claim is dependent,
Schulze fails to teach:
wherein said porous core has a porosity of 1 to 50%, as determined by SEM.
However, Leitgeb teaches:
wherein said porous core has a porosity of 1 to 50% ( Leitgeb, FIG. 9, Porosity ranging from 0.05 to 0.40, i.e. 5 % to 40 %; FIG. 11, Porosity ranging from 0.10 to 0.40, i.e. 10 % to 40 % ), as determined by SEM ( Leitgeb, Figure 10, SEM micrographs of a 4H-SiC sample with a bulk resistivity of 0.106 Ω · cm after PECE with corresponding black and white images obtained with image processing ).
Schulze and Leitgeb are both considered to be analogous to the claimed invention because they are forming silicon carbide layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schulze ( separation of porous/non-porous silicon carbide layers ), to incorporate the teachings of Leitgeb ( porous core has a porosity of 5 % to 40% ), to implement the porous/non-porous silicon carbide layers having porous core has a porosity of 1 to 50%. Doing so would provide specific porosity rate for the porous/non-porous silicon carbide layers, and therefore high quality bonding ( i.e. less cracking or void or pore ) of porous/non-porous silicon carbide layers can be implemented.
Regarding Claim 19 (New), Schulze and Leitgeb teach the compound semiconductor layered structure as claimed in claim 18, on which this claim is dependent, Leitgeb further teaches:
wherein said porous core has a porosity of at most 15% ( Leitgeb, FIG. 9, current density period transitions 6 [Wingdings font/0xE0] 7,8 and etching rate below 34 µm, Porosity ranging below 15 % ), as determined by SEM ( Leitgeb, Figure 10, SEM micrographs of a 4H-SiC sample ).
Claims 24, 26 – 27, 29 – 30 are rejected under 35 U.S.C. 103 as being unpatentable over Schulze, in view of Cockeram (Pub. No. 20180264770 A1), hereinafter Cockeram.
Regarding Independent Claim 24 (New), Schulze teaches process for preparing a compound semiconductor layered structure ( Schulze, FIG. 2, 130, 101, 102, 106; [0057], a first layer (101) of silicon carbide (e.g., of epitaxial silicon carbide) supported by a silicon carbide substrate (130); providing a second layer (102) of epitaxial silicon carbide on the first layer (101); [0121], in other examples (not shown in FIG. 2), the front side carrier 106 may be removed, e.g., at process step 2007 ), comprising the steps of:
i. providing (a) a silicon carbide semiconductor substrate ( Schulze, FIG. 2, 130 ) having a bottom surface ( Schulze, FIG. 2, 132 ) and a top surface ( Schulze, FIG. 2, 131 ), and (b) a silicon carbide semiconductor film (pre-2) having a porous bottom layer (pre-21), a porous core (pre-22) and a porous top layer (pre- 23) ( Schulze, Abstract, separating the substrate from the layer of epitaxial silicon carbide at the layer of porous silicon carbide; FIG. 2, 101, 102; FIG. 8, 101-1, 101-2, 102; FIG. 15, 101-1, 101-2, 102; [0065], a first sublayer (101-1) having a first void density (301) and further comprises a second sublayer (101-2) having a second void density (302); [0066], second layer (102); [0171], FIG. 13 schematically illustrates aspects with respect to the interface layer 102 comprising porous SiC; [0178], In some examples, this is used to prepare multiple sublayers of the interface layer 102 having different pore densities and/or pore sizes. A corresponding scenario is illustrated in FIG. 15 ) ( Schulze, [0050], The interface layer may be designed to provide various functionality. For example, the interface layer may be designed to suppress propagation of defects—such as stacking faults and/or dislocations—from the substrate into the device layer. Alternatively or additionally, the interface layer may be designed to enable separation of the substrate from the device layer to thereby facilitate reuse of the substrate in a further process of forming further semiconductor devices );
ii. bringing said bottom layer (pre-21) ( Schulze, FIG. 2, 101, 102 ) of said silicon carbide semiconductor film (pre-2) in direct contact with a top surface of said silicon carbide semiconductor substrate ( Schulze, FIG. 2, 130 );
iii. pressing said silicon carbide semiconductor film (pre-2) ( Schulze, FIG. 8, 101-1, 101-2, 102 ) and said silicon carbide semiconductor substrate ( Schulze, FIG. 2, 130 ) together at a pressure of 5 MPa to 100 MPa, and heating at a temperature between 1250°C and 1750°C under an inert atmosphere at a pressure of 0.5 MPa to 10 MPa.
Schulze fails to disclose:
ii. bringing said bottom layer (pre-21) of said silicon carbide semiconductor film (pre-2) in direct contact with a top surface of said silicon carbide semiconductor substrate;
iii. pressing said silicon carbide semiconductor film (pre-2) and said silicon carbide semiconductor substrate together at a pressure of 5 MPa to 100 MPa, and heating at a temperature between 1250°C and 1750°C under an inert atmosphere at a pressure of 0.5 MPa to 10 MPa.
However, Cockeram teaches:
ii. bringing said bottom layer (pre-21) of said silicon carbide semiconductor film (pre-2) in direct contact with ( Cockeram, [0004], Diffusion bonding is one method used for joining SiC to SiC; [0007], The hermetic bond includes a first layer of silicon carbide, a second layer of silicon carbide ) a top surface of said silicon carbide semiconductor;
iii. pressing said silicon carbide semiconductor film (pre-2) and said silicon carbide semiconductor substrate together at a pressure of 5 MPa to 100 MPa ( Cockeram, [0023], These ranges are exemplary only, however, as other … pressures between … 1.0 to 7.0 ksi ( i.e. 6.9 MPa and 48.3 MPa ), plus or minus 0.1 ksi, can be used without departing from the scope of the present subject matter; Table 3, Applied Pressure, 1.0 to 7.0 ksi ), and heating at a temperature between 1250°C and 1750°C ( Cockeram, [0023], These ranges are exemplary only, however, as other temperatures … between 1200° C. and 1600° C., plus or minus 20° C. … can be used without departing from the scope of the present subject matter; Table 3, Temperature, 1200° C. to 1600° C. ) under an inert atmosphere ( Cockeram, Table 3, Processing Atmosphere, Inert Atmosphere (Helium or Argon); claim 4, further comprising the step of placing the iridium foil and SiC layers in an inert atmosphere ) at a pressure of 0.5 MPa to 10 MPa.
Schulze and Cockeram are both considered to be analogous to the claimed invention because they are forming silicon carbide layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schulze ( separation of porous/non-porous silicon carbide layers ), to incorporate the teachings of Cockeram ( bonding of silicon carbide layers ), to implement the bonding of silicon carbide layers having porous/non-porous structures. Doing so would provide specific pressure/temperature/environment parameters for the bonding process, and therefore high quality bonding ( i.e. less cracking or void or pore ) of porous/non-porous silicon carbide layers can be implemented.
Regarding Claim 26 (New), Schulze and Cockeram teach the process as claimed in claim 24, on which this claim is dependent, Schulze and Cockeram further teach:
whereby said porous silicon carbide semiconductor film ( Schulze, FIG. 8, 101-1, 101-2, 102 ) in contact with a semiconductor substrate ( Schulze, FIG. 2, 130 ) is subjected to a heat treatment at a temperature of 1450°C to 1650°C ( Cockeram, [0023], These ranges are exemplary only, however, as other temperatures … between 1200° C. and 1600° C., plus or minus 20° C. … can be used without departing from the scope of the present subject matter; Table 3, Temperature, 1200° C. to 1600° C. ).
Regarding Claim 27 (New), Schulze and Cockeram teach the process as claimed in claim 24, on which this claim is dependent, Cockeram further teaches:
whereby said inert atmosphere comprises helium or argon ( Cockeram, Table 3, Processing Atmosphere, Inert Atmosphere (Helium or Argon); claim 4, further comprising the step of placing the iridium foil and SiC layers in an inert atmosphere ).
Regarding Claim 29 (New), Schulze and Cockeram teach the process as claimed in claim 24, on which this claim is dependent, Schulze further teaches:
further comprising the step of growing an epitaxial semiconductor overlayer ( Schulze, FIG. 2, 102, 106; [0057], providing a second layer (102) of epitaxial silicon carbide on the first layer (101); [0121], a front side carrier 106 is attached to the device layer 102 ) on top of a silicon carbide semiconductor film ( Schulze, FIG. 2, 101, 102 ).
Regarding Claim 30 (New), Schulze and Cockeram teach the process as claimed in claim 24, on which this claim is dependent, Schulze further teaches:
Compound semiconductor layered structure ( Schulze, FIG. 2, 130, 101, 102, 106; [0057]; [0121] ) obtainable by the process according to claim 24.
Claims 25 is rejected under 35 U.S.C. 103 as being unpatentable over Schulze, in view of Cockeram, further in view of Augustine (Pub. No. 20060284167 A1), hereinafter Augustine.
Regarding Claim 25 (New), Schulze and Cockeram teach the process as claimed in claim 24, on which this claim is dependent,
Schulze and Cockeram fail to teach:
whereby said silicon carbide semiconductor substrate provided in step i. has a surface roughness of at most 10 nm, as determined by Atomic Force Microscopy (AFM).
However, Augustine teaches:
whereby said silicon carbide semiconductor substrate provided in step i. has a surface roughness of at most 10 nm ( Augustine, [0015], Also, polished surface may optionally have a root-mean-square surface roughness of 10 nm or less, preferably 5 nm or less; [0050], (for example, made from polycrystalline SiC) that may be polished in a polishing step 12 to a root-mean-square (RMS) roughness of 10 nm or less, preferably 5 nm or less ), as determined by Atomic Force Microscopy (AFM).
Schulze, Cockeram and Augustine are all considered to be analogous to the claimed invention because they are forming silicon carbide layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schulze and Cockeram ( separation and bonding of porous/non-porous silicon carbide layers ), to incorporate the teachings of Augustine ( surface roughness of silicon carbide layers is 10 nm or less), to improve the bonding of silicon carbide layers having porous/non-porous structures. Doing so would reduce threading dislocations between the silicon carbide substrate and bonded layers, and therefore high quality bonding ( i.e. less cracking or void or pore ) of porous/non-porous silicon carbide layers can be implemented.
Claims 28 is rejected under 35 U.S.C. 103 as being unpatentable over Schulze, in view of Cockeram, further in view of Leitgeb.
Regarding Claim 28 (New), Schulze and Cockeram teach the process as claimed in claim 24, on which this claim is dependent,
Schulze and Cockeram fail to teach:
whereby said silicon carbide semiconductor film (pre- 2) has a porous bottom layer (pre-21) having a porosity of 1 to 50%, as determined by SEM, a porous core (pre-22) having a porosity of 1.1 to 20%, as determined by SEM and a porous top layer (pre-23) having a porosity of 1 to 50%, as determined by SEM, and whereby the ratio of porosity of said porous bottom layer (pre-21) to the porosity of said porous core (pre-22) is at least 1.1.
However, Leitgeb teaches:
whereby said silicon carbide semiconductor film (pre- 2) has a porous bottom layer (pre-21) having a porosity of 1 to 50%, as determined by SEM, a porous core (pre-22) having a porosity of 1.1 to 20%, as determined by SEM and a porous top layer (pre-23) having a porosity of 1 to 50%, as determined by SEM, and whereby the ratio of porosity of said porous bottom layer (pre-21) to the porosity of said porous core (pre-22) is at least 1.1 ( Leitgeb, FIG. 9, Porosity ranging from 0.05 to 0.40, i.e. 5 % to 40 %; FIG. 11, Porosity ranging from 0.10 to 0.40, i.e. 10 % to 40 %; FIG. 15, Porosity ranging from 1 % to 45 % ). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above to optimize the teaching of Leitgeb ( Porosity ranging 5 % to 40 %, or 10 % to 40 %, or 1 % to 45 % ) to have porosity of 1 to 50%, or 1.1 to 20%, for porous bottom or core or top layers. Furthermore, “ [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. ” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Da-Wei Lee whose telephone number is 703-756-1792. The examiner can normally be reached M -̶ F 8:00 am -̶ 6:00 pm.
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/DA-WEI LEE/Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817