DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-2 and 4-18 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-17 and 19-20 of copending Application No. 18/689,927. Although the claims at issue are not identical, they are not patentably distinct from each other because of the reasons cited below.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Current Application #: 18/278,480
Copending Application #: 18/689,927
Claim 1 recites “A light-emitting device comprising: a bank provided with a through-hole including an opening sidewall, the opening sidewall being inclined; a lower layer electrode formed on the bank, closing the through-hole; an upper layer electrode formed above the lower layer electrode; and an EL layer formed between the lower layer electrode and the upper layer electrode, adjacently to the lower layer electrode and the upper layer electrode, wherein the lower layer electrode is provided with an inclined face along at least a portion of the opening sidewall, the EL layer includes at least a light-emitting layer and is provided with an inclined face along at least a portion of the inclined face of the lower layer electrode, and the upper layer electrode is provided with an inclined face along at least a portion of the inclined face of the EL layer, and further comprising: a first refractive index layer having a refractive index higher than 1.7; and a second refractive index layer having a refractive index lower than the refractive index of the first refractive index layer, wherein the first refractive index layer and the second refractive index layer are formed in this order on the upper layer electrode at the through-hole.”
See claims 1 and 2;
Claim 2 recites “an angle formed by a lower face of the bank and the opening sidewall is equal to or greater than 20˚ and equal to or less than 30˚.”
See claim 3;
Claim 4 recites “an aperture diameter of the through-hole on a lower end side is equal to or greater than 10 µm and equal to or less than 20 µm.”
See claim 4;
Claim 5 recites “a height between an upper end and a lower end of the through-hole is equal to or greater than 1 µm and equal to or less than 4 µm.”
See claim 5;
Claim 6 recites “the light-emitting layer is a quantum dot light-emitting layer including a quantum dot.”
See claim 10;
Claim 7 recites “a plurality of subpixels, wherein the light-emitting device is a display device, and the bank includes at least one of the through-holes in each subpixel of the plurality of subpixels.”
See claim 11;
Claim 8 recites “the bank includes a plurality of the through-holes, each having a small hole shape, as the at least one through-hole in each subpixel of the plurality of subpixels.”
See claim 12;
Claim 9 recites “an array substrate including a plurality of thin film transistors; and a plurality of connection electrodes each formed on the array substrate for a corresponding one of the plurality of subpixels and connected to a corresponding one of the plurality of thin film transistors, wherein the bank is formed on the array substrate, covering the plurality of connection electrodes with the at least one through-hole exposing a portion of the plurality of connection electrodes, and the lower layer electrode is connected to the plurality of connection electrodes at the at least one through-hole.”
See claim 13;
Claim 10 recites “the plurality of subpixels include a red subpixel, a green subpixel, and a blue subpixel, the lower layer electrode includes at least a reflective electrode and a light-transmissive electrode formed on the reflective electrode, and in at least two subpixels of the red subpixel, the green subpixel, and the blue subpixel, layer thicknesses of the light-transmissive electrodes differ from each other.”
See claim 14;
Claim 11 recites “the lower layer electrode is formed into an island shape for each of the plurality of subpixels.”
See claim 15;
Claim 12 recites “an edge cover on the bank, the edge cover including a through-hole corresponding to the at least one through-hole of the bank, opening the at least one through-hole of the bank, wherein the edge cover covers a portion of the lower layer electrode positioned on an upper face of the bank.”
See claim 16;
Claim 13 recites “the lower layer electrode is formed into an island shape for each of the at least one through-hole.”
See claim 17;
Claim 14 recites “the light-emitting device is a light-emitting element.”
See claim 1;
Claim 15 recites “the lower layer electrode is formed only in the at least one through-hole.”
See claim 19;
Claim 16 recites “the lower layer electrode is formed with an edge of the lower layer electrode positioned between an upper end and lower end of the opening sidewall.”
See claim 20;
Claim 17 recites “an edge cover on the bank, the edge cover including a through-hole with an opening end on the opening sidewall of the bank, wherein 1/3L<L’<2/3L, wherein L is a length of the opening sidewall of the bank and L’ is a length of a portion of the opening sidewall not covered with the edge cover.”
See claim 21;
Claim 18 recites “Alight-emitting device comprising: a bank provided with a through-hole including an opening sidewall, the opening sidewall being inclined; a lower layer electrode formed on the bank, closing the through-hole; an upper layer electrode formed above the lower layer electrode; and an EL layer formed between the lower layer electrode and the upper layer electrode, adjacently to the lower layer electrode and the upper layer electrode, wherein the lower layer electrode is provided with an inclined face along at least a portion of the opening sidewall, the EL layer includes at least a light-emitting layer and is provided with an inclined face along at least a portion of the inclined face of the lower layer electrode, the upper layer electrode is provided with an inclined face along at least a portion of the inclined face of the EL layer, and an angle formed by a lower face of the bank and the opening sidewall is equal to or greater than 20˚ and equal to or less than 30˚.”
See claims 1-3;
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELMITO BREVAL whose telephone number is (571)270-3099. The examiner can normally be reached M-Th~ 7:30-5:30.
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ELMITO BREVAL
Primary Examiner
Art Unit 2875
/ELMITO BREVAL/Primary Examiner, Art Unit 2875