DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
1. Acknowledgement is made of the amendment received on 4/23/2026. Claims 1-13, 15-17 & 20-32 are pending in this application. Claims 14 & 18-19 are cancelled. Claims 21-26 are withdrawn. Claims 30-32 are new.
Claims 1-13, 15-17 & 20-32 are examined in this Office Action.
Drawings
2. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, “a lower surface of the seed portion is smaller than an upper surface of the buffer portion” (claims 1 & 20) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Note: Fig. 27 shows buffer layer 2f instead of disclosed buffer portion 2p.
Claim Objections
3. The claims are objected because of the following reasons:
Re claim 2, lines 4-5: after “the first mask” & “the second mask” insert --portion--.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
4. Claims 1-13, 15-20, 27 and 28 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In particular, claim 1, lines 4-5, cites “a mark portion located in a layer above a first part of the buffer portion and comprising a mark portion” is not clear, because “a mark portion” is twice claimed.
Claim 1 cites the limitation "the mask pattern" in line 9. There is insufficient antecedent basis for this limitation in the claim.
Further, claim 1, line 11-12, cites “a lower surface of the seed portion is smaller than an upper surface of the buffer portion” is not clear. According to the disclosure, 2p named as a buffer portion and 3 named a seed portion, they are similar or same size, shown in Fig. 25-26. Fig. 27 does not show buffer portion 2p, instead it shows buffer layer 2f which is not presented in claim. The claim is not consistent with the disclosure of the present invention.
Similar above reasons applied to claim 20.
Claims 6, 7, 9, 13 & 27 each cites “the mask portion” is not clear when reading into claim 1, because two “mask portion” claimed.
Claim 10 cites the limitation "the main substrate" in line 2. There is insufficient antecedent basis for this limitation in the claim.
Claims 2-13, 15-17 & 27-28 are rejected as being dependent on claims 1 & 20.
Applicant is suggested to revise and clarify the claim(s) to avoid any further confusions.
For best understanding and examination purpose, the claim(s) will be best considered based on drawings, disclosure, and/or any applicable prior arts.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 1-3, 6, 9-13, 15, 17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Motoki et al. (US 2004/0072410).
Re claim 1, Motoki teaches, under BRI, Figs. 6A-D & 7, [0084-0087], a semiconductor substrate comprising:
-a support substrate (2);
-a mask portion (portion of mask layer 8) located in a layer above a first part of the support substrate (2) and comprising a mask portion (portion of 8);
-a seed portion (24) located in a layer above a second part of the support substrate (2) in a plan view; and
-a semiconductor part (GaN 26) including a GaN-based semiconductor and disposed in a layer above the mask pattern (8) in a manner that the semiconductor part (26) is in contact with the seed portion (24), wherein
-a lower surface of the seed portion (24) is smaller than an upper surface of the support substrate (2).
PNG
media_image1.png
195
423
media_image1.png
Greyscale
Motoki’s Fig. 6 teaches the seed portion (24) between the mask portion (8) above the support substrate (2), but does not explicitly teach a buffer portion located in layer above the support substrate, the mark portion located in a layer above a first part of the buffer portion, and the seed portion located in a layer above a second part of the buffer portion, wherein a lower surface of the seed portion is smaller than an upper surface of the buffer portion.
Motoki’s Fig. 1C, [0060, 0071, 0073], teaches a buffer portion (portion of buffer layer 4 covering substrate 2) located in layer above the support substrate (2), the mark portion (8) located in a layer above a first part of the buffer portion, and the seed portion (consider portion of 12 between portions of mask 8) located in a layer above a second part of the buffer portion (4), wherein a lower surface of the seed portion (of 12) is smaller than an upper surface of the buffer portion (4).
PNG
media_image2.png
236
409
media_image2.png
Greyscale
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Motoki’s Fig. 1C to obtain a buffer layer & a lower surface of the seed portion is smaller than an upper surface of the buffer portion as claimed, because it aids in reducing internal stress/cracks and preventing warpage in the formed device.
Re claim 2, Motoki teaches, Figs. 6A-B, wherein the mask portion (8) comprises a first mark portion and a second mark portion (left and right of 8) that are adjacent to each other, and an opening (window 10) located between the first mask and the second mask (left & right of 8), and the seed portion (24) is locally disposed to overlap the opening (10) in the plan view.
Re claim 3, Motoki teaches, Figs. 6B & 7, [0086], wherein the opening (window 10) has a longitudinal shape in which a first direction (vertical or y-axis) is a width direction and a second direction is a longitudinal direction (z-axis), and the seed portion (24) has a longitudinal shape (based on shape of 10) (Fig. 7).
Re claim 6, Motoki teaches, Fig. 6B, wherein a distance between a lower surface of the support substrate (e.g., bottom surface of 2) and an upper surface of the seed portion (e.g., upper surface of 24) is equal to or less than a distance between the lower surface of the support substrate (bottom surface of 2) and an upper surface of the mask portion (e.g., upper surface of 8).
Re claim 9, Motoki’s Figs. 6 & 7, does not explicitly teach wherein the mask pattern has no opening overlapping the semiconductor part in the plan view.
Motoki’s Fig. 1C teaches, [0189, 0191], the mask pattern (consider layer 6) has no opening overlapping the semiconductor part (12) in the plan view.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Motoki to obtain the mask pattern has no opening overlapping the semiconductor part in the plan view as claimed, because it aids in achieving desired structure of a mask layer at reduced step(s).
Re claim 10, in combination cited above, Motoki’s Fig. 1C teaches wherein the buffer portion (4) located above a part of the main substrate (2) in the plan view.
Re claims 11 & 12, in combination cited above, Motoki teaches, Fig. 1C, wherein the buffer portion (4) is in contact with an upper surface of the support substrate (2); and wherein the buffer portion (4) comprises SiC and/or AlN (e.g., made of AlN, [0081]).
Re claim 13, Motoki teaches wherein the mask portion comprises a thermal oxide film (e.g., SiO2) [0017] or a nitride film composed of one or more kinds of atoms included in the support substrate and oxygen atoms or nitrogen atoms.
Re claim 15, Motoki teaches, Fig. 6C, wherein the semiconductor part (26) comprises an edge (formed on a side surface of right mask 8) located between a center of mask portion (left right 8) and seed portion (middle 24) (in horizontal direction).
Re claim 17, Motoki teaches, Fig. 6B, wherein the seed portion (24) and the opening (10) are aligned with each other in the plan view.
Re claim 20, Motoki teaches, under BRI, Figs. 6A-D, [0084-0086], a template substrate comprising:
-a support substrate (2),
-a mask portion (portion of mask layer 8) located in a layer above a first part of the support substrate (2) and comprising a mask portion (portion of 8); and
a seed portion (24) disposed in a layer above a second part of the support substrate (2) in a plan view, wherein
a distance between a lower surface of the support substrate (e.g., bottom surface of 2) and an upper surface of the seed portion (e.g., upper surface of 24) is equal to or less than a distance between the lower surface of the support substrate (bottom surface of 2) and an upper surface of the mask portion (e.g., upper surface of 8) (Fig. 6B).
PNG
media_image3.png
385
435
media_image3.png
Greyscale
Motoki’s Fig. 6 teaches the seed portion (24) between the mask portion (8) above the support substrate (2), but does not explicitly teach a buffer portion located in layer above the support substrate, the mark portion located in a layer above a first part of the buffer portion, and the seed portion located in a layer above a second part of the buffer portion, wherein a lower surface of the seed portion is smaller than an upper surface of the buffer portion.
Motoki’s Fig. 1C, [0060, 0071, 0073], teaches a buffer portion (portion of buffer layer 4 covering substrate 2) located in layer above the support substrate (2), the mark portion (8) located in a layer above a first part of the buffer portion, and the seed portion (consider portion of 12 between portions of mask 8) located in a layer above a second part of the buffer portion (4), wherein a lower surface of the seed portion (of 12) is smaller than an upper surface of the buffer portion (4).
PNG
media_image2.png
236
409
media_image2.png
Greyscale
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Motoki’s Fig. 1C to obtain a buffer layer & a lower surface of the seed portion is smaller than an upper surface of the buffer portion as claimed, because it aids in reducing internal stress/cracks and preventing warpage in the formed device.
6. Claims 4, 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Motoki in view of Okagawa et al. (JP 2007-317752).
The teachings of Motoki have been discussed above.
Re claim 4, Motoki does not teach wherein the support substrate comprises a recessed portion that opens upward, the opening overlaps the recessed portion in the plan view, and the seed portion overlaps the recessed portion and the opening in the plan view.
Okagawa teaches, Fig. 1, [0017], the support substrate (1) comprises a recessed portion (defined by left & right pillars of 1) that opens upward, the opening (defined by upper 2) overlaps the recessed portion in the plan view, and the seed portion (consider lower 2) overlaps the recessed portion and the opening in the plan view.
As taught by Okagawa, one of ordinary skill in the art would utilize & modify the above teaching to obtain the support substrate including a recessed portion that opens upward, the opening overlaps the recessed portion in the plan view, and the seed portion overlaps the recessed portion and the opening in the plan view as claimed, because it aids in preventing curvature in the formed baseplate.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Okagawa in combination with Motoki due to above reason.
Re claim 7, in combination cited above, Okagawa teaches, Fig. 1, wherein a distance between a lower surface of the support substrate (e.g., lower surface of 1) and an upper surface of the seed portion (e.g., upper surface of 3b) is greater than a distance between the lower surface of the support substrate (lower surface of 1) and an upper surface of the mask portion (e.g., upper surface of upper 2).
Re claim 8, in combination cited above, Okagawa teaches, Fig. 1, wherein the recessed portion (defined by left right pillars of 1) has a shape in which the second direction is the longitudinal direction (see Motoki’s teaching in claim 3).
7. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki as modified by Okagawa as applied to claims 1-4 above, and further in view of Dasgupta et al. (US 2015/0206796).
The teachings of Motoki/Okagawa have been discussed above.
Re claim 5, Motoki/Okagawa does not teach wherein the seed portion has a recessed shape in a cross-sectional view.
Dasgupta teaches, Fig. 2M, the seed portion (271) has a recessed shape in a cross-sectional view.
As taught by Dasgupta, one of ordinary skill in the art would utilize & modify the above teaching to obtain the seed portion having a recessed shape in a cross-sectional view as claimed, because a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Dasgupta in combination with Motoki/ Okagawa due to above reason.
8. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki in view of Mori et al. (CN 111575796).
The teachings of Motoki have been discussed above.
Re claim 16, Motoki teaches wherein the seed portion comprises a GaN-based semiconductor (e.g., GaN buffer layer 101, [0179]).
Motoki teaches a growth method [0058], does not explicitly teach an oxygen content of the seed portion is greater than an oxygen content of the semiconductor part.
Mori teaches “the mixed oxygen amount is related to the growth temperature if GaN crystal” (page 9, 5th par.).
As taught by Mori, one of ordinary skill in the art would utilize & modify the above teaching to obtain an oxygen content of the seed portion is greater than an oxygen content of the semiconductor part as claimed, because oxygen amount in a layer/film depends growth temperature, and it aids in achieving high quality GaN crystals.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Mori in combination with Motoki due to above reason.
9. Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki in view of Yoji et al. (JP 2007-184433, English translation attached).
The teachings of Motoki have been discussed above.
Re claim 27, Motoki teaches, Fig. 6C, [0087], wherein the semiconductor part (26) includes a low defect portion (e.g., reduced crystal defects) overlapping the mask portion (8)
Motoki does not explicitly teach the low defect portion has a non-threading dislocation density in a cross section parallel to a thickness direction and a threading dislocation density in an upper surface; and the non-threading dislocation density is greater than the threading dislocation density.
Yoji teaches, abstract & page 11, last par., “threading dislocations propagating from a portion where semiconductor layers grown in the lateral direction meet to the semiconductor surface can be suppressed, and the number of crystal defects on the semiconductor surface can be reduced”.
As taught by Yoji, one of ordinary skill in the art would utilize & modify the above teaching to obtain the low defect portion having a non-threading dislocation density in a cross section parallel to a thickness direction and a threading dislocation density in an upper surface; and the non-threading dislocation density is greater than the threading dislocation density as claimed, because it aids in achieving a semiconductor multilayer structure capable of suppressing dislocations generated from a portion where laterally grown semiconductor layers meet & a semiconductor element formed thereon.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Yoji in combination with Motoki due to above reason.
10. Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki in view of Okagawa et al. (JP 2007-317752).
The teachings of Motoki have been discussed above.
Re claim 28, Motoki does not teach wherein an aspect ratio of the semiconductor part is equal to or greater than 3.5, the aspect ratio is a ratio of the size in a width direction to the thickness.
Okagawa teaches, in view of Fig. 4d, wherein an aspect ratio of the semiconductor part (3b) is equal to or greater than 3.5, the aspect ratio is a ratio of the size in a width direction (left to right of 3b) to the thickness (bottom to top of 3b).
As taught by Okagawa, one of ordinary skill in the art would utilize & modify the above teaching to obtain an aspect ratio of the semiconductor part is equal to or greater than 3.5, the aspect ratio is a ratio of the size in a width direction to the thickness as claimed, because a change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Okagawa in combination with Motoki due to above reason.
11. Claims 29-31 are rejected under 35 U.S.C. 103 as being unpatentable over Okagawa et al. (JP 2007-317752) in view of Motoki et al. (US 2004/0072410).
Re claim 29, Okagawa teaches, under BRI, Fig. 2, [0017-0018], a semiconductor substrate comprising:
-a main substrate (1);
-a buffer layer (2) located in a layer above the main substrate (1);
-a first seed portion (left 3a) located in a layer above a part of the buffer layer (2); and
-a first semiconductor part (GaN 3b and/or 3c) including a GaN-based semiconductor and contacting with the first seed portion (3a), wherein
the first seed portion (3a) has a shape in which a transverse direction is a width direction (e.g., left to right of 3a);
-a lower surface (lower side surface portion, indicated) of the first seed portion (3a) is smaller than an upper surface (topmost surface, indicated) of the buffer layer (2); and
the first semiconductor part (3b and/or 3c) has an edge located above the buffer layer (2).
PNG
media_image4.png
306
554
media_image4.png
Greyscale
Okagawa does not explicitly teach the seed portion has a longitudinal shape.
Motoki teaches, Figs. 6A-B & 7, [0086, 0190], the seed portion has a longitudinal shape (based on shape of 10 filled with buffer layer 24).
As taught by Motoki, one of ordinary skill in the art would utilize & modify the above teaching into Okagawa to obtain the seed portion has a longitudinal shape as claimed, because it aids in achieving a desired shape of a layer/film & achieving GaN substrate having a high crystal quality. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Motoki in combination with Okagawa due to above reason.
Re claim 30, Okagawa teaches, Figs. 3c & 6c, a second seed portion (right 3a) located in a layer above a part of the buffer layer (2); and
a second semiconductor part (right portion of 3b) including a GaN-based semiconductor and contacting with the second seed portion (3a), wherein the second semiconductor part (portion of 3b) has an edge located above the buffer layer (2), and
the first semiconductor part (left 3b) and the second semiconductor (right 3b) are not in contact each other.
Re claim 31, in combination cited above, Motoki teaches, Fig. 1A, wherein the buffer layer (4) is located on an entire of an upper surface of the main substrate (2).
12. Claim 32 is rejected under 35 U.S.C. 103 as being unpatentable over Okagawa as modified by Motoki as applied to claim 29 above, and further in view of Lim et al. (US 2015/0115379).
The teachings of Okagawa/Motoki have been discussed above.
Re claim 32, Okagawa/Motoki does not explicitly teach a thickness of the first seed portion is larger than a thickness of the buffer layer.
Lim teaches, Fig. 1, [0043], a thickness of the first seed portion (of 130, 30 nm) is larger than a thickness of the buffer layer (of 110, 5 nm).
As taught by Lim, one of ordinary skill in the art would utilize & modify the above teaching into Okagawa/Motoki to obtain a thickness of the first seed portion is larger than a thickness of the buffer layer as claimed, because it aids in improving the properties of the multilayers in the formed device. Further, a change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lim in combination Okawaga/Motoki due to above reason.
Response to Arguments
13. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
14. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DUY T NGUYEN/ Primary Examiner, Art Unit 2818 5/4/26
Prosecution Insights