DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Election/Restrictions
1. Applicant’s election without traverse of Group I, claims 1-20 & 27-29 in the reply filed on 12/18/2025 is acknowledged.
Specification
2. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
3. Claims 1-3, 6, 13, 15 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Motoki et al. (US 2004/0072410).
Re claim 1, Motoki teaches, under BRI, Figs. 6A-D & 7, [0084-0087], a semiconductor substrate comprising:
-a support substrate (2);
-a mask pattern (mask layer 8) located in a layer above the support substrate (2) and comprising a mask portion (portion of 8);
-a seed portion (24) located in a layer locally above the support substrate (2) in a plan view; and
-a semiconductor part (GaN 26) including a GaN-based semiconductor and disposed in a layer above the mask pattern (8) in a manner that the semiconductor part (26) is in contact with the seed portion (24).
PNG
media_image1.png
159
421
media_image1.png
Greyscale
PNG
media_image2.png
195
423
media_image2.png
Greyscale
Re claim 2, Motoki teaches, Fig. 6B, wherein the mask pattern (8) comprises an opening (window 10), and the seed portion (24) is locally disposed to overlap the opening in the plan view.
Re claim 3, Motoki teaches, Figs. 6B & 7, [0086], wherein the opening (window 10) has a longitudinal shape in which a first direction (vertical or y-axis) is a width direction and a second direction is a longitudinal direction (z-axis), and the seed portion (24) has a longitudinal shape (based on shape of 10) (Fig. 7).
Re claim 6, Motoki teaches, Fig. 6B, wherein a distance between a lower surface of the support substrate (e.g., bottom surface of 2) and an upper surface of the seed portion (e.g., upper surface of 24) is equal to or less than a distance between the lower surface of the support substrate (bottom surface of 2) and an upper surface of the mask portion (e.g., upper surface of 8).
Re claim 13, Motoki teaches wherein the mask portion comprises a thermal oxide film (e.g., SiO2) [0017] or a nitride film composed of one or more kinds of atoms included in the support substrate and oxygen atoms or nitrogen atoms.
Re claim 15, Motoki teaches, Fig. 6C, wherein the semiconductor part (26) comprises an edge (formed on a side surface of right mask 8) located between a center of mask portion (left right 8) and seed portion (middle 24) (in horizontal direction).
Re claim 17, Motoki teaches, Fig. 6B, wherein the seed portion (24) and the opening are aligned with each other in the plan view.
Re claim 18, Motoki teaches, [0003] a semiconductor device comprising: the semiconductor part (29) according to claim 1 (see claim 1 discussed above).
Re claim 19, Motoki teaches, [0003], an electronic device comprising: the semiconductor according to claim 18 (see claims 1 & 18 discussed above).
Re claim 20, Motoki teaches, under BRI, Figs. 6A-D, [0084-0086], a template substrate comprising a support substrate (2), and a mask pattern (mask layer 8) located in a layer above the support substrate (2) and comprising a mask portion (portion of 8) and an opening (window 10) (Fig. 6A), the template substrate comprising:
a seed portion (24) disposed in a layer locally above the support substrate (2) in a plan view, wherein
a distance between a lower surface of the support substrate (e.g., bottom surface of 2) and an upper surface of the seed portion (e.g., upper surface of 24) is equal to or less than a distance between the lower surface of the support substrate (bottom surface of 2) and an upper surface of the mask portion (e.g., upper surface of 8) (Fig. 6B).
PNG
media_image3.png
385
435
media_image3.png
Greyscale
4. Claims 1, 2, 10-13, 15, 20 and 28 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Okagawa et al. (JP 2007-317752, English translation provided with IDS 8/24/2023).
Re claim 1, Okagawa teaches, under BRI, Figs. 4a-d, [0035], a semiconductor substrate comprising:
-a support substrate (1);
-a mask pattern (mask M) located in a layer above the support substrate (1) and comprising a mask portion (portion of M);
-a seed portion (seed crystal section 3a) located in a layer locally above the support substrate (1) in a plan view; and
-a semiconductor part (section 3b consists of GaN crystal) including a GaN-based semiconductor and disposed in a layer above the mask pattern (M) in a manner that the semiconductor part (3b) is in contact with the seed portion (3a).
PNG
media_image4.png
169
499
media_image4.png
Greyscale
Re claim 2, Okagawa teaches, Figs. 4a-b, wherein the mask pattern (8) comprises an opening (between portions of M), and the see portion (3a) is locally disposed to overlap the opening in the plan view.
Re claim 10, Okagawa teaches, Fig. 4b, [0035], wherein a buffer portion (2) locally located in the plan view is provided between the support substrate (1) and the seed portion (3a).
Re claim 11, Okagawa teaches, Fig. 4d, [0025, 0035], a buffer layer (2) located in a layer below the seed portion (3a), wherein the buffer layer (2) is in contact with an upper surface of the support substrate (1).
Re claim 12, Okagawa teaches wherein the buffer layer comprises SiC and/or AlN (e.g., AlN, [0025]).
Re claim 13, Okagawa teaches wherein the mask portion comprises a thermal oxide film (e.g., silicon oxide) [0030] or a nitride film composed of one or more kinds of atoms included in the support substrate and oxygen atoms or nitrogen atoms.
Re claim 15, Okagawa teaches, Fig. 4c, wherein the semiconductor part (3b) comprises an edge (a right side of left 3b) located between a center of mask portion (left M) and seed portion (middle 3b) (in horizontal direction).
Re claim 28, Okagawa teaches, in view of Fig. 4d, wherein an aspect ration of the semiconductor part (3b) is equal to or greater than 3.5, the aspect ratio is a ratio of the size in a width direction (left to right of 3b) to the thickness (bottom to top of 3b).
Re claim 20, Okagawa teaches, under BRI, Figs. 4a-d, [0035], a template substrate comprising a support substrate (1), and a mask pattern (mask M) located in a layer above the support substrate (1) and comprising a mask portion (portion of M) and an opening (between M) (Fig. 4a), the template substrate comprising:
a seed portion (consider layer 2) disposed in a layer locally above the support substrate (1) in a plan view, wherein
a distance between a lower surface of the support substrate (e.g., bottom surface of 1) and an upper surface of the seed portion (e.g., upper surface of 2) is equal to or less than a distance between the lower surface of the support substrate (bottom surface of 1) and an upper surface of the mask portion (e.g., upper surface of M) (Fig. 4b).
PNG
media_image5.png
264
496
media_image5.png
Greyscale
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 4, 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Motoki in view of Okagawa et al. (JP 2007-317752).
The teachings of Motoki have been discussed above.
Re claim 4, Motoki does not teach wherein the support substrate comprises a recessed portion that opens upward, the opening overlaps the recessed portion in the plan view, and the seed portion overlaps the recessed portion and the opening in the plan view.
Okagawa teaches, Fig. 1, [0017], the support substrate (1) comprises a recessed portion (defined by left & right pillars of 1) that opens upward, the opening (defined by upper 2) overlaps the recessed portion in the plan view, and the seed portion (consider lower 2) overlaps the recessed portion and the opening in the plan view.
As taught by Okagawa, one of ordinary skill in the art would utilize & modify the above teaching to obtain the support substrate including a recessed portion that opens upward, the opening overlaps the recessed portion in the plan view, and the seed portion overlaps the recessed portion and the opening in the plan view as claimed, because it aids in preventing curvature in the formed baseplate.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Okagawa in combination with Motoki due to above reason.
Re claim 7, in combination cited above, Okagawa teaches, Fig. 1, wherein a distance between a lower surface of the support substrate (e.g., lower surface of 1) and an upper surface of the seed portion (e.g., upper surface of 3b) is greater than a distance between the lower surface of the support substrate (lower surface of 1) and an upper surface of the mask portion (e.g., upper surface of upper 2).
Re claim 8, in combination cited above, Okagawa teaches, Fig. 1, wherein the recessed portion (defined by left right pillars of 1) has a shape in which the second direction is the longitudinal direction (see Motoki’s teaching in claim 3).
6. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki as modified by Okagawa as applied to claims 1-4 above, and further in view of Dasgupta et al. (US 2015/0206796).
The teachings of Motoki/Okagawa have been discussed above.
Re claim 5, Motoki/Okagawa does not teach wherein the seed portion has a recessed shape in a cross-sectional view.
Dasgupta teaches, Fig. 2M, the seed portion (271) has a recessed shape in a cross-sectional view.
As taught by Dasgupta, one of ordinary skill in the art would utilize & modify the above teaching to obtain the seed portion having a recessed shape in a cross-sectional view as claimed, because a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Dasgupta in combination with Motoki/ Okagawa due to above reason.
7. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki.
The teachings of Motoki have been discussed above.
Re claim 9, Motoki’s Figs. 6 & 7, does not explicitly teach wherein the mask pattern has no opening overlapping the semiconductor part in the plan view.
Motoki’s Fig. 1C teaches, [0189, 0191], the mask pattern (consider layer 4) has no opening overlapping the semiconductor part (12) in the plan view.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Motoki to obtain the mask pattern has no opening overlapping the semiconductor part in the plan view as claimed, because it aids in achieving desired structure of a mask layer at reduced step(s).
8. Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Motoki in view of Yoji et al. (JP 2007-184433, English translation attached).
The teachings of Motoki have been discussed above.
Re claim 27, Motoki teaches, Fig. 6C, [0087], wherein the semiconductor part (26) includes a low defect portion (e.g., reduced crystal defects) overlapping the mask portion (8)
Motoki does not explicitly teach the low defect portion has a non-threading dislocation density in a cross section parallel to a thickness direction and a threading dislocation density in an upper surface; and the non-threading dislocation density is greater than the threading dislocation density.
Yoji teaches, abstract & page 11, last par., “threading dislocations propagating from a portion where semiconductor layers grown in the lateral direction meet to the semiconductor surface can be suppressed, and the number of crystal defects on the semiconductor surface can be reduced”
As taught by Yoji, one of ordinary skill in the art would utilize & modify the above teaching to obtain the low defect portion having a non-threading dislocation density in a cross section parallel to a thickness direction and a threading dislocation density in an upper surface; and the non-threading dislocation density is greater than the threading dislocation density as claimed, because it aids in achieving a semiconductor multilayer structure capable of suppressing dislocations generated from a portion where laterally grown semiconductor layers meet & a semiconductor element formed thereon.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Yoji in combination with Motoki due to above reason.
9. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Okagawa.
The teachings of Okagawa have been discussed above.
Re claim 14, Okagawa does not explicitly teach wherein the mask portion comprises a laminated structure comprising a silicon nitride and/or a silicon oxide film.
Okagawa does teach the use of silicon oxide, silicon nitride as mask [0030].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ & modify the teaching as taught by Okagawa to obtain the mask portion including a laminated structure comprising a silicon nitride and/or a silicon oxide film as claimed, because these materials are known and wildly used in the arts as mask materials. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
10. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Okagawa in view of Mori et al. (CN 111575796, English translation attached).
The teachings of Okagawa have been discussed above.
Re claim 16, Okagawa teaches wherein the seed portion (3a) comprises a GaN-based semiconductor [0018].
Okagawa teaches growth process [0018], but does not explicitly teach an oxygen content of the seed portion is greater than an oxygen content of the semiconductor part.
Mori teaches “the mixed oxygen amount is related to the growth temperature if GaN crystal” (page 9, 5th par.).
As taught by Mori, one of ordinary skill in the art would utilize & modify the above teaching to obtain an oxygen content of the seed portion is greater than an oxygen content of the semiconductor part as claimed, because oxygen amount in a layer/film depends growth temperature, and it aids in achieving high quality GaN crystals.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Mori in combination with Okagawa due to above reason.
11. Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Okagawa et al. (JP 2007-317752) in view of Motoki et al. (US 2004/0072410).
Re claim 29, Okagawa teaches, under BRI, Fig. 2, [0017-0018], a semiconductor substrate comprising:
-a main substrate (1);
-a buffer layer (2) located in a layer above the main substrate (1);
-a seed portion (3a) located in a layer locally above the buffer layer (2); and
-a semiconductor part (GaN 3b, c) including a GaN-based semiconductor and contacting with the seed portion (3a), wherein
the seed portion (3a) has a shape in which a transverse direction is a width direction (e.g., left to right of 3a);
the buffer layer (2) has a greater width than the seed portion (3a) (e.g., top width of 2 is greater than top width of 3) and contacts with an entire lower surface of the seed portion (3a); and
the semiconductor part (3b, c) has an edge located above the buffer layer (2).
PNG
media_image6.png
302
529
media_image6.png
Greyscale
Okagawa does not explicitly teach the seed portion has a longitudinal shape.
Motoki teaches, Figs. 6A-B & 7, [0086, 0190], the seed portion has a longitudinal shape (based on shape of 10 filled with buffer layer 24).
As taught by Motoki, one of ordinary skill in the art would utilize & modify the above teaching into Okagawa to obtain the seed portion has a longitudinal shape as claimed, because it aids in achieving a desired shape of a layer/film & achieving GaN substrate having a high crystal quality. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Motoki in combination with Okagawa due to above reason.
Conclusion
12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 2/11/26