Prosecution Insights
Last updated: April 19, 2026
Application No. 18/279,181

CRYSTALLOGRAPHIC- AND OXYNITRIDE-BASED SURFACE

Non-Final OA §103
Filed
Aug 28, 2023
Examiner
SEVEN, EVREN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tuan Anh Pham
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
82%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
532 granted / 723 resolved
+5.6% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
29 currently pending
Career history
752
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
51.9%
+11.9% vs TC avg
§102
23.1%
-16.9% vs TC avg
§112
20.3%
-19.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 723 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 8, 19-25 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. 20180358482 to Murase et al. (Murase) in view of “An investigation into the early stages of oxide growth on gallium nitride” by Wolter et al. (Wolter). Regarding Claim 1, Murase teaches in Figs. 4-5 at least, a method of fabricating a device, the method comprising: providing a substrate 101 of the device; forming a structure 102 of the device, the structure being supported by the substrate, having a semiconductor composition [0136], and comprising a surface (facing up on page), wherein nitrogen is present at the surface [0139]; and forming an oxynitride stabilizing layer 103 on the surface. Murase does not explicitly teach incorporating oxygen into the surface to form the stabilizing layer on the surface; wherein incorporating the oxygen is implemented such that the stabilizing layer comprises a uniform distribution of an oxynitride material. However, in analogous art, Wolter teaches throughout the formation of gallium oxynitride by introducing oxygen through thermal oxidation (Transmission electron microscopy revealed an overlayer approximately 1.5–3.0 nm thick with registry to the (0001) GaN after dry oxidation at 800°C for 1 h. Based on the data from X-ray photoelectron spectroscopy, this layer is believed to be a Ga(x+2)N3xO(3−3x) compound, abstract). It would have been obvious to the person of ordinary skill in the art before the time of filing to modify the passivation layer 103 formation of Murase as thermal oxidation is a far more energy efficient process than the plasma oxidation taught by Murase; and further avoids the steps of formation of an oxide layer to be converted to an oxynitride. Regarding Claim 2, Murase and Wolter teach the method of claim 1, wherein the stabilizing layer is configured as an activation layer (103 can be an activation layer). Regarding Claim 3, Murase and Wolter teach the method of claim 1, wherein the stabilizing layer is configured as a passivation layer (103 can be a passivation layer). Regarding Claim 4, Murase and Wolter teach the method of claim 1, wherein incorporating the oxygen comprises implementing an oxidation reaction to form the stabilizing layer (thermal oxidation). Regarding Claim 8, Murase and Wolter teach the method of claim 1, wherein incorporating the oxygen comprises annealing the surface (thermal oxidation is a high temp process which reads on annealing). Regarding Claim 19, Murase and Wolter teach the method of claim 1, wherein:the substrate comprises silicon; and the semiconductor composition of the structure comprises gallium nitride such that the oxynitride material is GaOxN1-x. (Wolter throughout) Regarding Claim 20, Murase and Wolter teach the method of claim 1, wherein the stabilizing layer has a thickness falling in a range from about one monolayer to a few monolayers (Murase teaches that the protective layer may be any desired thickness). Regarding Claims 21 and 22, Murase and Wolter teach the method of claim 1, but are silent regarding the surface being oriented along a polar non-polar plane of the semiconductor composition. However, the person of ordinary skill may account for polar or non-polar thermal oxidation. Regarding Claim 23, Murase and Wolter teach the method of claim 1, wherein the semiconductor composition is configured such that implementing the oxidation reaction results in partial oxygen substitution of the nitrogen (performed by thermal oxidation). Regarding Claim 24, Murase and Wolter teach the method of claim 1, wherein the semiconductor composition has a Wurtzite crystal structure (GaN is Wurtzite). Regarding Claim 25, Murase and Wolter teach the method of claim 1, wherein the nitrogen of the surface is disposed in a compound semiconductor arrangement of the semiconductor composition (GaN). Claims 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Murase and Wolter as applied to claim 1 above, and further in view of “III-nitride nanowires for solar light harvesting: A review” by Chatterjee et al. Regarding Claim 16, Murase and Wolter teach the method of claim 1, but do not explicitly teach forming the structure comprises forming an array of conductive projections supported by the substrate and extending outwardly from the substrate, the array of conductive projections comprising the structure. However, in analogous art, Chatterjee teaches throughout the formation of GaN nanopillars as the active structures usable for the electrolysis devices of Murase. It would have been obvious to the person of ordinary skill in the art before the time of filing to include the teaching of Chatterjee to provide an increased surface area for electrolysis based generation of hydrogen. Regarding Claim 16, Murase, Chatterjee and Wolter teach method of claim 16, wherein forming the array of conductive projections comprises implementing a molecular beam epitaxy (MBE) growth procedure such that each conductive projection of the array of conductive projections comprises a respective nanowire (Chatterjee, 1004). Allowable Subject Matter Claims 5-7, 9-15 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the cited prior art does not show these methods. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVREN SEVEN whose telephone number is (571)270-5666. The examiner can normally be reached Mon-Fri 8:00- 5:00 Pacific. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVREN SEVEN/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 28, 2023
Application Filed
Jan 27, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
82%
With Interview (+8.3%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 723 resolved cases by this examiner. Grant probability derived from career allow rate.

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