Prosecution Insights
Last updated: July 31, 2026
Application No. 18/279,305

DISPLAY PANEL AND DISPLAY APPARATUS

Final Rejection §103
Filed
Aug 29, 2023
Priority
Mar 29, 2021 — CN 202110334647.8 +1 more
Examiner
BLACKWELL, ASHLEY NICOLE
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE Technology Group Co., Ltd.
OA Round
2 (Final)
98%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 98% — above average
98%
Career Allowance Rate
60 granted / 61 resolved
+30.4% vs TC avg
Minimal +3% lift
Without
With
+2.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
31 currently pending
Career history
97
Total Applications
across all art units

Statute-Specific Performance

§103
92.0%
+52.0% vs TC avg
§102
5.2%
-34.8% vs TC avg
§112
2.8%
-37.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 61 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, see page 12, filed 02/03/2026, with respect to claims 14 and 16 have been fully considered and are persuasive. The objections of claims 14 and 16 have been withdrawn. Applicant's arguments filed 02/03/2026 have been fully considered but they are not persuasive. Applicant’s argument regarding claim 1, which states, “It can be further seen from FIG. 2C of Yamazaki, the TFT 18 connected to a light-emitting element 11 of a bottom emission type is located a light emission region of the sub-pixel 12, and the TFT 20 connected to a light-emitting element 13 of a top emission type is located another light emission region of the sub-pixel 14. That is, the TFT 18 connected to a light-emitting element 11 of a bottom emission type and the TFT 20 connected to a light-emitting element 13 of a top emission type are located different light emission regions, i.e., the bottom light emission region and the top light emission region, respectively. In contrast, in Applicant's claim 1, one of the pixel circuits corresponding to the first light emitting region comprises: m first pixel circuits, wherein each of the first pixel circuits is electrically connected to one of the top-emitting light emitting devices; and n second pixel circuits, wherein each of the second pixel circuits is electrically connected to one of the bottom-emitting light emitting devices; and light emitting devices on one side of the transparent substrate, comprising top-emitting light emitting devices in the first light emitting regions and bottom-emitting light emitting devices in the second light emitting regions. As such, Yamazaki at least fails to disclose the above limitations in claim 1 of the present disclosure.” The examiner disagrees because Yamazaki shows one of the pixel circuits (in 14 of Fig. 1B) corresponding to the first light emitting region (29) comprises: m first pixel circuits (19, 20, 13), wherein each of the first pixel circuits is electrically connected to one of the top-emitting light emitting devices (13); and n second pixel circuits (17, 11, 18), wherein each of the second pixel circuits (17, 11, 18) is electrically connected to one of the bottom-emitting light emitting devices (11); (Fig. 1B and 2B) The rejection is further explained below. The applicants second argument regarding the rejection of Claim 14 using Xiao, which states, “Xiao discloses: the TFT 31 connected to a bottom light-emitting element 30 is located a bottom light emission region, and the TFT 21 connected to a top light- emitting element 20 is located a top light emission region. That is, the TFT 31 connected to the bottom light-emitting element 30 and the TFT 21 connected to the top light-emitting element 20 are located different light emission regions, i.e., the bottom light emission region and the top light emission region, respectively. In contrast, in Applicant's claim 1, one of the pixel circuits corresponding to the first light emitting region comprises: m first pixel circuits, wherein each of the first pixel circuits is electrically connected to one of the top-emitting light emitting devices; and n second pixel circuits, wherein each of the second pixel circuits is electrically connected to one of the bottom-emitting light emitting devices; and light emitting devices on one side of the transparent substrate, comprising top-emitting light emitting devices in the first light emitting regions and bottom-emitting light emitting devices in the second light emitting regions. As such, Xiao at least fails to disclose the above limitations in claim 1 of the present disclosure.” This is persuasive because Xiao shows different regions having their respective pixel circuits in Fig. 3-5 and therefore the examiner withdraws the rejection of Xiao for claim 14 which the applicant has now canceled. After further search and consideration, the limitation is rejected using Kim et al. (US 20180005574 A1) which is described in further detail below. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 5, 9, 17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki (US 20150084029) in view of Kim et al. (US 20180005574 A1) and Lin et al. (US 20190035334 A1). Regarding claim 1, Yamazaki discloses a display panel ([0051]), comprising: a transparent substrate (33), comprising a display region (Fig. 2A), wherein the display region comprises a plurality of first light emitting regions (14) arranged in an array in a first direction (y) and a second direction (x), and a plurality of second light emitting regions (12) arranged in an array in the first direction (y) and the second direction (x), the first light emitting regions (14) and the second light emitting regions (12) are alternately arranged in a third direction (z/diagonal), the first direction (y) intersects with the second direction (x), and the third direction (z/diagonal) intersects with both the first direction (y) and the second direction (x); (Fig. 1A) light emitting devices (12/14) on one side of the transparent substrate (33), comprising top-emitting light emitting devices (14 per Fig. 2A-2C) in the first light emitting regions (14) and bottom-emitting light emitting devices (12 per Fig. 2A-2C) in the second light emitting regions (12); (Fig. 2A-2C) and driving circuits (18/20) in the first light emitting regions (14) and between a film layer in which the light emitting devices (11/13) are located and the transparent substrate (33), electrically connected to the light emitting devices (11/13), wherein the driving circuits (18/20) comprise a plurality of pixel circuits (18/20) of which a quantity (at least 2) is equal to a quantity (at least 2) of the first light emitting regions (12/14), and a plurality of signal lines (Gan/Gbn) electrically connected to the pixel circuits (18/20). (Fig. 1B) wherein each of the first light emitting regions (14) comprises m (at least 1) of the top-emitting light emitting devices (13), and each of the second light emitting regions (12) comprises n (at least 1) of the bottom-emitting light emitting devices (11), wherein m and n are both positive integers (1 is a positive integer); (Fig. 1-4B) Yamazaki does not disclose: And one of the pixel circuits corresponding to the first light emitting region comprises: m first pixel circuits, wherein each of the first pixel circuits is electrically connected to one of the top-emitting light emitting devices; and n second pixel circuits, wherein each of the second pixel circuits is electrically connected to one of the bottom-emitting light emitting devices; However, Kim discloses: And one of the pixel circuits (PC) corresponding to the first light emitting region (PA1) comprises: m first pixel circuits (PC1/T1), wherein each of the first pixel circuits (PC1/T1) is electrically connected to one of the top-emitting light emitting devices (in PA1); ([0060], Fig. 4 and 6) and n second pixel circuits (PC2/T2), wherein each of the second pixel circuits (PC2/T2) is electrically connected to one of the bottom-emitting light emitting devices (in PA2); (Fig. 6) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yamazaki and Kim to arrive at the claimed invention in order to have “an improved light transmittance in a transmission region” (Kim, [0006]) Yamazaki in view of Kim do not disclose: wherein the plurality of signal lines comprise: a plurality of gate drive signal lines extending in the second direction, wherein the first pixel circuit and the second pixel circuit in one same pixel circuit are arranged in the second direction, and the first pixel circuit and the second pixel circuit in the same pixel circuit share the gate drive signal line. However, Lin discloses: wherein the plurality of signal lines comprise: a plurality of gate drive signal lines (gate) extending in the second direction (x), wherein the first pixel circuit (100) and the second pixel circuit (100) in one same pixel circuit (A) are arranged in the second direction (x), and the first pixel circuit (100) and the second pixel circuit (100) in the same pixel circuit (A) share the gate drive signal line (gate). (Fig. 3) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yamazaki, Kim and Lin to arrive at the claimed in invention in order to “ reduces the number of gate lines Gate (the number of gate lines Gate is reduced, for example, to a half of the arrangement as shown in FIG. 2), thereby further increasing the aperture ratio of the display panel, reducing parasitic capacitance, and facilitating wiring and production of the display panel.” (Lin, [0056]) Regarding claim 2, Yamazaki discloses the display panel according to claim 1, wherein the top-emitting light emitting device (14) comprises: a first anode (42), comprising a reflective material (per [0044]); (Fig. 2B) a first light emitting layer (13) on one side of the first anode (42) facing away from the driving circuit (20); (Fig. 2B) and a first cathode (41 right) on one side of the first light emitting layer (13) facing away from the first anode (42), comprising a light transmitting material (per [0044]); (Fig. 2B) and the bottom-emitting light emitting device (12) comprises: a second anode (40), comprising a light transmitting material (per [0044]) and located in a same film layer as the first anode (42); (Fig. 2B) a second light emitting layer (11) on one side of the second anode (40) facing away from the driving circuit (18) and in the same film layer as the first light emitting layer (13); (Fig. 2B) a second cathode (41 right), comprising a light transmitting material (per [0044]), located on one side of the second light emitting layer (11) facing away from the second anode (40), and arranged in the same layer as the first cathode (41 right) to form an entire surface connected electrode (41); (Fig. 2B) and a third cathode (45) in the second light emitting region (12) and on one side of the second cathode (41 left) facing away from the second light emitting layer (11), comprising a reflective material (per [0046]). (Fig. 2B) Regarding claim 5, Yamazaki discloses the display panel according to claim 4, wherein types of light colors of the top-emitting light emitting devices (14) comprised in the first light emitting region (14) are the same as types of light colors of the bottom-emitting light emitting devices (12) comprised in the second light emitting region (12). ([0015], Fig. 2B) Regarding claim 9, Yamazaki discloses the display panel according to claim 1, wherein a quantity (7) of the top-emitting light emitting devices (14) comprised in each of the first light emitting regions (Fig. 2A) is different from a quantity (6) of the bottom-emitting light emitting devices (12) comprised in each of the second light emitting regions (12). (Fig. 2A) Regarding claim 17, Yamazaki discloses the display panel according to claim 1, wherein the first pixel circuit (20) has the same circuit composition as the second pixel circuit (18). (Fig. 2B) Regrading claim 20, Yamazaki discloses a display apparatus, comprising the display panel ([0051]) according to claim 1. Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki (US 20150084029) in view of Kim et al. (US 20180005574 A1) and Lin et al. (US 20190035334 A1) as applied to claim 1 above, and further in view of Xiao (CN 111063711 A). Regarding claim 3,Yamazaki in view of Kim and Lin disclose the display panel according to claim 1. Yamazaki in view of Kim and Lin do not disclose further comprising: a light shielding layer between the transparent substrate and a film layer in which the driving circuits are located, wherein the plurality of the first light emitting regions are connected to one another, and the light shielding layer covers a zone formed by the plurality of first light emitting regions connected to one another; and the light shielding layer further has first apertures exposing the second light emitting regions, and a quantity of the first apertures is equal to a quantity of the second light emitting regions. However, Xiao discloses: a light shielding layer (101/102) between the transparent substrate (1) and a film layer (5) in which the driving circuits (21) are located, wherein the plurality of the first light emitting regions (2) are connected to one another (Fig. 3), and the light shielding layer (101/102) covers a zone (under 2/20) formed by the plurality of first light emitting regions (2) connected to one another; (Fig. 3) and the light shielding layer (101/102) further has first apertures (between 101/102) exposing the second light emitting regions (3), and a quantity (at least 1) of the first apertures (between 101/102 in Fig. 3) is equal to a quantity of the second light emitting regions (3). (Fig. 2 and 3) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yamazaki, Kim, Lin and Xiao for a light shielding layer between the transparent substrate and a film layer in which the driving circuits are located, wherein the plurality of the first light emitting regions are connected to one another, and the light shielding layer covers a zone formed by the plurality of first light emitting regions connected to one another; and the light shielding layer further has first apertures exposing the second light emitting regions, and a quantity of the first apertures is equal to a quantity of the second light emitting regions in order to “prevent the bottom of irradiation to the first thin film transistor 21 and the second thin film transistor 31” (Xiao, page 6 of the translation) Regarding claim 4, Yamazaki in view of Kim and Lin disclose the display panel according to claim 1 Yamazaki in view of Kim and Lin do not disclose wherein a quantity of the top-emitting light emitting devices comprised in each of the first light emitting regions is equal to a quantity of the bottom-emitting light emitting devices comprised in each of the second light emitting regions. However, Xiao discloses: a quantity (4) of the top-emitting light emitting devices (20) comprised in each of the first light emitting regions (2) is equal to a quantity (4) of the bottom-emitting light emitting (30) devices comprised in each of the second light emitting regions (3). (Fig. 3) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yamazaki, Kim, Lin and Xiao for a quantity of the top-emitting light emitting devices comprised in each of the first light emitting regions is equal to a quantity of the bottom-emitting light emitting devices comprised in each of the second light emitting regions with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990) so as to “realize double-face display effect,” Claims 6 is rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki (US 20150084029) as applied to claim 5 above, and further in view of Yan et. al. (US 20130193843 A1). Regarding claim 6, Yamazaki discloses the display panel according to claim 5. Yamazaki does not disclose wherein each of the first light emitting regions comprises: a red top-emitting light emitting device, a blue top-emitting light emitting device, and a green top-emitting light emitting device; and each of the second light emitting regions comprises: a red bottom-emitting light emitting device, a blue bottom-emitting light emitting device, and a green bottom-emitting light emitting device. However, Yan discloses: wherein each of the first light emitting regions (shaded) comprises: a red top-emitting light emitting device, a blue top-emitting light emitting device, and a green top-emitting light emitting device; (Fig. 1A-1D) and each of the second light emitting regions (unshaded) comprises: a red bottom-emitting light emitting device, a blue bottom-emitting light emitting device, and a green bottom-emitting light emitting device. ([0013], Fig. 1A-1D) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yamazaki and Yan for each of the first light emitting regions comprises: a red top-emitting light emitting device, a blue top-emitting light emitting device, and a green top-emitting light emitting device; and each of the second light emitting regions comprises: a red bottom-emitting light emitting device, a blue bottom-emitting light emitting device, and a green bottom-emitting light emitting device “so that the bottom emission pixel structures P1 and the top emission pixel structures P2 can be uniformly distributed in the double-side light emitting display panel.” (Yan, [0013]). Additionally, one skilled in the art could easily achieve the claimed invention with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). Claims 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Xiao (CN 111063711 A) as applied to claim 4 above, and further in view of Yan et. al. (US 20130193843 A1). Regarding claim 7, Xiao discloses the display panel according to claim 4, wherein the first light emitting regions (2) arranged in the array are divided into a plurality of first light emitting columns (columns 1 and 3) extending in the first direction (Y) and arranged in the second direction (X); (Fig. 4) and the plurality of second light emitting regions (3) arranged in the array are divided into a plurality of second light emitting columns (columns 2 and 4) extending in the first direction (Y) and arranged in the second direction (X); (Fig. 4) Xiao does not disclose the remaining limitations of the claim. However, Yan discloses: in odd-numbered columns of the first light emitting columns, types of light colors of the top-emitting light emitting devices (P2) comprised in each of the first light emitting regions (shaded) are the same; (Fig. 1A) in even-numbered columns of the first light emitting columns, types of light colors of the top-emitting light emitting devices (P2) comprised in each of the first light emitting regions (shaded) are the same; (Fig. 1A) and types of light colors (Red P2) of the top-emitting light emitting devices (P2) comprised in each of the first light emitting regions (shaded) in the odd-numbered columns of the first light emitting columns are not exactly the same as types of light colors (green P2) of the top-emitting light emitting devices comprised in each of the first light emitting regions (shaded) in the even-numbered columns of the first light emitting columns (shaded); (Fig. 1D) in odd-numbered columns of the second light emitting columns (unshaded), types of light colors of the bottom-emitting light emitting devices (P1) comprised in each of the second light emitting regions (unshaded) are the same; (Fig. 1A) in even-numbered columns of the second light emitting columns, types of light colors of the bottom-emitting light emitting devices (P1) comprised in each of the second light emitting regions (unshaded) are the same; (Fig. 1A) and types of light colors (Red P1) of the bottom-emitting light emitting devices (P2) comprised in each of the second light emitting regions (unshaded) in the odd-numbered columns of the second light emitting columns are not exactly the same as types of light colors (green P1) of the bottom-emitting light emitting devices (P1) comprised in each of the second light emitting regions (unshaded) in the even-numbered columns of the second light emitting columns; (Fig. 1D) and the types of the light colors of the top-emitting light emitting devices (P2) comprised in each of the first light emitting regions (shaded) in the odd-numbered columns of the first light emitting columns are the same as types of the light colors of the bottom-emitting light emitting devices (P1) comprised in each of the second light emitting regions (unshaded) in the odd-numbered columns of the second light emitting columns; (Fig. 1A) and the types of the light colors of the top-emitting light emitting devices (P2) comprised in each of the first light emitting regions (shaded) in the even-numbered columns of the first light emitting columns are the same as types of the light colors of the bottom-emitting light emitting devices (P1) comprised in each of the second light emitting regions (unshaded) in the even-numbered columns of the second light emitting columns. (Fig. 1A) PNG media_image1.png 674 463 media_image1.png Greyscale It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Xiao and Yan to arrive at the claimed invention so that “ bottom emission pixel structures P1 and the top emission pixel structures P2 are uniformly distributed in the double-side light emitting display panel.” Because “if the display panel has double-side light emitting function, it will provide more information for the viewer coming or going.” (Yan, [0004]). Additionally, one skilled in the art could easily achieve the claimed invention with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). Regarding claim 8, Yan discloses the display panel according to claim 7, wherein each of the first light emitting regions (shaded) in the odd-numbered columns of the first light emitting columns comprises: (at least) a red top-emitting light emitting device and a green top-emitting light emitting device arranged in the second direction (X); (Fig. 1C) and each of the first light emitting regions (shaded) in the even-numbered columns of the first light emitting columns comprises: (at least) a blue top-emitting light emitting device and the green top-emitting light emitting device arranged in the second direction (X); (Fig. 1C) and each of the second light emitting regions (unshaded) in the odd-numbered columns of the second light emitting columns comprises: (at least) a red bottom-emitting light emitting device and a green bottom-emitting light emitting device arranged in the second direction (X); (Fig. 1C) and each of the second light emitting regions (unshaded) in the even-numbered columns of the second light emitting columns comprises: (at least) a blue bottom-emitting light emitting device and the green bottom-emitting light emitting device arranged in the second direction (X). (Fig. 1C) It would have been obvious to one skilled in the art before the effective filing date to achieve the claimed invention for similar reasons stated above. PNG media_image2.png 691 487 media_image2.png Greyscale Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki (US 20150084029) as applied to claim 9 above, and further in view of Yan et. al. (US 20130193843 A1). Regarding claim 10, Yamazaki discloses the display panel according to claim 9. Yamazaki does not disclose wherein each of the first light emitting regions comprises three top-emitting light emitting devices having different light colors; and each of the second light emitting regions comprises one bottom-emitting light emitting device. However, Yan discloses: wherein each of the first light emitting regions (shaded) comprises three top-emitting light emitting devices (P2) having different light colors (RGB); (Fig. 1A/1B) and each of the second light emitting regions (unshaded) comprises (at least) one bottom-emitting light emitting device (P2). (Fig. 1A/1B) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yamazaki and Yan for each of the first light emitting regions comprises three top-emitting light emitting devices having different light colors; and each of the second light emitting regions comprises one bottom-emitting light emitting device so that “ bottom emission pixel structures P1 and the top emission pixel structures P2 are uniformly distributed in the double-side light emitting display panel.” Because “if the display panel has double-side light emitting function, it will provide more information for the viewer coming or going.” (Yan, [0004]). Additionally, one skilled in the art could easily achieve the claimed invention with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). Regarding claim 11, Yan discloses the display panel according to claim 10, wherein each of the first light emitting regions (shaded) comprises: a red top-emitting light emitting device (P2), a blue top-emitting light emitting device (P2), and a green top-emitting light emitting device (P2); (Fig. 1A/1B) and the plurality of second light emitting regions (unshaded) arranged in the array are divided into a plurality of second light emitting groups arranged in the second direction (X), wherein each of the second light emitting groups comprises: a second red light emitting column, a second blue light emitting column and a second green light emitting column extending in the first direction (Y) and sequentially arranged in the second direction (X); Yan’s Fig. 1A/1B do not disclose: each of the second light emitting regions in the second red light emitting column comprises: a red bottom-emitting light emitting device; each of the second light emitting regions in the second blue light emitting column comprises: a blue bottom-emitting light emitting device; and each of the second light emitting regions in the second green light emitting column comprises: a green bottom-emitting light emitting device. However, Yan’s Fig. 1C/1D disclose: each of the second light emitting regions (unshaded) in the second red light emitting column comprises: a red bottom-emitting light emitting device (P1); (Fig. 1C/1D) each of the second light emitting regions (unshaded) in the second blue light emitting column comprises: a blue bottom-emitting light emitting device (P1); and each of the second light emitting regions (unshaded) in the second green light emitting column comprises: a green bottom-emitting light emitting device (P1). (Fig. 1C/1D) It would have been obvious to one skilled in the art before the effective filing date to combine the different embodiments of Yan to arrive at the claimed invention so that “ bottom emission pixel structures P1 and the top emission pixel structures P2 are uniformly distributed in the double-side light emitting display panel.” Because “if the display panel has double-side light emitting function, it will provide more information for the viewer coming or going.” (Yan, [0004]). Additionally, one skilled in the art could easily achieve the claimed invention with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). Regarding claim 12, Yan discloses the display panel according to claim 10, wherein each of the first light emitting regions (shaded) comprises: a red top-emitting light emitting device (P2), a blue top-emitting light emitting device (P2), and a green top-emitting light emitting device (P2); (Fig. 1A/1B) and the plurality of second light emitting regions (unshaded) arranged in the array are divided into a plurality of pixel groups (annotated below), and each of the pixel groups (annotated below) comprises four of the second light emitting regions (unshaded) in two rows and two columns, wherein each of the pixel groups at least comprises a red bottom-emitting light emitting device (P1), a blue bottom-emitting light emitting device (P1), and a green top-emitting light emitting device (P1). (Fig. 1A) PNG media_image3.png 417 472 media_image3.png Greyscale Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Yan et. al. (US 20130193843 A1) as applied to claim 12 above and further in view of Chung et al. (US 20210057494 A1). Regarding claim 15, Yan discloses the display panel according to claim 12, wherein the plurality of first light emitting regions (shaded) arranged in an array are divided into a plurality of first light emitting rows extending in the second direction (X) and arranged in the first direction (Y); (Fig. 1A/1B) one of the pixel circuits (under RGB) corresponding to the first light emitting region (shaded) comprises: three first pixel circuits (under RGB) wherein each of the first pixel circuits (under RGB) is electrically connected to one of the top-emitting light emitting devices (P2); (Fig. 1A/1B) Yan does not disclose: one of the pixel circuits corresponding to each of the first light emitting regions in odd-numbered rows of the first light emitting rows further comprises: two dummy pixel circuits; and one of the pixel circuits corresponding to each of the first light emitting regions in even-numbered rows of the first light emitting rows further comprises: two second pixel circuits electrically connected to two of the bottom-emitting light emitting devices adjacent in the second direction, respectively, wherein the dummy pixel circuits have the same circuit composition as the second pixel circuits. However, Chung discloses: one of the pixel circuits corresponding to each of the first light emitting regions (PA2) in odd-numbered rows of the first light emitting rows (in A2) further comprises: (at least) two dummy pixel circuits (dPX); (Fig. 4) and one of the pixel circuits (in PA2 per Fig. 7) corresponding to each of the first light emitting regions (PA2) in even-numbered rows of the first light emitting rows (in A2) further comprises: two second pixel circuits (under PX in DA1) electrically connected to two of the bottom-emitting light emitting devices (in PA1 per [0085]) adjacent in the second direction (X), respectively, wherein the dummy pixel circuits (dPX) have the same circuit composition as the second pixel circuits (in Pa1). [0076], Fig. 7). It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yan and Chung to arrive at the claimed invention “ because the dummy pixels dPX are located in the transmissive area TA of the second display area DA2 to be emitted together with the pixels PX of the second pixel area PA2, the disharmony between the first display area DA1 and the second display area DA2 may be improved”. (Chung, [0074]). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Yan et. al. (US 20130193843 A1) in view of Chung et al. (US 20210057494 A1) as applied to claim 15 above and further in view of Lin et al. (US 20190035334 A1). Regarding claim 16, Chung discloses the display panel according to claim 15, wherein in one of the pixel circuits (located in PA2) corresponding to each of the first light emitting regions (PA2) in the odd-numbered rows of the first light emitting rows, the first pixel circuit (in PA2) and the dummy pixel circuit (dPX) are arranged in the second direction (X); (Fig. 5) and in one of the pixel circuits (located in PA2) corresponding to each of the first light emitting regions (PA2) in the even-numbered rows of the first light emitting rows, the first pixel circuit (located in PA2) and the second pixel circuit (located in PA1) are arranged in the second direction (X), Chung does not disclose: and the first pixel circuit and the second pixel circuit share the gate drive signal line. However, in discloses: and the first pixel circuit (100) and the second pixel circuit (100) share the gate drive signal line (gate). (Fig. 3) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Yan, Chung and Lin for and the first pixel circuit and the second pixel circuit share the gate drive signal line in order to “ reduce the number of gate lines Gate (the number of gate lines Gate is reduced, for example, to a quarter of the arrangement as shown in FIG. 2), thereby further increasing the aperture ratio of the display panel, reducing the parasitic capacitance, and facilitating wiring and production of the display panel. In other words, the display panel can also adopt a double-row scanning manner, that is, two rows of pixel circuits are simultaneously in a charged state at any time, and each pixel circuit can be provided twice as much charging time as the original progressive scan driving manner, which ensures display quality of picture, especially for large-size, high-resolution OLED display products.” (Lin, [0057]) Claim 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Xiao (CN 111063711 A) as applied to claim 4 above, and further in view of Yamazaki (US 20150084029). Regarding claim 18, Xiao discloses the display panel according to claim 4, wherein each of the first light emitting regions (2) comprises m of the top-emitting light emitting devices (20), and each of the second light emitting regions (3) comprises m of the bottom-emitting light emitting devices (30), wherein m is a positive integer; (Fig. 3 and 4) Xiao does not disclose: and each of the pixel circuits comprises: m third pixel circuits; and m fourth pixel circuits, wherein each of the fourth pixel circuits comprises: a first sub-pixel circuit and a second sub-pixel circuit that are electrically connected to the third pixel circuit; the first sub-pixel circuit is further electrically connected to the top-emitting light emitting device, and the second sub-pixel circuit is further electrically connected to the bottom-emitting light emitting device; and light emitting devices electrically connected to the first sub-pixel circuit and the second sub-pixel circuit which are electrically connected to one same third pixel circuit have the same light color. However, Yamazaki discloses: and each of the pixel circuits (29) comprises: m third pixel circuits (65/66); (Fig. 3B) and m fourth pixel circuits (19), wherein each of the fourth pixel circuits (17/19) comprises: a first sub-pixel circuit (62) and a second sub-pixel circuit (61) that are electrically connected to the third pixel circuit (66/65); (Fig. 3B) the first sub-pixel circuit (62) is further electrically connected to the top-emitting light emitting device (13), and the second sub-pixel circuit (61) is further electrically connected to the bottom-emitting light emitting device (11); (Fig. 3B) and light emitting devices electrically connected to the first sub-pixel circuit (62) and the second sub-pixel circuit (61) which are electrically connected to one same third pixel circuit (65/66) have the same light color (per [0016]). (Fig. 3B) It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Xiao and Yamazaki to arrive at the claimed invention so that “ luminance unevenness of the TFTs 65 and 66 due to variation in characteristics of the TFTs 18 and 20 can be improved to enhance the image quality.” (Yamazaki, [0049]) Regarding claim 19, Yamazaki discloses the display panel according to claim 18, wherein the third pixel circuit (65/66) comprises: a driver transistor (per [0049]); (Fig. 3B) the signal line (source lines) comprises: a first light emitting control signal line (Sbx) and a second light emitting control signal line (Sax); (Fig. 3B) Yamazaki Fig. 3B does not disclose explicitly the first sub-pixel circuit comprises: a first transistor, wherein a source electrode of the first transistor is electrically connected to a drain electrode of the driver transistor, a gate electrode of the first transistor is electrically connected to the first light emitting control signal line, and a drain electrode of the first transistor is electrically connected to the top-emitting light emitting device; and the second sub-pixel circuit comprises: a second transistor, wherein a source electrode of the second transistor is electrically connected to a drain electrode of the driver transistor, a gate electrode of the second transistor is electrically connected to the second light emitting control signal line, and a drain electrode of the second transistor is electrically connected to the bottom-emitting light emitting device. However, Yamazaki Fig. 4B disclose; the first sub-pixel circuit (74) comprises: a first transistor (inside 74), wherein a source electrode (not labeled but described in [0054]) of the first transistor is electrically connected to a drain electrode (not labeled but described in [0054]) of the driver transistor (20), a gate electrode (not labeled but clearly shown between the source/drain electrodes) of the first transistor (inside 74) is electrically connected to the first light emitting control signal line (per [0037]), and a drain electrode (not labeled but described in [0054]) of the first transistor (20) is electrically connected to the top-emitting light emitting device (13); (Fig. 4B) and the second sub-pixel circuit (73) comprises: a second transistor (inside 73), wherein a source electrode (not labeled but described in [0054]) of the second transistor is electrically connected to a drain electrode (not labeled but described in [0054]) of the driver transistor (18), a gate electrode (not labeled but clearly shown between the source/drain electrodes) of the second transistor (inside 73) is electrically connected to the second light emitting control signal line (per [0037]), and a drain electrode (not labeled but described in [0054]) of the second transistor (inside 73) is electrically connected to the bottom-emitting light emitting device (11). (Fig. 4B) It would have been obvious to one skilled in the art before the effective filing date to combine the different embodiments of Yamazaki to arrive at the claimed invention for similar reasons stated in the rationale of claim 18. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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Prosecution Timeline

Aug 29, 2023
Application Filed
Nov 14, 2025
Non-Final Rejection mailed — §103
Feb 03, 2026
Response Filed
Apr 29, 2026
Final Rejection mailed — §103
Jul 28, 2026
Request for Continued Examination
Jul 30, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
98%
Grant Probability
99%
With Interview (+2.9%)
3y 5m (~6m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 61 resolved cases by this examiner. Grant probability derived from career allowance rate.

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