CTFR 18/280,600 CTFR 85098 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Response to Amendment Claims 1, 8 and 13 have been amended; and claims 1-14 are currently pending. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-14 are rejected under 35 U.S.C. 103 as being unpatentable over Endo et al. (US 2020/0411339 A1, hereinafter “Endo”) in view of Kasai (US 2022/0221509 A1, hereinafter “Kasai”) . In regards to claim 1, Endo discloses (See, for example, Fig. 1) a semiconductor device manufacturing system for processing a wafer, comprising: a semiconductor device manufacturing apparatus including a wafer stage having an upper surface configured to allow the wafer to be placed (“electrostatic chuck 6 for attracting and holding the semiconductor wafer W…”, See Par [0030]) , a plurality of heaters disposed inside the wafer stage and below a plurality of regions of the upper surface (“…the heater 6c generate heat by the power supplied by the controller 200… the regions are referred to as “divided regions.” One heater 6c is disposed in each divided region.”, See, for example, Par [0031]) , and a controller configured to adjust outputs of a plurality of heater power supplies supplied to the plurality of heaters (“…the control unit 25 adjusts, for each of the divided regions 60, the power supplied to the heater 6c..”, See, for example, Par [0091] and Figs. 1 and 3) ; and a wafer temperature calculation system configured to determine whether first output values of the plurality of the heater power supplies calculated in advance to implement a target temperature of the wafer during the processing are within an allowable range (“The power supply unit 20 is provided for each of the heaters 6c disposed in the divided regions 60 of the electrostatic chuck 6 to supply power to a corresponding heater 6c…The measuring unit 24 measures respective resistance values of the heaters 6c based on the measured voltages and measured currents outputted from the power supply units 20 and supplied to the heater 6c…”, See, for example, Par [0052]) , and calculate second output values obtained by correcting all the first output values to values within the allowable range when the first output values are out of the allowable range (“..the holding unit 26 hold a conversion table 260 and a correction table 265.”, See Par [0053]; and “in the correction table 265, individual tables 267 are stored for the respective frequencies 266 of the power source. In each individual table 267, individual tables 269 are stored for the respective region IDs 268 that identify the divided regions 60 where the heaters 6 c are provided. In each individual table 269, a temperature correction value is stored in association with a magnitude of the source voltage V.sub.S. In the present embodiment, the magnitude of the source voltage V.sub.S stored in the individual table 269 is the square of an effective value (RMS value) of the source voltage V.sub.S. The correction table 265 is an example of correction data.”, See for example, Par [0054]; See also Pars [0057]-[0067]). Endo is silent about a wafer temperature calculation system configured to determine whether first output values of the plurality of the heater power supplies which are calculated based on a heat transfer between a first region and at least a second region of the plurality of regions of the upper surface of the wafer stage in advance to implement a target temperature of the wafer during the processing are within an allowable range to be physically output by the plurality of the heater power supplies. Kasai while disclosing temperature control of a mounting base teaches (See, for example, Figs. 3-4) multi-zone temperature control of a wafer-supporting stage having a surface divided into a plurality of regions each provided with an individually controllable heater (See top plate 110 divided into first region Z1 and outer regions Z2-Z4, with heaters 121 1 -121 4 , See, Pars [0038]) . It teaches calculating the heater output value of one region based on a heat transfer between the region and at least a second, adjacent region of the surface. In particular, it performs feedback control that adjust the operation amount of the heater in an outer side region outside the centermost region so that a temperature difference between the outer side region and the region that is adjacent to the outer side region inward in the direction of the diameter becomes a preset value. It expressly frames this output calculation in terms of the heat transfer between the regions of the surface, explaining that the outer-region heater output is determined so as to manage the inter-region heat flux (See, Par [0074]). Accordingly, it is possible to control the second to fourth regions Z2 to Z4 so that a flux of heat flowing into the first region Z1 becomes zero (See, Par [0066]) , thereby minimizing thermal interference between the central first region Z1 and the second to fourth regions Z2 to Z4. Thus, the operation amount (output) supplied to a heater of a first region of the surface is calculated based on a heat transfer between that first region and at least a second region, as recited (See, for example, Pars [0051], [0052]) . It further teaches that the heater power supplies of the respective regions have a defined maximum output that can be physically supplied ( i.e., an allowable range to be physically output by the heater power supplies), disclosing in a worked example that a maximum output of the heater of the first region was 1000 W, and the maximum output of the heaters of the second to fourth regions was 1000 W (See, Par [0089]). Applicant’s own disclosure confirms that the existence of such upper and lower physical output limits, unique to the apparatus, is a known characteristic of the heater power supplies and a routine consideration in setting heater output (See pars [0044] and [0055]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify Endo’s wafer temperature calculation system, which independently calculates each region’s heater output, to instead calculate the heater output values based on a heat transfer between a first region and at least a second region of the surface because having per-region feedback control help suppress thermal interference (overshoot/undershoot), improve in-plane temperature uniformity, and keeps each region’s deviation within the desired region. In regards to claim 8, Endo discloses (See, for example, Figs. 1 and 3) a semiconductor device manufacturing method of processing a wafer by using a semiconductor device manufacturing apparatus (See, for example, Pars [0023], [0024] and [0027]) including a wafer stage having an upper surface on which the wafer is placed (“electrostatic chuck 6 for attracting and holding the semiconductor wafer W…”, See Par [0030]) , a plurality of heaters disposed inside the wafer stage and below a plurality of regions of the upper surface (“…the heater 6c generate heat by the power supplied by the controller 200… the regions are referred to as “divided regions.” One heater 6c is disposed in each divided region.”, See, for example, Par [0031]) , and a controller configured to adjust outputs of a plurality of heater power supplies supplied to the plurality of heaters (“…the control unit 25 adjusts, for each of the divided regions 60, the power supplied to the heater 6c..”, See, for example, Par [0091] and Figs. 1 and 3) , the semiconductor device manufacturing method comprising: determining whether first output values of the plurality of the heater power supplies calculated in advance to implement a target temperature of the wafer during the processing are within an allowable range (See, for example Par [0052]) ; and adjusting, when the first output values are out of the allowable range (See, for example, Par [0057]) , the heater power supply by the controller to have second output values calculated by correcting all the first output values to values within the allowable range (See, for example, Pars [0057]-[0067]) . Endo is silent about a wafer temperature calculation system configured to determine whether first output values of the plurality of the heater power supplies which are calculated based on a heat transfer between a first region and at least a second region of the plurality of regions of the upper surface of the wafer stage in advance to implement a target temperature of the wafer during the processing are within an allowable range to be physically output by the plurality of the heater power supplies. Kasai while disclosing temperature control of a mounting base teaches (See, for example, Figs. 3-4) multi-zone temperature control of a wafer-supporting stage having a surface divided into a plurality of regions each provided with an individually controllable heater (See top plate 110 divided into first region Z1 and outer regions Z2-Z4, with heaters 121 1 -121 4 , See, Pars [0038] ). It teaches calculating the heater output value of one region based on a heat transfer between the region and at least a second, adjacent region of the surface. In particular, Kasai performs feedback control that adjust the operation amount of the heater in an outer side region outside the centermost region so that a temperature difference between the outer side region and the region that is adjacent to the outer side region inward in the direction of the diameter becomes a preset value. It expressly frames this output calculation in terms of the heat transfer between the regions of the surface, explaining that the outer-region heater output is determined so as to manage the inter-region heat flux (See, Par [0074]). Accordingly, it is possible to control the second to fourth regions Z2 to Z4 so that a flux of heat flowing into the first region Z1 becomes zero (See, Par [0066]) , thereby minimizing thermal interference between the central first region Z1 and the second to fourth regions Z2 to Z4. Thus, the operation amount (output) supplied to a heater of a first region of the surface is calculated based on a heat transfer between that first region and at least a second region, as recited (See, for example, Pars [0051], [0052]) . It further teaches that the heater power supplies of the respective regions have a defined maximum output that can be physically supplied ( i.e., an allowable range to be physically output by the heater power supplies), disclosing in a worked example that a maximum output of the heater of the first region was 1000 W, and the maximum output of the heaters of the second to fourth regions was 1000 W (See, Par [0089]). Applicant’s own disclosure confirms that the existence of such upper and lower physical output limits, unique to the apparatus, is a known characteristic of the heater power supplies and a routine consideration in setting heater output (See pars [0044] and [0055]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify Endo’s wafer temperature calculation system, which independently calculates each region’s heater output, to instead calculate the heater output values based on a heat transfer between a first region and at least a second region of the surface because having per-region feedback control help suppress thermal interference (overshoot/ undershoot), improve in-plane temperature uniformity, and keeps each region’s deviation within the desired region. In regards to claims 2 and 9, Endo discloses (See, for example, Figs. 1 and 3) the wafer is processed in the semiconductor device manufacturing apparatus by using a processing recipe calculated by setting a first temperature distribution of the wafer corresponding to the first output values or a second temperature distribution calculated based on the second output values as a target temperature distribution during the processing (See, for example, Pars [0055]-[0057]) . In regards to claims 3 and 10, Endo discloses (See, for example, Figs. 1 and 3) when it is determined that output values of at least one or more heater power supplies among the plurality of the heater power supplies are out of the allowable range, the controller adjusts the outputs of the plurality of heater power supplies by setting, as a target temperature distribution, a second target temperature distribution calculated based on the second output values at which the output values of the at least one or more heater power supplies are within the allowable range (“…the control unit 25 adjusts the power supplied to heater 6c in each of the divided regions 60 such that the temperatures of the heater 6c becomes a predetermined target temperature …”, See, for example, Par [0098]) . In regards to claims 4 and 11, Endo discloses (See, for example, Figs. 1-4) when it is determined that output values of at least one or more heater power supplies among the plurality of the heater power supplies are out of the allowable range, the wafer temperature calculation system calculates the second target temperature distribution such that the output values of the at least one or more heater power supplies are within the allowable range and a value of a predetermined objective function can be minimized (See, for example, Pars [0098]-[0099]) . In regards to claims 5 and 12, Endo discloses (See, for example, Figs. 1-4) that the wafer temperature calculation system calculates the second target temperature distribution by sequentially increasing or decreasing the output of each of the plurality of heater power supplies until the value of the objective function is minimum (“…the control unit 25 corrects, for each of the divided regions 60, the temperature of the heater 6c estimated…”, See, for example Pars [0078], [0080], and [0081]) . In regards to claim 6, Endo discloses (See, for example, Figs. 1, 3 and 15) that the wafer temperature calculation system and the semiconductor device manufacturing apparatus are communicably connected (“The temperature of the coolant flowing through the flow path 2 b , the power supplied to each of the heaters 6 c in the electrostatic chuck 6, and the pressure of the heat transfer gas supplied to the backside of the semiconductor wafer W are controlled by the controller 200. Accordingly, the temperature of the semiconductor wafer W attracted to and held on the upper surface of the electrostatic chuck 6 is controlled to a temperature within a predetermined range.”, See for example, Par [0034]) , and a first correlation between output values of the plurality of heater power supplies and a temperature distribution of the wafer (See, for example, Pars [0098] and [0099], and also Par [0045]) , an upper limit value and a lower limit value of the allowable range of the output of the heater power supply, and an upper limit value and a lower limit value of a temperature of the wafer in an allowable range calculated based on the first correlation are associated with the semiconductor device manufacturing apparatus and stored in the wafer temperature calculation system (“…the control unit 25 controls the power supplied to the heater 6c based on the difference between the estimated temperature and the target temperature… Step S302 is an example of an adjustment step.”, See par [0098]; “…the control unit 25 holds, for each of the divided regions 60, the calculated correction value ..”,See Par [0099]; and also See, for example, Pars [100]- [0106]) . In regards to claim 7, Endo discloses (See, for example, Figs. 1, 3 and 15) that when it is determined that output values of at least one or more heater power supplies among the plurality of the heater power supplies are out of the allowable range, the wafer temperature calculation system stores a region of the heater corresponding to the at least one or more heater power supplies (“The power supply unit 20 is provided for each of the heaters 6 c disposed in the divided regions 60 of the electrostatic chuck 6 to supply a power to a corresponding heater 6 c . … the substrate processing apparatus 100 has forty heaters 6 c , and forty power supply units 20 are provided for each of the forty heaters 6 c , respectively. Each of the power supply units 20 includes a switch SW 21, an ammeter 22, and a voltmeter 23. Although it is not shown in FIG. 3, one power supply unit 20 is provided for each of one or more heaters 5b disposed in the support 5a. …The SW 21 is turned on or off under the control of the control unit 25 and the power from a power source 27 is supplied to a corresponding heater 6c through the SW 21 during an ON period. …” See, for example, Pars [0050] and [0051; See also Pars [0054] and [0056]) , and includes a display device configured to display the region of the heater (See, for example, Pars [0106] and [0107]) . In regards to claim 13, Endo discloses (See, for example Figs. 1, 3 and 15) the second target temperature distribution is calculated by using a first correlation between output values of the plurality of heater power supplies and a temperature distribution of the wafer (See, Par [0098], and “…the control unit 25 measures the temperature of each of the divided regions 60 using the IR camera 51 (S303). The temperature of each of the divided regions 60 measured by the IR camera 51 is an example of a second temperature.”, See Par [0099]) , an upper limit value and a lower limit value of the allowable range of the output of the heater power supply, or an upper limit value and a lower limit value of an allowable range of a temperature of the wafer calculated based on the first correlation, which are stored in association with the semiconductor device manufacturing apparatus (“…the control unit 25 controls the power supplied to the heater 6c based on the difference between the estimated temperature and the target temperature… Step S302 is an example of an adjustment step.”, See par [0098]; “…the control unit 25 holds, for each of the divided regions 60, the calculated correction value ..”,See Par [0099]; and also See, for example, Pars [100]- [0106]) . In regards to claim 14, Endo discloses (See, for example, Figs. 1, 3 and 15) that when it is determined that output values of at least one or more heater power supplies among the plurality of the heater power supplies are out of the allowable range, a region of the heater corresponding to the at least one or more heater power supplies is stored (“The power supply unit 20 is provided for each of the heaters 6 c disposed in the divided regions 60 of the electrostatic chuck 6 to supply a power to a corresponding heater 6 c . … the substrate processing apparatus 100 has forty heaters 6 c , and forty power supply units 20 are provided for each of the forty heaters 6 c , respectively. Each of the power supply units 20 includes a switch SW 21, an ammeter 22, and a voltmeter 23. Although it is not shown in FIG. 3, one power supply unit 20 is provided for each of one or more heaters 5b disposed in the support 5a. …The SW 21 is turned on or off under the control of the control unit 25 and the power from a power source 27 is supplied to a corresponding heater 6c through the SW 21 during an ON period. …” See, for example, Pars [0050] and [0051; See also Pars [0054] and [0056]) , and the region of the heater is displayed (See, for example, Pars [0106] and [0107]) . Response to Arguments Applicant’s arguments with respect to claims 1 and 8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T.. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893 Application/Control Number: 18/280,600 Page 2 Art Unit: 2893 Application/Control Number: 18/280,600 Page 3 Art Unit: 2893 Application/Control Number: 18/280,600 Page 4 Art Unit: 2893 Application/Control Number: 18/280,600 Page 5 Art Unit: 2893 Application/Control Number: 18/280,600 Page 6 Art Unit: 2893 Application/Control Number: 18/280,600 Page 7 Art Unit: 2893 Application/Control Number: 18/280,600 Page 8 Art Unit: 2893 Application/Control Number: 18/280,600 Page 9 Art Unit: 2893 Application/Control Number: 18/280,600 Page 10 Art Unit: 2893 Application/Control Number: 18/280,600 Page 11 Art Unit: 2893 Application/Control Number: 18/280,600 Page 12 Art Unit: 2893 Application/Control Number: 18/280,600 Page 13 Art Unit: 2893
Prosecution Insights