Office Action Predictor
Last updated: April 15, 2026
Application No. 18/285,540

CIRCUIT ASSEMBLY INCLUDING GALLIUM NITRIDE DEVICES

Final Rejection §102§103
Filed
Oct 04, 2023
Examiner
JALALI, AMIR A.
Art Unit
2835
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., LTD.
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
2y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allow Rate
332 granted / 424 resolved
+10.3% vs TC avg
Strong +22% interview lift
Without
With
+21.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
33 currently pending
Career history
457
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
57.6%
+17.6% vs TC avg
§102
28.4%
-11.6% vs TC avg
§112
10.2%
-29.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 424 resolved cases

Office Action

§102 §103
Email Communication Applicant is encouraged to authorize the Examiner to communicate via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.02, 502.03. DETAILED ACTION Response to Amendment Applicant’s amendment to the specification and drawings has overcome each and every objection previously set forth in non-final office action dated 07/14/2025, therefore, the objections have been withdrawn. Applicant’s amendment to Claim 6 has overcome 35 U.S.C. 112(b) rejection previously set forth in non-final office action dated 07/14/2025, therefore, the rejection has been withdrawn. The Applicant originally submitted Claims 1-20 in the application. In the present response, the Applicant amended Claims 1, 6, 14 and 16-17. Accordingly, Claims 1-20 are currently pending in the application. Response to Arguments Applicant’s Arguments/Remarks filled 10/14/2025, with respect to rejection of Claims 1 and 14 under 35 U.S.C. § 102(a)(1) has been fully considered, however not persuasive. Applicant argues that claim 1 limitation drawn to “an L-shaped metal plate attached to the heatsink and to the first PCB to create a thermal path between the first and the second sides of the first PCB” is not thought or suggested by the cited US 2020/0053900 to Feurtado. In support of this argument, the Applicant reasons that power contacts 608 of Feurtado power module 100 extend away from one side of the base plate 602 and does not create a thermal path between opposite sides of power substrate 606. Examiner respectfully disagrees with Applicant’s representation of Feurtado power module 100. As has been noted in rejection of Claim 1 below; power contacts 608 are sheets of metal directly bonded to first surface of DBC power substrate 606 and metal base plate 602 directly bonded to the second surface of DBC power substrate 606. Copper/Ceramic/Copper structure of DBC power substrate 606 has an excellent thermal conductivity, there is a strong thermal path way between the thermal contacts 608 and metal base plate 602 through DBC power substrate 606. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless - (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 12-17 and 19 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by Feurtado et al (US 2020/0053900). Regarding Claim 1, Feurtado (In Figs 10, 29) discloses a circuit assembly (100) comprising: a first printed circuit board (PCB) (606); a switching device (302) located on a first side of the first PCB (606), (Fig 10); a heatsink (602), (¶ 137, II. 2-4) attached to a second side surface of the first PCB (606) opposite to the first side (Fig 10); and an L-shaped metal plate (608) attached to the heatsink (602) and to the first PCB (606), (Fig 10) to create a thermal path (thermal path through 606) between the first and the second sides of the first PCB (606). Examiner Note; edge power contacts 608 fabricated from sheet of metal creating high current path and metal base plate 602, would create a thermal path way between the first and second sides of the DBC power substrate 606 through the DBC power substrate 606 which is excellent in thermal conductivity. Regarding Claim 12, Feurtado discloses the limitations of Claim 1, however Feurtado (in Figs 10, 29) further discloses wherein the circuit assembly (100) further comprising: a second PCB (402); and driver circuitry on the second PCB (402) that drives the switching device (302), (¶ 216, II. 1-26), (Fig 29). Regarding Claim 13, Feurtado discloses the limitations of Claim 12, however Feurtado (in Figs 10, 29) further discloses wherein a portion of the L-shaped plate (608) is located between the first PCB (606) and the second PCB (402). Regarding Claim 14, Feurtado (In Figs 10, 29) discloses a circuit assembly (100) comprising: a first printed circuit board (PCB), (606); a switching device (302) located on the first PCB (606), (Fig 10); a heatsink (602), (¶ 137, II. 2-4) attached to the first PCB (606), (Fig 10); an L-shaped metal plate (608) attached to the heatsink (602) and to the first PCB (606) to create a thermal path (thermal path through 606) between first and second sides of the first PCB (606); and a second PCB (402) including gate driver circuitry (420/430/440/450/460) attached to the first PCB (606), (¶ 216, II. 1-26), (Fig 29). Regarding Claim 15, Feurtado discloses the limitations of Claim 14, however Feurtado (in Figs 10, 29) further discloses a connector (board-to board connectors, ¶ 182, II. 1-7) to route signals between the first PCB (606) and the second PCB (402), (Fig 29). Regarding Claim 16, Feurtado discloses the limitations of Claim 14, however Feurtado (in Figs 10, 29) further discloses wherein a portion of the L-shaped metal plate (608) is located between the first PCB (606) and the second PCB (402), (Fig 29). Regarding Claim 17, Feurtado (In Figs 10, 29) discloses a circuit assembly (100) comprising: a first printed circuit board (PCB) (606); a switching device (302) located on the first PCB (606), (Fig 10); a heatsink (602), (¶ 137, II. 2-4) attached to the first PCB (606), (Fig 10); a second PCB (402) including gate driver circuitry attached to the first PCB (606), (¶ 216, II. 1-26), (Fig 29); and an L-shaped metal plate (608) including: a first leg (any of the three legs of 608 attached to 606), (Fig 10) located between the first PCB (606) and the second PCB (402), (Fig 29), and a second leg (any of the three legs of 608 attached to 606), (Fig 10) attached to the heatsink (602), (Fig 10). Examiner Note; three legs of power contacts 608 attached to substrate 606 are located between DBC substrate 606 and PCB 402 as illustrated in Fig 29, separately three legs of power contacts 608 attached to DBC substrate 606 are thermally and mechanically attached to metal base plate 602, Examiner suggest using terms such as “directly attached” to distinguish claimed invention from the prior art inventions. Regarding Claim 19, Feurtado discloses the limitations of Claim 14, however Feurtado (in Figs 10, 29) further discloses wherein the gate driver circuitry (420/430/440/450/460)is isolated (420/430/440/450/460 being on 402 is isolated from 606). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-3 are rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Minakawa et al (US 2009/0121342). Regarding Claim 2, Feurtado discloses the limitations of Claim 1, however Feurtado does not disclose wherein the L- shaped metal plate contacts a top surface of the switching device. Instead Minakawa (In Fig 3) teaches wherein the L- shaped metal plate (6) contacts a top surface of the switching device (4), (Fig 3). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Minakawa with the L-shaped metal plate contacting a top surface of the switching device to benefit from efficiently releasing heat from power devices to the heat sink (Minakawa ¶ 47, II. 5-10). Regarding Claim 3, Feurtado discloses the limitations of Claim 1, however where Feurtado (In Fig 10) further discloses where the circuit assembly (100) further including thermal interface material (TIM) between the heatsink (602) and the first PCB (606), (¶ 139, II. 9-12), however Feurtado does not disclose thermal interface material (TIM) between the L-shaped metal plate and the switching device. Instead, Minakawa (In Fig 3) teaches thermal interface material (TIM) (7) between the L-shaped metal plate (6) and the switching device (4), (Fig 3). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Minakawa with thermal interface material between the L-shaped metal plate and the switching device to benefit from efficiently releasing heat from power devices to the heat sink (Minakawa ¶ 47, II. 5-10). Claim 4 is rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Yoshikawa (JPH02164100). For the purpose of citation, Examiner used machine translation of JPH02164100, said translation has been provided herewith to the Applicant. Regarding Claim 4, Feurtado discloses the limitations of Claim 1, however Feurtado does not disclose wherein the L-shaped metal plate includes copper. Instead, Yoshikawa (In Fig 1) teaches wherein the L-shaped metal plate (1) includes copper (¶ 1, II. 26-28). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Yoshikawa with the L-shaped metal plate including copper to benefit from providing capability to dissipate heat from the switching element by using metal plate (Yoshikawa ¶ 1, II. 15-22). Claim 5 is rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Adachi et al (JP2013012429). For the purpose of citation, Examiner used machine translation of JP2013012429, said translation has been provided herewith to the Applicant. Regarding Claim 5, Feurtado discloses the limitations of Claim 1, however Feurtado does not disclose wherein the L-shaped metal plate includes a bend with an angle less than 90°. Instead, Adachi (In Fig 1) teaches wherein the L-shaped metal plate (1), (¶ 9, II. 1-6) includes a bend with an angle less than 90° (acute angle, ¶ 9, II.1-6). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Adachi with the L-shaped metal plate including a bend with an angle less than 90° to benefit from enabling user to replace battery stably without any cumbersome and inconvenient procedures for the user to follow (Adachi ¶ 4, II. 16-29). Claim 6 is rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Arita et al (US 2019/0044452). Regarding Claim 6, Feurtado discloses the limitations of Claim 1, however Feurtado does not disclose wherein the first PCB is 1-mm thick. Instead, Arita (In Fig 3) teaches wherein the first PCB (200) is 1-mm thick (¶ 75, II. 1-5). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Arita with the first PCB being 1 mm thick to benefit from excellent heat dissipating capability and water resistance, without increasing the size of the power supply (Arita ¶ 12, II. 1-5). Claims 7-9 are rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Rutowski et al (US 2021/0328482). Regarding Claim 7, Feurtado discloses the limitations of Claim 1, however Feurtado does not disclose wherein the first PCB includes a middle metal plane as an interior layer. Instead, Rutowski (In Fig 8) teaches wherein the first PCB (800) includes a middle metal plane (804) as an interior layer (Fig 8). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Rutowski with the first PCB including a middle metal plane as an interior to benefit from providing a reliable connection with plurality of switches and the PCB with typical solder connection breakages from vibration (Rutowski ¶ 3, II. 6-12). Regarding Claim 8, Feurtado in view of Rutowski discloses the limitations of Claim 7, however Feurtado as modified does not disclose wherein the middle metal plane includes multiple portions, and each of the multiple portions is connected to a different circuit node on the first PCB. Instead, Rutowski (In Fig 8) further teaches wherein the middle metal plane (804) includes multiple portions (portions electrically connected to each 812), and each of the multiple portions (portions electrically connected to each 812) is connected to a different circuit node (816) on the first PCB (800), (Fig 8). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Rutowski with the middle metal plane including multiple portions, and each portion being connected to a different circuit node on the first PCB to benefit from providing a reliable connection with plurality of switches and the PCB with typical solder connection breakages from vibration (Rutowski ¶ 3, II. 6-12). Regarding Claim 9, Feurtado in view of Rutowski discloses the limitations of Claim 7, however Feurtado as modified does not disclose wherein the middle metal plane of the first PCB is connected to the switching device through microvias in the first PCB. Instead Rutowski (In Fig 8) teaches wherein the middle metal plane (804) of the first PCB (800) is connected to the switching device (812) through microvias (816) in the first PCB (800), (Fig 8). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Rutowski with the middle metal plane of the PCB being connected to the switching device through microvias in the first PCB to benefit from providing a reliable connection with plurality of switches and the PCB with typical solder connection breakages from vibration (Rutowski ¶ 3, II. 6-12). Claims 10-11 are rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Mok (US 2021/0195735). Regarding Claim 10, Feurtado discloses the limitations of Claim 1, however Feurtado does not disclose wherein the first PCB includes copper-filled microvias located beneath the switching device. Instead, Mok (In Fig 1) teaches wherein the first PCB (1) includes copper-filled microvias (3, 31), (¶ 67, II. 7-13) located beneath the switching device (18), (Fig 1). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Mok with first PCB including copper-filled microvias located beneath the switching device to benefit from providing a heat dissipation effect so that a cooling effect of the component carrier and particularly components therein could be obtained (Mok ¶ 16, II. 1-19). Regarding Claim 11, Feurtado in view of Mok discloses the limitations of Claim 10, however Feurtado as modified does not disclose wherein the first PCB includes a copper inlay; and the copper-filled vias provide a thermal path between the switching device and the copper inlay. Instead Mok (In Fig 1) further teaches wherein the first PCB (1) includes a copper inlay (8), (¶ 60, II. 1-5); and the copper-filled vias (3, 31) provide a thermal path between the switching device (18) and the copper inlay (8), (Fig 1). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Mok with first PCB including a copper inlay and copper-filled vias providing a thermal path between the switching devices and the copper inlay to benefit from providing a heat dissipation effect so that a cooling effect of the component carrier and particularly components therein could be obtained (Mok ¶ 16, II. 1-19). Claim 18 is rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Suenaga et al (US 2021/0104970). Regarding Claim 18, Feurtado discloses the limitations of Claim 14, however Feurtado does not disclose wherein the circuit assembly further comprising a transformer integrated into the second PCB. Instead, Suenaga (In Fig 8A) teaches wherein the circuit assembly (310) further comprising a transformer (¶ 55, II. 28-35) integrated into the second PCB (170). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Suenaga with the circuit board assembly further comprising a transformer integrated into the second PCB to benefit from providing a high-density integrated power control assembly with reduced size and efficient removal of high heat flux (Suenaga ¶ 4, II. 14-17, ¶ 5, II. 1-3). Claim 20 is rejected under 35 U.S.C. § 103 as being unpatentable over Feurtado in view of Hayase (US 2020/0068713). Regarding Claim 20, Feurtado discloses the limitations of Claim 14, however Feurtado wherein the switching device is a gallium nitride switching device. Instead, Hayase (In Fig 1) teaches wherein the switching device (102a) is a gallium nitride switching device (¶ 24, II. 1-8). It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Feurtado with Hayase with the switching device being a gallium nitride switching device to benefit from superior performance in high-performance, high-frequency application without sacrificing the cooling performance in the semiconductor switching element composed of wideband gap technology (Hayase, ¶ 6, II. 1-8, ¶ 51, II. 1-10). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMIR JALALI whose telephone number is (303)297-4308. The examiner can normally be reached on Monday - Friday 8:30am - 5:00pm, Mountain Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jayprakash Gandhi can be reached on 571-272-3740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMIR A JALALI/Primary Examiner, Art Unit 2835
Read full office action

Prosecution Timeline

Oct 04, 2023
Application Filed
Jul 11, 2025
Non-Final Rejection — §102, §103
Oct 14, 2025
Response Filed
Dec 08, 2025
Final Rejection — §102, §103
Mar 27, 2026
Applicant Interview (Telephonic)
Mar 27, 2026
Examiner Interview Summary
Apr 07, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+21.8%)
2y 2m
Median Time to Grant
Moderate
PTA Risk
Based on 424 resolved cases by this examiner. Grant probability derived from career allow rate.

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