DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Cross-Reference to Related Applications
2. This application is a 371 of PCT/EP2022/057926 03/25/2022.
Preliminary amendment
3. Preliminary amendment filed on 10/20/2023 has been acknowledged and considered.
In the Preliminary amendment, the applicants have been amended the abstract, the specification and canceled claims 1-20 and added new claims 21-40.
Claims 21-40 are currently pending in the application.
Oath/Declaration
4. The oath/declaration filed on 10/20/2023 is acceptable.
Priority
5. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
6. The office acknowledges receipt of the following items from the applicant:
Information Disclosure Statement (IDS) filed on 10/20/2023 and 10/02/2025.
Claim Objections
7. Claims 21-36 are objected to because of the following informalities:
In claim 21, line 8 and in claim 36, line 7, a term of “said planar cooling element” should change to -- the planar cooling element --.
Claims 22-35 are depend on the independent claim 21, then, they are also objected.
Claim Rejections-35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
8. Claims 21-40 are rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
In claims 21, line 10, in claim 36, line 10 and in claim 37, lines 7-8, “… a height profile of a circuit layout…” is confusing and indefinite since it is unclear as how? For a purpose of examination, the examiner assumes the “a height of profile of a circuit layout of the semiconductor component”.
Claims 22-35 and 38-40 are depend on the independent claims 21, and 36-37, then, they are also rejected.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
9. Claims 21, 29-30, 36-37 and 39 are rejected under 35 U.S.C. 103(a) as being unpatentable over HORI et al., hereafter “HORI” (U.S. Publication No. 2020/0118986 A1) in view of Funakoshi et al., hereafter “Funakoshi” (U.S. Publication No. 2009/0321924 A1).
Regarding claim 21, HORI discloses a semiconductor module, comprising:
a heat sink (2);
a substrate (30) connected to the heat sink (2), in particular by a material bond (30a/30b);
a semiconductor component (31) in contact with the substrate (30); and
a planar cooling element (6) designed to include a hermetically sealed duct structure for arrangement of a heat transport medium such that the hermetically sealed duct structure and the heat transport medium form a pulsating heat pipe (coolant channel 65, para [0046]), the planar cooling element (6) designed to establish a thermal connection between a substrate-distal side of the semiconductor component (31) and the heat sink (2) (Fig. 7 and para [0018]-[0046]).
HORI discloses the features of the claimed invention as discussed above, but does not disclose the planar cooling element designed to have a shape which is adapted to a height profile of a circuit layout of the semiconductor component having height offsets.
Funakoshi, however, discloses the planar cooling element (25) designed to have a shape which is adapted to a height profile of a circuit layout of the semiconductor component (1 and 2) having height offsets (fig. 1 and para [0033]-[0035]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of HORI to provide the planar cooling element designed to have a shape which is adapted to a height profile of a circuit layout of the semiconductor component having height offsets as taught by Funakoshi for a purpose of dissipating heat more quickly for the semiconductor module.
Regarding claim 29, HORI and Funakoshi (citations to HORI unless otherwise noted) discloses wherein the planar cooling element (6) is produced from a metal material, and further comprising an insulation layer (33) arranged between the semiconductor component (31) and the planar cooling element (6) (Fig. 7).
Regarding claim 30, HORI and Funakoshi (citations to HORI unless otherwise noted) discloses wherein the insulation layer (33) is designed as a film, in particular a plastic film, which is produced from an insulating material (Fig. 7 and para [0026]).
Regarding claim 36, HORI discloses a power converter, comprising a semiconductor module (3), said semiconductor module (3) comprising a heat sink (2), in particular by a material bond (30a/30b), a substrate (30) connected to the heat sink (2), a semiconductor component (31) in contact with the substrate (30), and a planar cooling element (6) designed to include a hermetically sealed duct structure for arrangement of a heat transport medium such that the hermetically sealed duct structure and the heat transport medium form a pulsating heat pipe (coolant channel 65, para [0046]), said planar cooling element designed to establish a thermal connection between a substrate-distal side of the semiconductor component (31) and the heat sink (2) (Fig. 7 and para [0018]-[0046]).
HORI discloses the features of the claimed invention as discussed above, but does not disclose the planar cooling element designed to have a shape which is adapted to a height profile of a circuit layout of the semiconductor component having height offsets.
Funakoshi, however, discloses the planar cooling element (25) designed to have a shape which is adapted to a height profile of a circuit layout of the semiconductor component (1 and 2) having height offsets (fig. 1 and para [0033]-[0035]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of HORI to provide the planar cooling element designed to have a shape which is adapted to a height profile of a circuit layout of the semiconductor component having height offsets as taught by Funakoshi for a purpose of dissipating heat more quickly for the semiconductor module.
Regarding claim 37, HORI discloses a method for producing a semiconductor module, the method comprising:
contacting a semiconductor component (31) with a substrate (30);
connecting the substrate (30) to a heat sink (2), in particular by a material bond (30a/30b);
designing a planar cooling element (6) with a hermetically sealed duct structure in which a heat transport medium is arranged; and
establishing a thermal connection between a substrate-distal side of the semiconductor component (31) and the heat sink (2) via the planar cooling element (6) so that a pulsating heat pipe (coolant channel 65, para [0046]) is formed by the hermetically sealed duct structure and the heat transport medium (Fig. 7 and para [0018]-[0046]).
HORI discloses the steps of the claimed invention as discussed above, but does not disclose a step of shaping the planar cooling to adapt to a height profile of a circuit layout of the semiconductor component having height offsets.
Funakoshi, however, discloses shaping the planar cooling element (25) designed to adapt to a height profile of a circuit layout of the semiconductor component (1 and 2) having height offsets (fig. 1 and para [0033]-[0035]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of HORI to provide shaping the planar cooling element designed to adapt to a height profile of a circuit layout of the semiconductor component having height offsets as taught by Funakoshi for a purpose of dissipating heat more quickly for the semiconductor module.
Regarding claim 39, HORI and Funakoshi (citations to HORI unless otherwise noted) discloses further comprising: producing the planar cooling element (6) from a metal material; and arranging an insulation layer (30a) between the semiconductor component (31) and the planar cooling element (6) (Fig. 7).
10. Claims 23 and 31 are rejected under 35 U.S.C. 103(a) as being unpatentable over HORI and Funakoshi in view of OSAWA S (WO-2020189508-A).
Regarding claim 23, HORI and Funakoshi disclose the features of the claimed invention as discussed above, but does not disclose wherein the planar cooling element is connected to the semiconductor component by a material bond or in a non-positive manner.
OSAWA S, however, discloses wherein the planar cooling element (3) is connected to the semiconductor component (2) by a material bond (5) or in a non-positive manner (Fig. 1 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of HORI and Funakoshi to provide wherein the planar cooling element is connected to the semiconductor component by a material bond or in a non-positive manner as taught by OSAWA S for a purpose of creating a larger heat dissipating path from the die to its external environment of the semiconductor module.
Regarding claim 31, HORI and Funakoshi disclose the features of the claimed invention as discussed above, but does not disclose wherein the planar cooling element is produced at least in part from a metal material and designed to be in direct contact with a contact surface of the semiconductor component.
OSAWA S, however, discloses wherein the planar cooling element (3) is produced at least in part from a metal material (5) and designed to be in direct contact with a contact surface of the semiconductor component (2) (Fig. 1 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of HORI and Funakoshi to provide wherein the planar cooling element is produced at least in part from a metal material and designed to be in direct contact with a contact surface of the semiconductor component as taught by OSAWA S for a purpose of creating a larger heat dissipating path from the die to its external environment of the semiconductor module.
11. Claim 28 is rejected under 35 U.S.C. 103(a) as being unpatentable over HORI and Funakoshi in view of KAWASHIMA T (JP-2019134018-A).
Regarding claim 28, HORI and Funakoshi disclose the features of the claimed invention as discussed above, but does not disclose wherein the planar cooling element is produced at least in part from a thermally conductive and electrically insulating material.
KAWASHIMA T, however, discloses wherein the planar cooling element (430) is produced at least in part from a thermally conductive (434/436) and electrically insulating material (432) (Fig. 7 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of HORI and Funakoshi to provide wherein the planar cooling element is produced at least in part from a thermally conductive and electrically insulating material as taught by KAWASHIMA T for a purpose of improving the heat dissipating for the semiconductor module.
Allowable Subject Matter
12. The following is a statement of reason for the indication of allowable subject matter:
Claims 22, 24-27, 32-35, 38 and 40 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Cited Prior Arts
13. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
GRASSMANN A (DE-102016117843-A1) discloses a semiconductor module, comprising:
a heat sink (108);
a substrate (DCB) connected to the heat sink (108);
a semiconductor component (102) in contact with the substrate (DCB); and
a planar cooling element (2), the planar cooling element (152) designed to establish a thermal connection between a substrate-distal side of the semiconductor component (DCB) and the heat sink (108) (Figs. 1-2 and English Text).
Conclusion
14. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PHUC T DANG/Primary Examiner, Art Unit 2897