Prosecution Insights
Last updated: October 23, 2026
Application No. 18/292,939

Display Panel and Display Device

Final Rejection §102§103
Filed
Jan 29, 2024
Priority
Mar 14, 2022 — CN 202210248760.9 +1 more
Examiner
QUINTO, KEVIN V
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE Technology Group Co., Ltd.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
738 granted / 867 resolved
+17.1% vs TC avg
Minimal +2% lift
Without
With
+1.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
19 currently pending
Career history
900
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
49.3%
+9.3% vs TC avg
§102
31.7%
-8.3% vs TC avg
§112
15.4%
-24.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 867 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 6-8, 10, and 25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kato et al. (United States Patent Application Publication No. US 2004/0217701 A1, hereinafter “Kato”). In reference to claim 1, Kato discloses a device which meets the claim. Fig. 8 and 9 of Kato disclose a display panel comprising at least a display region that comprises a base substrate (not explicitly shown but is below and supports (22)) and a plurality of sub-pixels (not explicitly shown but disclosed as being present - p. 4, paragraph 57) disposed on the base substrate. Each of the sub-pixels at least comprises a light emitting device (31) that is located in the display region. The light emitting device (31) comprises a first electrode (37), a light emitting layer (24), and a second electrode (25). The first electrode (37), light emitting layer (24), and second electrode (25) are disposed in sequence in a direction facing away from the base substrate. The display panel further comprises a heat conduction structure (38a, 39a, 39b, 40) disposed on a side of each first electrode (37) facing away from the light emitting layer (24), and an orthographic projection of the heat conduction structure (38a, 39a, 39b, 40) on the base substrate at least partially overlaps with an orthographic projection of the first electrode (37) on the base substrate. The display panel further comprises a heat dissipation structure (38b) disposed on a side of the heat conduction structure (38a, 39a, 39b, 40) facing away from the first electrode (37). The heat conduction structure (38a, 39a, 39b, 40) comprises a first heat conduction sheet (38a), a semiconductor layer (39a, 39b), and a second heat conduction sheet (40 - bottom) arranged in sequence in a direction facing away from the light emitting laver (24). The first heat conduction sheet (38a) is directly connected to the first electrode (37) of the light emitting device (31), and the second heat conduction sheet (40 – bottom) is connected to the heat dissipation structure (38b). With regard to claim 2, the heat conduction structures (38a, 39a, 39b, 40) and the light emitting devices are disposed in one-to-one correspondence. With regard to claim 6, the display panel is divided into a plurality of pixel units such that each of the pixel units comprises a plurality of sub-pixels (not explicitly shown but disclosed as being present - p. 4, paragraph 57), and at least part of the heat conduction structures (38a, 39a, 39b, 40) corresponding to each pixel unit is in an integral structure. In reference to claim 7, the heat conduction structure (38a, 39a, 39b, 40) and the heat dissipation structure (38b) are disposed on the side of the base substrate close to the first electrode (37). With regard to claim 8, the examiner notes that the currently filed specification states (p.7 of the substitute specification filed on January 29, 2024, emphasis added), “’Connect’, ‘join’, or a similar term is not limited to a physical or mechanical connection, but may include an electrical connection, whether direct or indirect.” Thus in the broadest reasonable interpretation of the claim, the examiner interprets, “on” in claim 8 to mean direct or indirect contact. Therefore the heat conduction structure (38a, 39a, 39b, 40) is disposed on a side of the base substrate close to the first electrode (37), and the heat dissipation structure (38b) is disposed on a side of the base substrate facing away from the first electrode (37). In reference to claim 10, fig. 4 and 5 of Choi disclose that the heat conduction structure (38a, 39a, 39b, 40) is disposed on a side of the base substrate facing away from the light emitting device (31). With regard to claim 25, the display panel of Kato is used in a display device. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kato in view of Chelle et al. (United States Patent Application Publication No. US 2018/0132470 A1, hereinafter “Chelle”). In reference to claim 9, Kato does not disclose that the heat dissipation structure (38b - fig. 9) comprises a copper alloy. However Chelle discloses the known use of a thermally conductive polymer material with thermally conductive copper alloy particles (p. 4, paragraphs 59-61). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See also In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960) (selection of a known plastic to make a container of a type made of plastics prior to the invention was held to be obvious). See MPEP 2144.07. In view of the above, it would therefore be obvious to use a thermally conductive polymer with copper alloy particles in the heat dissipation structure disclosed by Kato. Allowable Subject Matter Claims 11, 12, 16-20, 23, and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: in the examiner’s opinion, it would not be obvious to implement a display panel which comprises at least a display region with a plurality of sub-pixels disposed on a base substrate such that each of the sub-pixels at least comprises a light emitting device that is located in the display region; the light emitting device comprises a first electrode, a light emitting layer and a second electrode disposed in sequence in a direction facing away from the base substrate, with the display panel having a heat conduction structure formed of semiconductor layer between first and second heat conduction sheets that is disposed on a side of each first electrode facing away from the light emitting layer, and an orthographic projection of the heat conduction structure on the base substrate at least partially overlaps with an orthographic projection of the first electrode on the base substrate in combination with the suggested display panel layer structure required by the applicant in claim 24. In the examiner’s opinion, it would also not be obvious to implement a display panel which comprises at least a display region with a plurality of sub-pixels disposed on a base substrate such that each of the sub-pixels at least comprises a light emitting device that is located in the display region with the light emitting device having a first electrode, a light emitting layer and a second electrode disposed in sequence in a direction facing away from the base substrate, with the display panel having a heat conduction structure disposed on a side of each first electrode facing away from the light emitting layer, and an orthographic projection of the heat conduction structure on the base substrate at least partially overlaps with an orthographic projection of the first electrode on the base substrate in combination with the suggested heat conduction structure and control/sense signal implementation required by the applicant in claims 11, 17, 18, and 19. Response to Arguments Applicant’s arguments with respect to claims 1, 2, 6-12, 16-20, and 23-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN QUINTO whose telephone number is (571)272-1920. The examiner can normally be reached Monday-Friday, 9-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEVIN QUINTO/Examiner, Art Unit 2893 /Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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Prosecution Timeline

Jan 29, 2024
Application Filed
Apr 08, 2026
Non-Final Rejection mailed — §102, §103
Jul 08, 2026
Response Filed
Oct 02, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
87%
With Interview (+1.7%)
2y 6m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 867 resolved cases by this examiner. Grant probability derived from career allowance rate.

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