Prosecution Insights
Last updated: August 17, 2026
Application No. 18/293,783

DISPLAY SUBSTRATE AND PREPARATION METHOD THEREFOR, AND DISPLAY APPARATUS

Non-Final OA §102§103
Filed
Jan 31, 2024
Priority
Aug 11, 2021 — CN 202110917746.9 +1 more
Examiner
HO, ANTHONY
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1045 granted / 1149 resolved
+22.9% vs TC avg
Minimal +2% lift
Without
With
+2.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
23 currently pending
Career history
1172
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
36.0%
-4.0% vs TC avg
§102
36.8%
-3.2% vs TC avg
§112
16.5%
-23.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1149 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of Group 1, claims 1-17, in the reply filed on June 5, 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Accordingly, claim 18 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on June 5, 2026. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on July 30, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. The information disclosure statement (IDS) submitted on March 24, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 12, 13, and 17 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Ma et al (CN 109360851). In re claim 1, Ma et al discloses a display substrate, comprising a plurality of circuit units, a scan signal line (i.e. SCAN201) supplying a scan signal to the circuit units, and a first power supply line (i.e. PVDD201) supplying a power supply signal; wherein at least one circuit unit comprises a pixel drive circuit (i.e. 200) comprising a first shield electrode (i.e. MS201) connected with the first power supply line, an orthographic projection of the first shield electrode on a plane of the display substrate is at least partially overlapped with an orthographic projection of the scan signal line on the plane of the display substrate (i.e. seat least Figures 2-13; paragraphs 0060-0100). Furthermore, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have an orthographic projection of the first shield electrode on a plane of the display substrate is at least partially overlapped with an orthographic projection of the scan signal line on the plane of the display substrate as that is within the scope of one of ordinary skill in the art to accomplish. In re claim 12, Ma et al discloses wherein in a plane perpendicular to the display substrate, the display substrate comprises a semiconductor layer (i.e. POLY201), a first conductive layer (i.e. N221 or N212), a second conductive layer (i.e. MS201), a third conductive layer (i.e. NS211), and a fourth conductive layer (i.e. DATA201) that are sequentially disposed on a base substrate, and an insulation layer (i.e. I201) is disposed between the first conductive layer and the second conductive layer, between the second conductive layer and the third conductive layer, and between the third conductive layer and the fourth conductive layer; the first shield electrode, the first connection electrode and the scan signal line are located in different conductive layers (i.e. see at least Figures 3 and 11). In re claim 13, Ma et al discloses wherein the scan signal line is disposed in the first conductive layer, the first shield electrode is disposed in the second conductive layer, and a first connection electrode is disposed in the third conductive layer (i.e. see at least Figures 2-13). In re claim 17, the recitation “a display apparatus” in the claim preamble specifies an intended use or field of use and is treated as nonlimiting since it has been held that in device claims, intended use must result in a structural difference between the claim invention and the prior art in order to patentably distinguish the claim invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). A claim containing a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Allowable Subject Matter Claims 2-11 and 14-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY HO whose telephone number is (571)270-1432. The examiner can normally be reached 9AM - 5PM, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTHONY HO/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Jan 31, 2024
Application Filed
Jul 27, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
2y 10m to grant Granted Aug 11, 2026
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DISPLAY DEVICE
2y 8m to grant Granted Aug 04, 2026
Patent 12696679
FULLERENE DERIVATIVE AND PRODUCTION METHOD THEREFOR
3y 2m to grant Granted Jul 28, 2026
Patent 12694190
LAYOUT METHOD AND SEMICONDUCTOR STRUCTURE FOR IC
2y 6m to grant Granted Jul 28, 2026
Patent 12696506
SILICON CARBIDE WAFER AND SILICON CARBIDE SEMICONDUCTOR DEVICE INCLUDING THE SAME
2y 10m to grant Granted Jul 28, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
93%
With Interview (+2.4%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1149 resolved cases by this examiner. Grant probability derived from career allowance rate.

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