Prosecution Insights
Last updated: July 17, 2026
Application No. 18/296,221

X-RAY DETECTION SYSTEM

Non-Final OA §102§103§112
Filed
Apr 05, 2023
Priority
Apr 05, 2022 — EU 22166796.7
Examiner
TOOHEY, RICHARD ORLANDO
Art Unit
2884
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Teledyne Dalsa B V
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
54 granted / 64 resolved
+16.4% vs TC avg
Moderate +8% lift
Without
With
+7.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
27 currently pending
Career history
86
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
84.1%
+44.1% vs TC avg
§102
7.0%
-33.0% vs TC avg
§112
4.5%
-35.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 64 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claims 1, 22, 2, 25, 4, 24, 26-27, 3, 23, 18, and 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the active pixels having a 3T or 4T layout of claim 6, the storage capacitor of claim 26, and the readout circuitry being configured to reset the storage capacitor of claim 27 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 18 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 18, the phrase "such as" renders the claim indefinite because it is unclear whether the limitations following the phrase are part of the claimed invention. See MPEP § 2173.05(d). Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-2, 4, 7, 22, and 24-25 is/are rejected under 35 U.S.C. 102(a)(1) and 35 U.S.C. 102(a)(2) as being anticipated by Sakumura et al. US 2015/0213623. Regarding claim 1, Sakumura discloses an X-ray detecting system (fig. 1), comprising: an X-ray detector (130) comprising a pixel array (para. 0041 “two-dimensional detector”) and readout circuitry for reading out pixel signals of the pixel array (200), wherein the readout circuitry is configured for acquiring a plurality of frames during a single X-ray exposure (fig. 3; para. 0050-0052), each frame comprising pixel values for the pixels in the pixel array (para. 0041 “pixel detector”), and wherein the readout circuitry is configured to use an integration time for each frame that is a fraction of a total exposure time of the single X- ray exposure (fig. 5; para. 0050-0052; dividing the exposure time into sub-exposure times for each frame during a single exposure); and a processing unit for processing the pixel signals (200), wherein the processing unit comprises a frame summing unit and an X-ray image generating unit; wherein the frame summing unit is configured to, for each pixel of the pixel array: compare the pixel values of the acquired frames that correspond to that pixel for detecting a pixel value in those frames that was adversely affected by a direct hit of that pixel by an X-ray photon during said single exposure (fig. 5; para. 0063; abnormal pixel values includes, but is not limited to, direct X-ray hits, see para. 0011); and generate a pixel value for that pixel in dependence of the pixel values of the acquired frames, discarding the detected adversely affected pixel value for that pixel (fig. 5; para. 0064); wherein the X-ray image generating unit is configured to generate an X-ray image based on the generated pixel values for the pixels of the pixel array (fig. 10B). Regarding claim 2, Sakumura discloses wherein the X- ray detecting system does not comprise a fiber optic plate (there is no fiber optic plate in the system of Sakumura). Regarding claim 4, Sakumura discloses wherein the frame summing unit is configured to detect the pixel value by determining, for that pixel, an average value of the pixel values of the acquired frames (para. 0073), and to determine that a pixel value among the pixel values of the acquired frames is adversely affected by a direct hit of that pixel by an X-ray photon if that pixel value deviates more than a first threshold (para. 0063) from the determined average value and using the determination to detect the direct hit of that pixel by an X-ray photon during said single exposure (para. 0073). Regarding claim 7, Sakumura discloses the pixel array comprises a CMOS pixel array on a Silicon substrate (para. 0042; CMOS detector implies a silicon substrate). Regarding claim 20, Sakumura discloses an X-ray system, comprising: an X-ray source (110); and the X-ray detecting system according to claim 1 (see claim 1). Regarding claim 22, Sakumura discloses an X-ray detection method, comprising: emitting X-rays to an object (para. 0038-0039); converting X-rays having passed through the object into visible light (para. 0042; CCD or CMOS detectors in X-ray imaging arts implies the existence of a scintillator as part of the “X-ray receiving element”); detecting the visible light using a pixel array while X-rays generate direct hits in the pixel array, by acquiring multiple frames during a single X-ray exposure, wherein multiple frames are acquired using an integration time for each frame that is a fraction of a total exposure time of the single X-ray exposure (fig. 5; para. 0050-0052; dividing the exposure time into sub-exposure times for each frame during a single exposure);for each pixel of the pixel array, comparing pixel values of the acquired frames that correspond to that pixel for detecting a pixel value in those frames that was adversely affected by a direct hit of that pixel by an X-ray photon during said single exposure (fig. 5; para. 0063; abnormal pixel values includes, but is not limited to, direct X-ray hits, see para. 0011), and generating a pixel value for that pixel in dependence of the pixel values of the acquired frames, while discarding the detected adversely affected pixel value for that pixel (fig. 5; para. 0064); generating an X-ray image based on the generated pixel values for the pixels of the pixel array (fig. 10B). Regarding claim 24, Sakumura discloses wherein the frame summing unit is configured to detect the pixel value by determining, for that pixel, an average value of the pixel values of the acquired frames (para. 0073), and to determine that a pixel value among the pixel values of the acquired frames is adversely affected by a direct hit of that pixel by an X-ray photon if that pixel value deviates more than a first threshold (para. 0063) from the determined average value and using the determination to detect the direct hit of that pixel by an X-ray photon during said single exposure (para. 0073). Regarding claim 25, Sakumura discloses wherein said detecting the visible light comprises detecting the visible light using a pixel array (para. 0041) while X-rays, which have not passed through a fiber optic plate (there is no fiber optic plate in the system of Sakumura), generate direct hits in the pixel array (fig. 5; para. 0063; abnormal pixel values includes, but is not limited to, direct X-ray hits, see para. 0011). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Sakumura et al. US 2015/0213623 in view of Odogba et al. US 2004/0200969. Regarding claim 3, Sakumura discloses wherein the frame summing unit is configured to detect the pixel value by determining, for that pixel, a median value of the pixel values of the acquired frames, and to determine that a pixel value among the pixel values of the acquired frames is adversely affected if that pixel value deviates more than a first threshold from the determined median except that Sakumura uses the average value instead of the median value value (see Claim Rejections - 35 USC § 102 claim 4). Odogba shows that using the median value and the average value are commonly known statistical methods in the art (para. 0013-0014). Therefore, because these two statistical methods were art-recognized equivalents at the time the invention was made, one of ordinary skill in the art would have found it obvious to substitute using the median value for the average value. Regarding claim 23, Sakumura discloses wherein the frame summing unit is configured to detect the pixel value by determining, for that pixel, a median value of the pixel values of the acquired frames, and to determine that a pixel value among the pixel values of the acquired frames is adversely affected if that pixel value deviates more than a first threshold from the determined median except that Sakumura uses the average value instead of the median value value (see Claim Rejections - 35 USC § 102 claim 24). Odogba shows that using the median value and the average value are commonly known statistical methods in the art (para. 0013-0014). Therefore, because these two statistical methods were art-recognized equivalents at the time the invention was made, one of ordinary skill in the art would have found it obvious to substitute using the median value for the average value. Claims 5-6, 8, 18, 19, and 26-27 are rejected under 35 U.S.C. 103 as being unpatentable over Sakumura et al. US 2015/0213623 in view of Inoue et al. TW 2021/105987. Regarding claim 5, Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including wherein the pixel array comprises active pixels. Inoue teaches a CMOS sensor (pg. 3 para. 1) wherein the pixel array comprises active pixels (fig. 25E) which has improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have wherein the pixel array comprises active pixels as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Regarding claim 6, Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including wherein the active pixels have a 3T or 4T layout. Inoue teaches a CMOS sensor (pg. 3 para. 1) wherein the active pixels have a 3T or 4T layout (fig. 25E) which has improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have wherein the active pixels have a 3T or 4T layout as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Regarding claim 8, Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including having a carrier; a scintillator arranged on the carrier; a semiconductor substrate attached to the carrier on which substrate the pixel array and the readout circuitry are integrated. Inoue teaches a CMOS sensor (pg. 3 para. 1) comprising: a carrier (fig. 23 #671); a scintillator (fig. 23 #372) arranged on the carrier (fig. 23 #671); a semiconductor substrate (fig. 23 #611) attached to the carrier (671 is attached to the substrate 611 since the substrate is attached to the entire pixel) on which substrate (#611) the pixel array (561, 565a, 565b) and the readout circuitry (562, 563) are integrated (fig. 23 all layers are integrated on the substrate) which has improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a carrier; a scintillator arranged on the carrier; a semiconductor substrate attached to the carrier on which substrate the pixel array and the readout circuitry are integrated as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Regarding claim 18, Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including the carrier is made of one or more materials out of the group consisting of aluminum, amorphous carbon, and other light flexible organic substrate such as a polyimide or PET, wherein an absorption coefficient for X-ray radiation having an energy within a range between 20 and 150 keV lies in a range between 0.01 and 4 cm2/mg. Inoue teaches a CMOS sensor (pg. 3 para. 1) wherein the carrier is made of one or more materials out of the group consisting of aluminum (pg. 5 para. 3), amorphous carbon, and other light flexible organic substrate such as a polyimide or PET, wherein an absorption coefficient for X-ray radiation having an energy within a range between 20 and 150 keV lies in a range between 0.01 and 4 cm2/mg which has improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the carrier is made of one or more materials out of the group consisting of aluminum, amorphous carbon, and other light flexible organic substrate such as a polyimide or PET, wherein an absorption coefficient for X-ray radiation having an energy within a range between 20 and 150 keV lies in a range between 0.01 and 4 cm2/mg as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Regarding claim 19, Sakumura fails to teach wherein the frame summing unit is integrated on the semiconductor substrate. Inoue teaches the teadout circuitry (563) being integrated on the silicon substrate (611; pg. 18 para. 10) for the purpose of improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have wherein the frame summing unit is integrated on the semiconductor substrate as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Regarding claim 26, Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including, wherein each pixel of the pixel comprises a storage capacitor and is configured to, for each of a plurality of integration periods during the single X-ray exposure, store a charge associated with a generated photocurrent in the storage capacitor of that pixel during that integration period. Inoue teaches a CMOS sensor (pg. 3 para. 1), wherein each pixel of the pixel comprises a storage capacitor and is configured to, for each of a plurality of integration periods during the single X-ray exposure, store a charge associated with a generated photocurrent in the storage capacitor of that pixel during that integration period (fig. 25E Cs) which has improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have wherein each pixel of the pixel comprises a storage capacitor and is configured to, for each of a plurality of integration periods during the single X-ray exposure, store a charge associated with a generated photocurrent in the storage capacitor of that pixel during that integration period as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Regarding claim 27, Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including, wherein the readout circuitry is configured to read out each pixel after a respective integration period and to reset a voltage over the storage capacitor, the readout circuitry being further configured to store a collection of pixel values associated with the pixels of the pixel array generated based on the pixel signals of the pixel array obtained during a single integration period as a frame among said plurality of frames. Inoue teaches a CMOS sensor (pg. 3 para. 1), wherein the readout circuitry is configured to read out each pixel after a respective integration period and to reset a voltage over the storage capacitor, the readout circuitry being further configured to store a collection of pixel values associated with the pixels of the pixel array generated based on the pixel signals of the pixel array obtained during a single integration period as a frame among said plurality of frames (pg. 30 para. 11- pg. 33 para. 7) which has improved power efficiency and reduced size (pg. 3 para. 4). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have wherein the readout circuitry is configured to read out each pixel after a respective integration period and to reset a voltage over the storage capacitor, the readout circuitry being further configured to store a collection of pixel values associated with the pixels of the pixel array generated based on the pixel signals of the pixel array obtained during a single integration period as a frame among said plurality of frames as taught by Inoue in the system of Sakumura for the purpose of improved power efficiency and reduced size. Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Sakumura et al. US 2015/0213623 in view of Inoue et al. TW 2021/105987 and the webpage "Radiation Risk from Medical Imaging" published by Harvard Health Publishing (hereafter Harvard). Regarding claim 21, Sakumura teaches wherein the X-ray system is operable in a first operational mode in which the X-ray source is configured to emit X-rays (figs. 1 #110) and during said single exposure and such that the number of acquired frames exceeds 4 (claim 4; a plurality of frames is open ended and includes embodiments which exceeds 4). Sakumura teaches the detector being a pixel detector such as a CMOS or CCD detector (para. 0042), but fails to explicitly teach the details of the detector including wherein the pixels of the pixel array are active pixels that each have a storage capacity, wherein an integration time of the pixel array is such that a maximum filling level of the storage capacity stays between 1 and 50 percent during said single exposure, and the X-ray dose rate is in a range between 0.01 and 10 mGy. Inoue teaches wherein the pixels of the pixel array are active pixels that each have a storage capacity (figs. 25A-25#) which has improved power efficiency and reduced size (pg. 3 para. 4). Inoue does not explicitly disclose wherein an integration time of the pixel array is such that a maximum filling level of the storage capacity stays between 1 and 50 percent during said single exposure, but Inoue does teach the read threshold of the storage capacitor being tunable (fig. 25 BGL, M11; pg. 31 para. 7-8). However, one of ordinary skill in the art would have been led to recited range (the storage capacity stays between 1 and 50 percent) through routine experimentation and optimization. The Applicant has not disclosed that the range is for a particular unobvious purpose, produce an unexpected/significant result, or are otherwise critical, and it appears prima facie that the process would possess utility using another range. Indeed, it has been held that mere range limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. Harvard teaches that medical imaging dosages range from .001 mGy and 20+ mGy with the majority of imaging ranging from .01 and 10 mGy (Imaging procedures and their approximate effective energy radiation doses; note that mSv and mGy are converted 1:1) for the purpose of optimizing patient safety. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have wherein the pixels of the pixel array are active pixels that each have a storage capacity, wherein an integration time of the pixel array is such that a maximum filling level of the storage capacity stays between 1 and 50 percent during said single exposure, and the X-ray dose rate is in a range between 0.01 and 10 mGyas taught by Inoue and Harvard in the System of Sakumura for the purpose of improved power efficiency, reduced size, and improved safety. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Richard Toohey whose telephone number is (703)756-5818. The examiner can normally be reached Mon-Fri: 7:30am – 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, the applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uzma Alam can be reached on (571)272-2995. The fax number for the organization where this application or processing is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RICHARD O TOOHEY/Examiner, Art Unit 2884 /UZMA ALAM/Supervisory Patent Examiner, Art Unit 2884
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Prosecution Timeline

Show 4 earlier events
Sep 03, 2025
Response Filed
Dec 05, 2025
Final Rejection mailed — §102, §103, §112
Feb 05, 2026
Response after Non-Final Action
Mar 05, 2026
Request for Continued Examination
Mar 12, 2026
Response after Non-Final Action
Apr 10, 2026
Examiner Interview Summary
May 12, 2026
Response Filed
May 19, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
92%
With Interview (+7.9%)
2y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
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