DETAILED ACTION
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1 and 16, the limitation “wherein no p-side opening in the second insulating film is located above the first conductive layer at a position overlapping the first p-side openings of the first insulating film in the plan view,” is unclear as to how the “no p-side opening” is related to the previously recited “p-side opening.” It is further unclear as to what all element(s) would be precluded by “no p-side opening.” It is further unclear as to how “the first p-side openings” is related to the previously recited “plurality of p-side openings.”
Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 5, 6, 8, 9, 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yoon et al. (US 2020/0243721; herein “Yoon”).
Regarding claim 1, Yoon discloses in Figs. 1 and 2 and related text a light-emitting element comprising:
a semiconductor structure comprising an n-side semiconductor layer (115, see [0027]) , an active layer (120, see [0026]) located on the n-side semiconductor layer, and a p-side semiconductor layer (152, see [0029]) located on the active layer;
a first insulating film (130, see [0020]) located on the p-side semiconductor layer and having a plurality of first p-side openings (e.g. at least a subset of PD) located above the p-side semiconductor layer;
a first conductive layer (142/144, see [0038]-[0039]) located on the first insulating film and electrically connected to the p-side semiconductor layer at the plurality of first p-side openings;
a second insulating film (150, see [0020]) located on the first conductive layer and having a second p-side opening (CT3, see [0044]) located above the first conductive layer at a position away from the first p-side openings in a plan view (away from at least a subset of PD), wherein no p-side opening in the second insulating film is located above the first conductive layer at a position overlapping the first p-side openings of the first insulating film in the plan view (note that a subset of PD can be chosen as the “plurality of first p-side openings” such that CT3 does not overlap with the chosen subset);
a second conductive layer (155p, see [0020]) located on the second insulating film and electrically connected to the first conductive layer at the second p-side opening; and
at least one p-side electrode (165p/170P, see [0020]) located on the second conductive layer at a position away from the second p-side opening in the plan view.
Regarding claim 2, Yoon further discloses further comprising:
a third conductive layer (140, see [0020]) located between the p-side semiconductor layer (125) and the first insulating film (130);
wherein:
the first conductive layer (142/144) is in contact with the third conductive layer at the plurality of first p-side openings.
Regarding claims 5 and 6, Yoon further discloses
the at least one p-side electrode comprises a plurality of p-side electrodes (see Fig. 1) arranged side by side in a first direction in the plan view; and
the second p-side opening (CT3) of the second insulating film surrounds a region in which the plurality of p-side electrodes are located in the plan view (at least partially, see Fig. 1).
Regarding claims 8, 9, and 11, Yoon further discloses
the n-side semiconductor layer includes an exposed portion (portion at E) exposed from the p-side semiconductor layer and the active layer;
the first insulating film (130) extends continuously on the p-side semiconductor layer, the active layer, and the exposed portion;
the second insulating film (150) extends continuously on the first conductive layer and the first insulating film;
the first insulating film has a plurality of first n-side openings (at CT1) located above the exposed portion;
the second insulating film has a plurality of second n-side openings (at CT1) located above the exposed portion; and
the light-emitting element further comprises:
a fourth conductive layer (155n, see [0020]) located on the second insulating film and electrically connected to the n-side semiconductor layer at the first n-side openings and the second n-side openings; and
an n-side electrode (170n, see [0020]) located on the fourth conductive layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3, 4, 7 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoon.
Regarding claims 3 and 4, Yoon does not explicitly disclose a thickness of the first insulating film (130) is less than a thickness of the second insulating film (150).
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thicknesses to be a result effective variable affecting the electrical characteristics of the device such as the effective insulating ability and the parasitic capacitance, the mechanical characteristics of the device such as the adhesion between layers, and the overall size of the device. Thus, it would have been obvious to modify the device of Yoon to have the thicknesses within the claimed range in order to achieve a desired balance between various device characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art. Additionally, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yoon by having the relative thicknesses as claimed for the purpose of choosing from a finite number of identified, predictable solutions (i.e. same thickness, larger thickness, or smaller thickness), with a reasonable expectation of success (KSR International Co. v. Teleflex Inc. 82 USPQ2d 1385 (2007)).
Regarding claim 7, Yoon further discloses
the at least one p-side electrode comprises a plurality of p-side electrodes (see Fig. 1) arranged side by side in a first direction in the plan view; and
the second p-side opening (CT3) of the second insulating film surrounds a region in which the plurality of p-side electrodes are located in the plan view (at least partially, see Fig. 1).
Regarding claim 10, Yoon further discloses
the n-side semiconductor layer includes an exposed portion (portion at E) exposed from the p-side semiconductor layer and the active layer;
the first insulating film (130) extends continuously on the p-side semiconductor layer, the active layer, and the exposed portion;
the second insulating film (150) extends continuously on the first conductive layer and the first insulating film;
the first insulating film has a plurality of first n-side openings (at CT1) located above the exposed portion;
the second insulating film has a plurality of second n-side openings (at CT1) located above the exposed portion; and
the light-emitting element further comprises:
a fourth conductive layer (155n, see [0020]) located on the second insulating film and electrically connected to the n-side semiconductor layer at the first n-side openings and the second n-side openings; and
an n-side electrode (170n, see [0020]) located on the fourth conductive layer.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoon in view of Kamada et al. (US 2019/0267513; herein Kamada).
Regarding claim 16, Yoon discloses in Figs. 1, 2, 21 and related text a light-emitting device comprising:
a light emitting element comprising:
a semiconductor structure comprising an n-side semiconductor layer (115, see [0027]) , an active layer (120, see [0026]) located on the n-side semiconductor layer, and a p-side semiconductor layer (152, see [0029]) located on the active layer;
a first insulating film (130, see [0020]) located on the p-side semiconductor layer and having a plurality of first p-side openings (e.g. at least a subset of PD) located above the p-side semiconductor layer;
a first conductive layer (142/144, see [0038]-[0039]) located on the first insulating film and electrically connected to the p-side semiconductor layer at the plurality of first p-side openings;
a second insulating film (150, see [0020]) located on the first conductive layer and having a second p-side opening (CT3, see [0044]) located at a position away from the first p-side openings in the plan view (away from at least a subset of PD);
a second conductive layer (155p, see [0020]) located on the second insulating film and electrically connected to the first conductive layer at the second p-side opening; and
a wiring substrate (1010, see [0076]) comprising a first wiring portion (1012); and
a p-side electrode (165p/170P, see [0020]) located on the second conductive layer and electrically connected to the second conductive layer and the first wiring portion, the p-side electrode being located at a position away from the second p-side opening in the plan view.
Yoon does not explicitly disclose
the wiring substrate comprising an insulating base body, and a first wiring portion located on the insulating base body.
In the same field of endeavor, Kamada teaches in Fig. 10 and related text a light emitting device comprising
a wiring substrate (101/104/105/103, see [0084]-[0085]) comprising an insulating base body (101), and a first wiring (103) portion located on the insulating base body.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yoon by having the wiring substrate comprising an insulating base body, and a first wiring portion located on the insulating base body, as taught by Kamada, in order to employ a mounting substrate instead of a lead frame which allows for more complex integration/assembly of chips due to more robust wiring options.
Response to Arguments
Applicant's arguments filed 12/19/2025 have been fully considered but they are not persuasive.
Applicant argues (page 10-13) that Yoon does not teach or suggest the invention of claims 1 and 16 because CT3 overlaps with holes PD.
In response, the examiner disagrees. Specifically, it is noted that “a plurality of first p-side openings,” can be chosen as a subset of through holes PD. Accordingly, a subset can be chosen such that it does not include the PD which are overlapping with CT3, and therefore CT3 does not overlap with any of the claimed first p-side openings. For example, a subset including only PD which overlap with 155n can be chosen as the claimed “plurality of first p-side openings” and none of these first p-side openings overlap with CT3.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAUREN R BELL/Primary Examiner, Art Unit 2896 2/10/2026