DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 27, 2026, has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 5-6, 18, 25-26 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Kim et al (US 6,004,882).
As to claim 1, Kim discloses a microelectronic device (“semiconductor device” Fig. 1, col.3, lines 49-50), comprising:
a semiconductor substrate 102, 104 (polysilicon plug 104, col.3, lines 54-58);
a first patterned platinum feature 108 (Fig. 3) and a second patterned platinum feature 108 that are spaced apart from each other (as shown in Figure 3) over a top surface of the semiconductor substrate; and
an adhesive layer (TiN 106, col.4, line 1) disposed over the top surface of the semiconductor substrate and extending continuously from the first patterned platinum feature to the second patterned platinum feature (as shown in Fig. 3), the adhesive layer physically contacting the top surface of the semiconductor substrate 104, the first patterned platinum feature 108, and the second patterned platinum feature 108 (as shown in Fig. 3, no intervening layers are present).
As to claims 5 and 18, see the rejection of claim 1.
As to claim 6, see Figure 3, which depicts a sloped sidewall profile.
As to claims 25-26, Kim discloses different lengths as cited (as depicted in Figures 4A, 4B).
Claims 18, 21 and 24 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Meier et al (US 2018/0204767 A1).
Examiner notes that TiW and W adhesive layers are not present in the provisional application. Therefore, priority is granted to July 26, 2019, the filing date of 16/523,867.
Meier discloses a microelectronic device [0002], comprising
a semiconductor substrate 101 (for example, silicon, [0019]);
a platinum layer 105B disposed over a top surface of the semiconductor substrate (Fig.1G, [0027]); and
an adhesive layer 102 [0020] disposed over the top surface of the semiconductor substrate and having a bottom surface facing the semiconductor substrate and a top surface facing away from the semiconductor substrate (as depicted in Fig. 1G), the bottom surface of the adhesive layer physically contacting the top surface of the semiconductor substrate (as depicted in Fig. 1G) and the top surface of the adhesive physically contacting the platinum layer (as depicted in Fig. 1G), the adhesive layer including titanium nitride, or titanium tungsten [0020].
Claims 1, 5 and 14 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Furubayashi et al (US 4,649,365).
As to claim 1, Furubayashi discloses a microelectronic device (platinum resist, col.1, lines 7-8), comprising:
a semiconductor substrate 1 (silicon, col.4, lines 54-58);
a first patterned platinum feature 3 (Fig. 1, as defined by patterning with photoresist mask 4, col. 4, lines 9-10) and a second patterned platinum feature 3 that are spaced apart from each other (as shown in Figure 1) over a top surface of the semiconductor substrate; and
an adhesive layer (aluminum oxide 2, col.4, line 2) disposed over the top surface of the semiconductor substrate and extending continuously from the first patterned platinum feature to the second patterned platinum feature (as shown in Fig. 1), the adhesive layer physically contacting the top surface of the semiconductor substrate 1, the first patterned platinum feature 3, and the second patterned platinum feature 3 (as shown in Fig. 1, no intervening layers are present).
As to claim 5, see the rejection of claim 1.
As to claim 14, Furubayashi discloses a resistance thermometer device (see abstract).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882), as applied to claim 1, and further in view of Samuilov (US 2014/0021067 A1).
As to claim 13, Kim fails to disclose that the device is an electrochemical sensor. Samuilov teaches that it is useful to include platinum electrodes in electrochemical sensors [0035]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to include a platinum electrode as taught by the modified product of Kim as an electrode in an electrochemical sensor because Samuilov teaches that it is useful to include platinum electrodes in microelectronic devices with electrochemical sensors.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882) in view of Baxter et al (US 4,375,056).
As to claim 14, Baxter teaches that the microelectronic device includes a resistance thermometer device (see title). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have the microelectronic device of Kim includes a resistance thermometer device because Baxter teaches that it is a useful product to form with platinum electrodes.
Claims 15-16 and 33 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882) in view of CN 101777565 B.
As to claim 15, see the rejection of claim 1. Further, Kim discloses a sloped sidewall profile, but not necessarily a curved sidewall profile having a non-linear slope extending from the top surface to the bottom surface of the platinum layer. However, CN 101777565 B teaches that drawings are idealized and may not necessarily show the curved features of etching (“the reference images is schematic diagram of an idealized embodiment of the invention embodiment, the invention should not be considered limited to the specific shape of the area shown in the figure, but comprise obtained shapes, such as deviation caused by manufacturing. for example curve obtained by etching has a generally curved or rounded, but in this embodiment of the invention, represent, represented in the figure is schematic, but this should not be considered to limit the scope of the invention to rectangular.” [0040], emphasis added). Accordingly, CN 101777565 B teaches that it is generally well accepted, that drawings are idealized depictions of the etching, and etching forms curved or sloped sidewalls to at least some degree.
It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to provide a non-linear sloped, curved sidewall profile in the modified product of Kim because etching produces some roundness as part of the etching as recognized by CN 101777565 B and because idealized drawings don’t show the profile that is rounded due to etching.
As to claim 16, see the rejection of claim 1.
As to claim 33, Kim discloses that the adhesive layer has
a bottom surface facing the semiconductor substrate (the lower surface of layer 106, as depicted in Fig. 3) and
a top surface facing away from the semiconductor substrate (the upper surface of layer 106, as depicted in Fig. 3),
the bottom surface of the adhesive layer physically contacting the top surface of the semiconductor substrate (no intervening layers are present between 106 and 104, as depicted in Fig. 3) and
the top surface of the adhesive physically contacting the platinum layer (no intervening layers are present between 106 and 108, as depicted in Fig. 3).
Claim 34 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882), as applied to claim 33, and further in view of Marsh (US 8,593,784 B2).
As to claim 34, see the rejection of claim 1. Kim discloses that the adhesive layer comprises titanium nitride, not tantalum oxide, tantalum nitride or titanium oxide. Marsh teaches that useful adhesive layers for metals 14 such as platinum (col.3, line 48) include adhesion layer 12 comprising titanium nitride or tantalum nitride (col.3, lines 15-19). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to use tantalum nitride as an adhesion layer in the device of Kim because Marsh teaches that it is a useful alternative to titanium nitride and because tantalum nitride is expected to give the predictable result of providing desirable adherence properties of the platinum to the substrate.
Claims 15 and 28-32 are rejected under 35 U.S.C. 103 as being unpatentable over Feltz et al (US 5,864,148) ) in view of CN 101777565 B.
As to claim 15, Feltz discloses a microelectronic device (high-temperature gas sensor, abstract), comprising:
a semiconductor substrate 20 (Al2O3, Fig. 2a, col.5, line 11 – which reads on claim 29, wherein the semiconductor substrate is a sapphire substrate);
a platinum layer 26 (Fig. 2) 21 (Fig.2a) disposed over a top surface of the semiconductor substrate (directly on the substrate, Fig. 2a).
Feltz fails to disclose the cited curved sidewall profile. Drawings are idealized depictions and during masking and sputtering, it is expected that a curved sidewall profile is produced to at least some degree. CN 101777565 B teaches that drawings are idealized and may not necessarily show the curved features of etching (“the reference images is schematic diagram of an idealized embodiment of the invention embodiment, the invention should not be considered limited to the specific shape of the area shown in the figure, but comprise obtained shapes, such as deviation caused by manufacturing. for example curve obtained by etching has a generally curved or rounded, but in this embodiment of the invention, represent, represented in the figure is schematic, but this should not be considered to limit the scope of the invention to rectangular.” [0040], emphasis added). Accordingly, CN 101777565 B teaches that it is generally well accepted, that drawings are idealized depictions of the etching, and etching forms curved or sloped sidewalls to at least some degree.
It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to provide a curved sidewall profile with the cited top and bottom surfaces and a non-linear slope in the device of Feltz as a result of the processing to form the patterned platinum film and because etching produces some roundness as part of the etching as recognized by CN 101777565 B.
As to claims 28-30, Feltz discloses that the platinum layer is disposed directly on the sapphire substrate, which is wider than the platinum layer (Fig. 2, 2a).
As to claim 31, the phrase “sputtered etched surface” is interpreted broadly to include the surface sputtered as a result of the “masking and sputtering” used to form the platinum patterns (col.5, lines 13-15).
As to claim 32, Feltz fails to disclose to use a silicon substrate. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to use a silicon substrate in the device of Feltz because it is a well known substrate and expected to give the predictable result of a device ready to form a microelectronic device.
Claims 6, 15-16, 33 and 35-36 are rejected under 35 U.S.C. 103 as being unpatentable over Furubayashi et al (US 4,649,365) in view of CN 101777565 B.
As to claim 6, the rejection of claim 15 is repeated here. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to provide a sloped sidewall profile in the device of Furubayashi as a result of the processing to form the patterned platinum film. Additionally, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to provide a sloped sidewall profile in the device of Furubayashi because etching produces some roundness as part of the etching and because idealized drawings do not show the profile that is rounded due to etching as taught by CN 101777565 B.
As to claim 15, Furubayashi discloses a microelectronic device, comprising:
a semiconductor substrate 1 (silicon, col.4, line 2); and
a platinum layer 3 disposed over the semiconductor substrate (as depicted in Fig.1), the platinum layer having a top surface facing away from the semiconductor substrate and a bottom surface facing the semiconductor substrate, the platinum layer having a sidewall profile (as depicted in Fig. 1).
Furubayashi fails to disclose that the platinum layer has a curved sidewall profile having a non-linear slope extending from the top surface to the bottom surface of the platinum layer. However, drawings are idealized depictions and during masking and sputtering, it is expected that a curved sidewall profile is produced to at least some degree. CN 101777565 B teaches that drawings are idealized and may not necessarily show the curved features of etching (“the reference images is schematic diagram of an idealized embodiment of the invention embodiment, the invention should not be considered limited to the specific shape of the area shown in the figure, but comprise obtained shapes, such as deviation caused by manufacturing. for example curve obtained by etching has a generally curved or rounded, but in this embodiment of the invention, represent, represented in the figure is schematic, but this should not be considered to limit the scope of the invention to rectangular.” [0040], emphasis added). Accordingly, CN 101777565 B teaches that it is generally well accepted, that drawings are idealized depictions of the etching, and etching forms curved or sloped sidewalls to at least some degree.
It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to provide a curved sidewall profile with the cited top and bottom surfaces and a non-linear slope in the device of Furubayashi as a result of the processing to form the patterned platinum film. Additionally, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to provide a non-linear sloped, curved sidewall profile in the modified product of Furubayashi because etching produces some roundness as part of the etching and because idealized drawings don’t show the profile that is rounded due to etching as taught by CN 101777565 B.
As to claim 16, Furubayashi discloses an adhesive layer of aluminum oxide (col.4, line 2).
As to claim 33, Furubayashi discloses that the adhesive layer physically contacts the semiconductor substrate and platinum layer as cited (see Fig. 1).
As to claim 35, Furubayashi discloses an adhesive layer of aluminum oxide (col.4, line 2).
As to claim 36, Furubayashi discloses that the semiconductor substrate includes silicon (col.4, line 2).
Response to Amendment
Claims 1, 5-6, 18, 25-26 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Kim et al (US 6,004,882). The substrate in Kim is newly defined as 102, 104 in order to read on the claim as amended.
Claims 18, 21 and 24 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Meier et al (US 2018/0204767 A1). The patent number used in this rejection has been corrected.
Claims 1, 5 and 14 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Furubayashi et al (US 4,649,365). Furubayashi is newly applied to reject new claims 35-36, but also anticipates claims 1, 5 and 14.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882), as applied to claim 1, and further in view of Samuilov (US 2014/0021067 A1). This rejection is unchanged.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882) in view of Baxter et al (US 4,375,056). This rejection is unchanged.
Claims 15-16 and 33 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882) in view of CN 101777565 B. Applicant’s point is well taken that the obviousness rejection of claim 15 means that this should be a rejection under 35 USC 103. CN 101777565 B is newly applied to show that etched features depicted in drawings as rectangular are idealized, when they are rounded.
Claim 34 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 6,004,882), as applied to claim 33, and further in view of Marsh (US 8,593,784 B2). Marsh is newly applied to teach the limitations of new claim 33.
Claims 15 and 28-32 are rejected under 35 U.S.C. 103 as being unpatentable over Feltz et al (US 5,864,148) ) in view of CN 101777565 B. CN 101777565 B is cited to show that drawings are idealized and etching produces rounded profiles, to at least some degree.
Claims 6, 15-16, 33 and 35-36 are rejected under 35 U.S.C. 103 as being unpatentable over Furubayashi et al (US 4,649,365) in view of CN 101777565 B. Furubayashi is newly applied to reject new claims 35-36, but also reads on claims 6, 15-16 and 33.
Response to Arguments
Applicant's arguments filed January 27, 2026, have been fully considered but they are not persuasive, to the extent they still apply.
Applicant argues that Kim does not teach that semiconductor substrate 100 does not physically contact the adhesive layer 106. However, the claim has open “comprising” language and a substrate includes layers on top of the substrate. To reject claim 1, the substrate has been defined as layers 102, 104, which includes the semiconductor polysilicon 104. Thus, Kim anticipates the rejection, as explained above in the rejection under 35 USC 102.
As to the obviousness of the curved sidewalls in Kim or Feltz, drawings are idealized figures. One of ordinary skill in the art would recognize that etching forms sloped, curved sidewalls, to at least some degree, as taught by CN 101777565 B. However, it is recognized that the parent applications to the instant application have been allowed. Applicant should consider using product-by-process limitations to define the sidewall in order to pass this application to issue.
Conclusion
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/ANITA K ALANKO/ Patent Examiner, Art Unit 1713