DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/17/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3, 5-6, 9-13, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (PG Pub. No. US 2022/0013472 A1) in view of Lee et al. (PG Pub. No. US 2016/0133571 A1).
Regarding claim 1, Han teaches an electronic component module (¶ 0031: 300) comprising:
a substrate (¶ 0031: 302) having a main surface (top surface);
a plurality of electronic components including a bottom surface of a first electronic component (¶ 0031: 312A/312B, 314, 316 and/or 318 among others) and mounted on the main surface of the substrate (figs. 3, 13: at least 312A/312B mounted on top surface of 302), the first electronic component including a grounding terminal at a side end portion (¶ 0035 & fig. 13: terminal 1302 of 312A connected to ground wiring 402, meeting the broadest reasonable interpretation of “grounding terminal”);
an insulating sealing resin (¶ 0036: 404) covering the plurality of electronic components and the main surface of the substrate (fig. 13: 404 covers 312A/312B/312C and top surface of 302);
a conductive film (¶ 0038: 602) covering an outer surface of the sealing resin (fig. 13: 602 covers outer surface of 404); and
a conductive chip (¶ 0046: 312C, including conductive properties) disposed on a top surface of the first electronic component in a normal direction of the main surface and connected to the grounding terminal of the first electronic component (fig. 13: 312C disposed on top surface of 312A and/or 312B and electrically connected to terminal 1302), wherein
the conductive film is connected to the conductive chip (fig. 13: 602 connected to terminal 1304 of 312C),
the sealing resin includes a concave portion in a portion overlapping the conductive chip as viewed in the normal direction of the main surface (fig. 13: 404 includes a concave portion overlapping terminal 1304 of 312C),
the conductive film has a portion provided in the concave portion (fig. 13: 602 include portion disposed in concave of 404),
the portion of the conductive film provided in the concave portion is connected to the conductive chip (fig. 13: portion of 602 disposed in concave of 404 electrically connected to 312C),
the plurality of electronic components includes a second electronic component (312B),
the second electronic component includes a grounding terminal at a side end portion (¶¶ 0045-0046 & fig. 13: 312B comprises conductive contact 1306 electrically connected to ground wiring 402), and
the conductive chip is disposed on the top surface of the first electronic component and a top surface of the second electronic component in the normal direction of the main surface (fig. 13: 312C disposed on top surfaces of 312A and 312B), and connected to the grounding terminal of the first electronic component and the grounding terminal of the second electronic component (fig. 13: 312C at least electrically connected to contact terminals 1302 and 1306).
Han does not explicitly teach the conductive chip is or comprises metal, or the concave portion is disposed on at least a portion between an area overlapping the first electronic component and an area overlapping the second electronic component in the normal direction of the main surface.
Lee teaches an electronic component module (fig. 13C among others) including a conductive metal chip (¶ 0123: bridge 1310, comprising metal, meeting the broadest reasonable interpretation of ‘conductive metal chip’) disposed on top surfaces of first and second electronic components (¶ 0123 & fig. 13A: 1310 disposed on top surfaces of die 1306 and 1308) and connected to terminals of the first and second electronic components (¶ 0123 & fig. 13A: 1310 electrically connected to terminals 1326 and 1328). Lee further teaches an encapsulant (¶ 0124: 1320) with a concave portion overlapping the conductive metal chip (fig. 13A: 1320 includes recess overlapping 1310), the concave portion is disposed on at least a portion between an area overlapping the first electronic component and an area overlapping the second electronic component in the normal direction of the main surface (fig. 13A: recess in 1320 overlaps an area between 1306 and 1308)
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the conductive chip of Han to at least comprise metal, as a means to provide to provide high density interconnects (Lee, ¶ 0062) with a better form factor (Lee, ¶ 0007) between the electronic components of Han. Furthermore, arranging the concave portion between the electronic components allows for optimization of the placement of the conductive metal chip, minimizing package size and/or area.
Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In the instant case, metal would be suitable to for use as at least a terminal portion of the conductive chip of Han.
Regarding claim 3, Han in view of Lee teaches the electronic component module according to claim 1, wherein the first electronic component and the second electronic component are disposed adjacent to each other (Han, fig. 13: 312A disposed adjacent to 312B).
Regarding claim 5, Han in view of Lee teaches the electronic component module according to claim 1, wherein
the plurality of electronic components includes a third electronic component (Han, figs. 3, 13: additional 312A and/or 312B),
the third electronic component is disposed between the first electronic component and the second electronic component (Han, figs. 3, 13: at least one additional 312 component disposed between first and second 312 components), and
the conductive metal chip and the third electronic component are spaced apart from each other (Han, 312C at least vertically spaced from additional 312).
Regarding claim 6, Han in view of Lee teaches the electronic component module according to claim 1, wherein
the plurality of electronic components includes a fourth electronic component (Han, figs. 3, 13: at least one additional 312A and/or 312B),
the fourth electronic component includes a grounding terminal on a bottom surface (Han, fig. 13; additional 312 includes end terminal connected to ground wiring 402), and
the conductive metal chip is disposed on a side opposite to the substrate in the first electronic component and the fourth electronic component in the normal direction of the main surface (Han, fig. 13: 312C disposed above additional 312), connected to the grounding terminal of the first electronic component (fig. 13: 312C at least electrically connected to terminal of additional 312), and in contact with a top surface of the fourth electronic component (Han, fig. 13: 312C in electrical contact with additional 312).
Regarding claim 9, Han in view of Lee teaches the electronic component module according to claim 6, wherein
the plurality of electronic components includes a fifth electronic component (Han, figs. 3, 13: second additional 312),
the fifth electronic component is disposed between the first electronic component and the fourth electronic component (Han, fig. 13: at least one additional 312 disposed between 312A and second additional 312), and
the conductive metal chip and the fifth electronic component are spaced apart from each other (Han, 312C at least vertically spaced from second additional 312).
Regarding claim 10, Han in view of Lee teaches the electronic component module according to claim 1, wherein some of the plurality of electronic components overlapping the conductive metal chip (Han, fig. 13: at least some of 312A/312B overlap 312C) and the conductive metal chip are disposed between at least one electronic component constituting a specific functional circuit of a high frequency module and other electronic components as viewed in the normal direction of the main surface (Han, ¶¶ 0031-0033, fig. 3: 312C of component group 312 disposed between at least one high frequency module 304 and other components such as 318, 306 and 308).
Regarding claim 11, Han in view of Lee teaches the electronic component module according to claim 10, wherein some of the plurality of electronic components overlapping the conductive metal chip (Han, fig. 13: at least some of 312A/312B overlap 312C) and the conductive metal chip is disposed so as to surround at least two sides of the at least one electronic component constituting the specific functional circuit as viewed in the normal direction of the main surface (Han, fig. 3: 312/319 surrounds two sides of 304).
Regarding claim 12, Han in view of Lee teaches the electronic component module according to claim 10, wherein the specific functional circuit includes an amplifying element of a reception system of a high frequency signal (Han, ¶ 0032).
Regarding claim 13, Han in view of Lee teaches the electronic component module according to claim 1, wherein
the plurality of electronic components comprises a plurality of shield target electronic components disposed so as to interpose the first electronic component and the conductive metal chip as viewed in the normal direction of the main surface (Han, ¶ 0031, fig. 3: EMI shields interposed with 312), wherein
a distance between some of the plurality of electronic components disposed between the plurality of shield target electronic components is shorter than a distance between others of the plurality of electronic components disposed at a position different from a position between the plurality of shield target electronic components (Han, fig. 3: distance between 306 and 310 different from distance between 304 and 310.
Regarding claim 16, Han in view of Lee teaches the electronic component module according to claim 3, wherein
the plurality of electronic components includes a fourth electronic component (Han, fig. 13; at least one additional 312A/312B),
the fourth electronic component includes a grounding terminal on a bottom surface (Han, fig. 13: additional 312A/312B includes end terminal with bottom surface connected to ground wiring 402), and
the conductive metal chip is disposed on a side opposite to the substrate in (from?) the first electronic component and the fourth electronic component in the normal direction of the main surface (Han, fig. 13: 312C disposed above top surface of additional 312A/312B), connected to the grounding terminal of the first electronic component (additional 312A/312B includes end terminal connected to ground wiring 402), and in contact with a top surface of the fourth electronic component (312C at least electrically contacts additional 312A/312B).
Regarding claim 20, Han in view of Lee teaches the electronic component module according to claim 3, wherein some of the plurality of electronic components overlap the conductive metal chip (Han, fig. 13: at least some of 312A/312B overlap 312C) and the conductive metal chip are disposed between at least one electronic component constituting a specific functional circuit of a high frequency module and other electronic components as viewed in the normal direction of the main surface (Han, ¶¶ 0031-0033, fig. 3: 312C of component group 312 disposed between at least one high frequency module 304 and other components such as 318, 306 and 308).
Claims 4, 14 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Han in view of Lee as applied to claims 1 and 3 above, and further in view of Chuang (PG Pub. No. US 2021/0305170 A1).
Regarding claims 4 and 14, Han in view of Lee teaches the electronic component modules according to claims 1 and 3, comprising first and second electronic components (Han, 312A, 312B of component group 312 among others), and a conductive metal chip (Han, 312C as modified by Lee to at least comprise metal) overlapping the first and second electronic components (Han, fig. 13).
Han in view of Lee does not teach wherein the first electronic component is lower in height than the second electronic component, and
the conductive metal chip includes a portion overlapping the first electronic component thicker than a portion overlapping the second electronic component as viewed in the normal direction of the main surface.
Chuang teaches an electronic component module (fig. 12 among others) including comprising first and second electronic components (¶ 0021: 107/109/111/113),
wherein a first electronic component is lower in height than a second electronic component (¶¶ 0032-0034 & fig. 12: 107/109/11/113 have different heights).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the module of Han in view of Lee with different component heights, as a means to a system on chip module (Chuang, ¶ 0031), enhancing module functionality (Chuang, ¶ 0030).
Furthermore, said artisan would recognize to adjust the conductive metal chip to include a portion overlapping the first electronic component thicker than a portion overlapping the second electronic component as viewed in the normal direction of the main surface, as a means to provide component connectivity of Han in view of Lee with the component height of Chuang.
Regarding claim 17, Han in view of Lee and Chuang teaches the electronic component module according to claim 4, wherein
the plurality of electronic components includes a fourth electronic component (Han, fig. 13; at least one additional 312A/312B),
the fourth electronic component includes a grounding terminal on a bottom surface (Han, fig. 13: additional 312A/312B includes end terminal with bottom surface connected to ground wiring 402), and
the conductive metal chip is disposed on a side opposite to the substrate in the first electronic component and the fourth electronic component in the normal direction of the main surface (Han, fig. 13: 312C disposed above top surface of additional 312A/312B), connected to the grounding terminal of the first electronic component (Han, additional 312A/312B includes end terminal connected to ground wiring 402), and in contact with a top surface of the fourth electronic component (Han, 312C at least electrically contacts additional 312A/312B).
Claims 7-8 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Han in view of Lee as applied to claim 6 above, and further in view of Krefft et al. (PG Pub. No. US 2020/0203287 A1).
Regarding claim 7, Han in view of Lee teaches the electronic component module according to claim 6, including a portion of the conductive metal chip overlapping the fourth electronic component (Han, fig. 13).
Han does not teach the electronic component module further comprising
an insulating film disposed in a portion of the conductive chip overlapping the fourth electronic component and covering the conductive metal chip.
Krefft teaches an electronic component module (fig. 2 among others) including an insulating film (¶ 0028: 220 and/or 228) disposed in a portion of a conductive chip (¶ 0028: 222) overlapping a fourth electronic component (210 and/or 212) and covering the conductive chip (fig. 2: 220/228 at least indirectly cover bottom surfaces of 222).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the electronic component module of Han in view of Lee with an insulating film, as a means to provide a means to provide routing for connection to a redistribution layer (Krefft, ¶ 0028), increasing device functionality.
Regarding claim 8, Han in view of Lee and Krefft teaches the electronic component module according to claim 7, wherein the first electronic component and the fourth electronic component are disposed adjacent to each other (Han, fig. 13: plurality of 312 disposed laterally adjacent).
Regarding claim 18, Han in view of Lee and Krefft teaches the e electronic component module according to claim 7, wherein
the plurality of electronic components includes a fifth electronic component (Han, figs. 3, 13: at least on additional component),
the fifth electronic component is disposed between the first electronic component and the fourth electronic component (Han, figs. 3, 13: at least on additional component disposed between first and fourth components), and
the conductive metal chip and the fifth electronic component are spaced apart from each other (Han, fig. 13: 312C vertically spaced from additional 312).
Response to Arguments
Applicant’s arguments filed on 3/10/2026 with respect to the 35 USC § 103 rejections of claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/BRIAN TURNER/Examiner, Art Unit 2818