DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 16 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gogl et al US Patent Pub. No. 2006/0289970 in view of Chuang et al. U.S. Patent Pub No. 2022/0344578.
Regarding claim 16,
Gogl et al. discloses:
Mu-metal or silicon steel (206);
A first sidewall having a first thickness;
A second sidewall having a second thickness that is different from the first thickness; and a ceiling connecting the first sidewall and the second sidewall, the ceiling comprising:
A first ceiling portion having a third thickness, wherein the first ceiling portion is connected to the first sidewall; and
A second ceiling portion having a fourth thickness that is different from the third thickness, wherein the second ceiling portion is connected to the first ceiling portion and the second sidewall [0029].
Regarding claim 17, Gogl does not disclose.
wherein: the first thickness is in a range of 0.1 to 1 millimeter,
the second thickness is in a range of 0.2 to 1 millimeter,
the third thickness is in range of 0.1 to 0.4 millimeters and the fourth thickness is in a range of 0.1 to 1 millimeter.
Gogl does not disclose the changes in thickness of different portions of the ceiling and the difference of thicknesses of the first and second sidewalls.
Chuang teaches a shielding made of silicon steel [0026].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gogl in view of Chuang to meet the limitations of changed thickness by design choices and by the device shielded in order to solve for the states of the chips from being wrongfully changed.
Claim(s) 1, 5-12, 14, 15 and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rajoo et al. U.S. Patent pub No. 2023/0056509 in view of Rubin et al. U.S. Patent Pub. No. 2021/0134724 and Gogl et al US Patent Pub. No. 2006/0289970.
Regarding claim 1,
Rajoo et al. discloses:
A shielding assembly (100), comprising:
a chip package (102/104) structure sensitive to magnetic interference (MI) or electromagnetic interference (EMI) [0028] and
a shield surrounding sidewalls (110) and top surfaces of the chip package, wherein the shield comprises a magnetic shielding material [0028].
Rajoo et al. does not teach:
a first chip package structure;
a second chip package structure;
and
a shield surrounding sidewalls and top surfaces of the first chip package structure and the second chip package structure, wherein the shield comprises a magnetic shielding material.
However, Rubin et al. teaches:
A multi-chip package structures (100) in which multiple IC chips are bonded to a single wafer/panel-level redistribution layer structure [0038]. The multi-chip package structure (100) comprises package substrate (110), an interconnect bridge device (120), a first chip package (130), and a second chip package (140) [0038].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a first chip package structure; a second chip package structure; and a shield surrounding sidewalls and top surfaces of the first chip package structure and the second chip package structure, wherein the shield comprises a magnetic shielding material, as taught by Rubin by implementing either a magnetic and electromagnetic devices of Rajoo. Such a modification would be useful to avoid crosstalk (magnetic and electromagnetic) from neighboring electrical components.
Rajoo in view Rubin does not teach
a shield surrounding sidewalls and top surfaces of the first chip package structure and the second chip package structure, wherein the shield comprises a magnetic shielding material comprising Mu-metal material.
Gogl teaches:
A shielding member used in chip packaging that uses a Mu-metal [0029].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a Mu-metal material as magnetic shielding material as taught by Gogl to solve for the states of the chips from being wrongfully changed.
Regarding claim 5, Gogl teaches wherein the magnetic shielding material further comprises 70% to 80% nickel (Ni) and 10% to 25% iron (Fe) [0029].
Regarding claim 6, Gogl teaches wherein the magnetic shielding material comprises less than or equal to 5% copper (Cu) [0029].
Regarding claim 7, Gogl teaches wherein the magnetic shielding material comprises less than or equal to 5% molybdenum (Mo) [0029].
Regarding claim 8, Gogl teaches wherein the magnetic shielding material comprises less than or equal to 5% chromium (Cr) [0029].
Regarding claim 9, Rubin teaches wherein the shield has a thickness greater than 0.1 millimeters (design choice).
Regarding claim 10, Rubin teaches wherein the shield comprises sidewalls and ceiling connected to the sidewalls and wherein the sidewalls and the ceiling have thicknesses in a range between 0.1 millimeters and 1 millimeter (design choice).
Regarding claim 11, Rubin teaches wherein the shield comprises:
A first sidewall proximate to and parallel with a sidewall of the first chip package structure;
A second sidewall proximate to and parallel with a sidewall of the second chip package structure; and
A ceiling connecting the first sidewall and the second sidewall, the ceiling comprising:
A first ceiling portion proximate to and parallel with a top surface of the first chip package structure, wherein the first ceiling portion is connected to the first sidewall; and
A second ceiling portion proximate to and parallel with a top surface of the second package structure, wherein the second ceiling portion is connected to the first ceiling portion and the second sidewall (design choice).
Regarding claim 12, Rubin discloses wherein:
A first distance between the first sidewall and the sidewall of the first chip package structure is in a range of 0.01 to 5 millimeters,
A second distance between the first ceiling portion and the top surface of the first chip package structure is greater than 0.1 millimeters,
A third distance between the second ceiling portion and the top surface of the second chip package structure is greater than 0.1 millimeters, and
A fourth distance between the second sidewall and the sidewall of the second chip package structure is in a range of 0.01 to 10 millimeters (design choice).
Regarding claim 14, Rajoo in view of Rubin and Gogl discloses wherein the first chip package structure (130), the second chip package structure (140), and the shield are within the same chip package structure, wherein the shield is a package- level shield and wherein the shield comprises a divider portion that is positioned between proximate sidewalls of the first chip package structure and the second clip package structure (design choice).
Regarding claim 15,
Rubin discloses a flip-chip assembly [0045] and an IC chip that can be any specialized processor [0046].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify The combination of Rajoo in view of Rubin and Gogl with the first chip package structure is a magnetoresistive random- access memory (MRAM) device and the second chip package structure is a radio frequency device as taught by Rubin. Such a modification is a reasonable design choice.
Regarding claim 18,
Rajoo in view of Rubin and Gogl discloses,
forming a printed circuit board (PCB) (Rubin Fig 6G, 604);
forming a first chip package structure sensitive to magnetic interference (MI) on the PCB (discussed in the rejection of claim 15);
forming a second chip package structure sensitive to electromagnetic interference (EMI) on the PCB (discussed in the rejection of claim 15);
forming a shield using Mu-metal or silicon steel; and
attaching the shield to the PCB to encapsulate the first chip package structure and the second chip package structure (discussed in the rejection of claim 15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form a printed circuit board (PCB) with a shield of Mu-metal Rajoo in view of Rubin and Gogl, as taught by Rubin by implementing either a magnetic and electromagnetic devices of Rajoo. Such a modification would be useful to avoid crosstalk (magnetic and electromagnetic) from neighboring electrical components and to solve for the states of the chips from being wrongfully changed.
Regarding claim 11, Rubin teaches wherein the shield comprises:
forming a first sidewall having a first thickness;
forming a second sidewall having a second thickness that is different from the first thickness;
forming a first ceiling portion having a third thickness, wherein the first ceiling portion is connected to the first sidewall; and
forming a second ceiling portion having a fourth thickness that is different from the third thickness, wherein the second ceiling portion is connected to the first ceiling portion and the second sidewall (design choice).
Regarding claim 20, Rubin discloses wherein:
A first distance between the first sidewall and the sidewall of the first chip package structure is in a range of 0.01 to 5 millimeters,
A second distance between the first ceiling portion and the top surface of the first chip package structure is greater than 0.1 millimeters,
A third distance between the second ceiling portion and the top surface of the second chip package structure is greater than 0.1 millimeters, and
A fourth distance between the second sidewall and the sidewall of the second chip package structure is in a range of 0.01 to 10 millimeters (design choice).
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable Rajoo et al. U.S. Patent pub No. 2023/0056509 in view of Rubin et al. U.S. Patent Pub. No. 2021/0134724 and Gogl et al US Patent Pub. No. 2006/0289970 over as applied to claim 1 above, and further in view of Chuang et al. US Patent Pub. No. 2022/0344578.
Regarding claim 2
Rajoo et al. in view of Rubin et al and Gogl et al. does not teach the magnetic shielding material
comprises silicon steel.
Chuang discloses the semiconductor chip (110) is a magnetic sensitive memory chip, such as a magnetic random access memory (MRAM) chip [0017]. In some embodiments, the top plate (210) and the bottom plate (220) of the magnetic shielding structure (200) is silicon steel [0026].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Rajoo in view Rubin and Gogl with the magnetic shielding material comprises silicon steel as taught by Chuang. Such a modification would be useful to avoid crosstalk (magnetic and electromagnetic) from neighboring electrical components.
Allowable Subject Matter
Claims 3, 13 and 21 are allowed.
The prior art does not disclose the magnetic shielding material comprises 6.5% silicon of claim 3, and that the shielding used in the first portion are different materials than those used in the second portion of claims 13 and 21.
Response to Arguments
Applicant’s arguments, toward a Mu-metal in claim 1 , filed 10/23/2025, with respect to the rejection(s) of claim(s) 1 under Rajoo in view of Rubin have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Rajoo in view of Rubin and Gogl.
The action is NON-FINAL.
Conclusion
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/WALTER L LINDSAY JR/ Supervisory Patent Examiner, Art Unit 2852