Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Analysis for Independent Claims (Dependent Claim Analysis will follow)
Claim Rejections - 35 USC § 102
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1,6, 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (hereinafter Kim, US 2022/0130998).
In regards to independent claim 1, Kim teaches a SiC MOSFET power semiconductor device comprising:
a substrate (Kim, Fig. 34, Item 810);
a lightly doped second conductivity type drift region on the substrate (Kim, Fig. 34, 820, “a lightly-doped (n.sup.−) silicon carbide drift region 820”);
a first conductivity type well in the drift region (Kim, Fig. 34, Item 832, “moderately-doped silicon carbide p-well regions 832_1 and 832_2 on the drift region 820”);
a heavily doped second conductivity type source in a surface of the well (Kim, Fig. 34, Item 842, “The source region 842 may have the first conductivity type (e.g., n-type)”);
a trench gate region of a trench structure having an upper surface substantially coplanar with a surface of the well or the source, and a lowermost surface in the drift region (Kim, Fig. 34, Item 868, Item 865 is coplanar with source and corner of 862 is in drift region); and
a heavily doped first conductivity type shield region having an upper surface substantially coplanar with the surface of the well and a lowermost surface in the drift region ((Kim, Fig. 34, Item 870c, Upper surface is coplanar with 832_2 and bottom is in 820, “The common deep shielding region 870c may have a higher concentration of p-type dopant than that of the well regions 832_1 and 832_2 in some embodiments”).
In regards to independent claim 6, Kim teaches a SiC MOSFET power semiconductor device comprising:
a substrate (Kim, Fig. 36B, Item 910);
a lightly doped second conductivity type drift region on the substrate (Kim, Fig. 36b, 920, “a lightly-doped (n.sup.−) silicon carbide drift region 820”);
a trench gate region having a lowermost surface in the drift region, a hexagonal shape, and a honeycomb structure, and separating a plurality of unit cells of substantially the same area (Kim, Fig. 36B, Item 968, Item 965 is coplanar with source and corner of 962 is in drift region, Fig. 35 show hexagonal shape);
a heavily doped second conductivity type source in contact with the trench gate region and in each of the unit cells (Kim, Fig. 36B, Item 942, “The source region may have the first conductivity type (e.g., n-type)”; and
a heavily doped first conductivity type shield region having a lowermost surface in the drift region lower than the lowermost surface of the trench gate region ((Kim, Fig. 36B, Item 970c, Upper surface is coplanar with 932 and bottom is in 920, “The common deep shielding region may have a higher concentration of p-type dopant than that of the well regions and in some embodiments”),
wherein the source and the shield region in each of the unit cells are alternately arranged along a hexagonal path around a center of the unit cell at a position a predetermined distance from the center (Kim, Fig. 35, symmetrical spacing along H-H’).
In regards to independent claim 18, Kim teaches a method of manufacturing a SiC MOSFET power semiconductor device, the method comprising:
forming a drift region on a substrate (Kim, [0337-0340], Fig. 36b, 920, “a lightly-doped (n.sup.−) silicon carbide drift region 820”);
forming a shield region in the drift region ((Kim, [0337-0340], Fig. 36B, Item 970c, Upper surface is coplanar with 932 and bottom is in 920, “The common deep shielding region may have a higher concentration of p-type dopant than that of the well regions and in some embodiments”);
forming a source in the drift region (Kim, [0337-0340], Fig. 36B, Item 942, “The source region may have the first conductivity type (e.g., n-type)”);
forming a trench in the drift region (Kim, [0337-0340], Fig. 36B, Item 968, Item 965 is coplanar with source and corner of 962 is in drift region);
forming a gate oxide film in the trench and forming a gate electrode on the gate oxide film and filling the trench (Kim, [0337-0340], Fig. 36B,Item 962, 964);
forming an insulating film on the gate electrode (Kim, [0337-0340], Fig. 36B,Item 965); and
forming an ohmic contact on the source and the shield region (Kim, [0337-0340], Fig. 36B,Item 980);,
wherein the trench has a lowermost surface higher than a lowermost surface of the shield region and a honeycomb structure with a hexagonal shape, and the trench separates a plurality of unit cells (Kim, Fig. 36B, Item 968, Item 965 is coplanar with source and corner of 962 is in drift region, Fig. 35 show hexagonal shape).
Allowable Subject Matter
Claim 14 is allowed.
The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to disclose or teach an obvious combination of the following limitations when taken with the claim as a whole:
a trench gate region having a lowermost surface in the drift region, the trench gate region having a hexagonal shape and a honeycomb structure and separating a plurality of unit cells into n columns, wherein the unit cells of an mth column are non-channel-forming regions, and the unit cells of an m−1th and/or m+1th column are channel-forming regions.
Claim Analysis for Dependent Claims
Claim Rejections - 35 USC § 102
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 2-5, 7-13, 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticpated by Kim
In regards to dependent claim 2, Kim teaches the SiC MOSFET power semiconductor device of claim 1, wherein the lowermost surface of the shield region is lower than the lowermost surface of the gate region (Kim, Fig. 34, Item 870c vs 832_2).
In regards to dependent claim 3, Kim teaches the SiC MOSFET power semiconductor device of claim 2, wherein the shield region is in contact with a sidewall of the gate region and is in partial contact with the lowermost surface of the gate region (Kim, Fig. 34, Item 870c vs Item 862);.
In regards to dependent claim 4, Kim teaches the SiC MOSFET power semiconductor device of claim 1, wherein the gate region has a hexagonal shape and a honeycomb structure (Kim, Fig. 36B, Item 968, Item 965 is coplanar with source and corner of 962 is in drift region, Fig. 35 show hexagonal shape).
In regards to dependent claim 5, Kim teaches the SiC MOSFET power semiconductor device of claim 4, further comprising an ohmic contact on the shield region and the source (Kim, Item 880 [0286]).
In regards to dependent claim 7, Kim teaches the SiC MOSFET power semiconductor device of claim 6, wherein each of the unit cells may comprise a plurality of the sources, and the plurality of the sources are in contact with every other surface of the trench gate region in each of the unit cells (Kim, Fig. 35, Item 942).
In regards to dependent claim 8, Kim teaches the SiC MOSFET power semiconductor device of claim 7, wherein the plurality of the sources are not continuously in contact with adjacent surfaces of the trench gate region in each of the unit cells (Kim, Fig. 35, Item 942).
In regards to dependent claim 9, Kim teaches the SiC MOSFET power semiconductor device of claim 6, further comprising:
a first conductivity type well below the source and in or on the drift region (Kim, Item 932);
an insulating film on the trench gate region (Kim, Item 965); and
an ohmic contact on the source and the shield region (Kim, Item 980, [0286])..
In regards to dependent claim 10, Kim teaches the SiC MOSFET power semiconductor device of claim 6, wherein in each of the unit cells, the source and the shield region alternate along the hexagonal path around the center of the unit cell at a position spaced from the center by a distance smaller than a distance from the center to the trench gate region (Kim, Fig. 35, Item 942).
In regards to dependent claim 11, Kim teaches the SiC MOSFET power semiconductor device of claim 10, wherein in each of the unit cells, the source and the shield region do not alternate around the center of the unit cell at a position adjacent to the center (Kim, Fig. 35, Item 942).
In regards to dependent claim 12, Kim teaches the SiC MOSFET power semiconductor device of claim 6, wherein the shield region is in contact with at least part of a lower portion of an adjacent gate region (Kim, Fig. 36B, Item 970, 968).
In regards to dependent claim 13, Kim teaches the SiC MOSFET power semiconductor device of claim 11, wherein each pair of adjacent unit cells has the same cross-section between centers thereof (Kim, Fig. 35, Item 942, Item 36B).
In regards to dependent claim 19, Kim teaches the method of claim 18, wherein the source and the shield region in each of the unit cells alternate along a hexagonal path around a center of the unit cell at a position a predetermined distance from the center (Kim, Fig. 36B, Item 968, Item 965 is coplanar with source and corner of 962 is in drift region, Fig. 35 show hexagonal shape).
Allowable Subject Matter
Claims 15-17 are allowed.
Claim 20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812