Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendments to claims 2 and 13 are acknowledged and correct grammatical errors. The objection to claims 2 and 13 dated 10/21/2025 is withdrawn.
Applicant’s amendments to claims 3 and 5 are acknowledged. The 112 rejection dated 10/21/2025 is withdrawn.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 states “…the common electrode is in contact with the portion of the outer circumferential surface of the second semiconductor layer exposed by the insulating layer in direct contact.”. It is unclear what the term “in direct contact” is referring to, as it does not appear to be referring to any specific two objects. The term could be referring to the insulating layer, and that the insulating layer is in direct contact with either the second semiconductor layer or the common electrode. Another interpretation is that the common electrode is in direct contact with the portion of the second semiconductor layer exposed by the insulating layer. This interpretation appears consistent with the intendent claim 1 that claim 2 depends on. As multiple interpretations are present, claim 2 is rejected as being indefinite.
For the purpose of compact prosecution, examiner is interpreting claim 2 as stating “…the common electrode is in direct contact with the portion of the outer circumferential surface of the second semiconductor layer exposed by the insulating layer.”. This interpretation appears consistent with the independent claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3 - 5, 10, and 12 - 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20130105845 A1 hereinafter Kim in view of US 20210104586 A1 hereinafter Baek and in further view of US 20130328075 A1 hereinafter Tajima.
For claim 1, Kim teaches a display device (Kim, fig. 4) with a substrate (fig. 4 numeral 110), light emitting elements on the substrate (fig. 4 numeral 120) a first via layer disposed on the substrate filled between the light emitting elements (fig. 4 numeral 115), a common electrode disposed on the first via layer and the light emitting elements (fig. 4 numeral 160-4), wherein each of the light emitting elements comprises: a first semiconductor layer including a p-type dopant (fig. 4 numeral 122), an active layer on the first semiconductor layer (fig. 4 numeral 124), a second semiconductor layer including a an n-type dopant and on the active layer (fig. 4 numeral 126), and a third semiconductor layer on the second semiconductor layer (fig. 4 numeral 130; Par. [0056] teaches the light emitting elements comprising at least three semiconductor layers or different dopants, and that the first and second layer can be either P or N type depending on configuration), and the common electrode is in contact with a side surface of the second semiconductor layer (fig. 4 shows the connection electrode 160-4 in contact with the side surface of the second semiconductor layer 126). Kim is silent regarding the display device including a pixel electrode on the substrate and that the common electrode is in direct contact with the side surface of the second semiconductor layer.
Baek teaches a display device (Baek, fig. 3) with a pixel electrode (fig. 3 numeral AE1) on a substrate of the display device (fig. 3 numeral 110).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention to combine the pixel electrode in Baek with the connection electrode and semiconductor layers in Kim in order to connect the light emitting elements with other elements in the device and to prevent leakage current (Baek, Par. [0141]). Kim and Baek are silent regarding the common electrode being in direct contact with the side surface of the second semiconductor layer.
Tajima teaches a display device (Tajima, fig. 5) with a first semiconductor layer (fig. 5 numeral 10), a second semiconductor layer (fig. 5 numeral 20), a third semiconductor layer (fig. 5 numeral 23), and an active layer (fig. 5 numeral 30). Tajima also teaches a common electrode that is in direct contact with the second semiconductor layer (fig. 5 numeral 50; part p9 is in direct contact with the second semiconductor layer 20).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention to combine the common electrode in direct contact in Tajima with the semiconductor layers in Kim and Baek in order to increase light emission efficiency (Tajima, Par. [0036 – 0038]) and suppress cracks in the device (Tajima, Par. [0137]).
For claim 3, Kim, Baek, and Tajima teach all of claim 1. Kim also teaches a length of the side surface of the second semiconductor layer in contact with the common electrode is about 10 % or more a thickness of the second semiconductor layer (Kim, fig. 4 shows the common electrode 160-4 in contact with at least 10 % of the side surface of the second semiconductor layer 126).
For claim 4, Kim, Baek, and Tajima teach all of claim 1. Kim also teaches the common electrode is in contact with a top surface and a side surface of the third semiconductor layer (Kim, fig. 4 shows the common electrode 160-4 in contact with the top and side surface of the third semiconductor layer 130).
For claim 5, Kim, Baek, and Tajima teach all of claim 1. Baek also teaches a second via layer (Baek, fig. 3 numeral 171) disposed on a common electrode (fig. 3 numeral CE) and the second via layer is between the light emitting elements (fig. 3 numeral ED1, ED2, and ED3), and wherein the top surface of the third semiconductor layer of the light emitting elements (fig. 4B numeral ETL1) extends in at least one shared direction with the top surface of the second via layer (fig. 4B shows the second via layer 171 extending in at least one shared direction with the light emitting elements ED1, ED2, and ED3).
For claim 10, Kim, Baek, and Tajima teach all of claim 1. Baek also teaches a wavelength controller disposed on the common electrode comprising definition walls defining emission areas and a non-emission area (Beak, fig. 3 numeral 160); a cover layer disposed on the definition walls (fig. 3 numeral CPL1), and a wavelength layer disposed between the definition walls and overlapping the emission areas (fig. 3 numeral 150).
For claim 12, Kim, Baek, and Tajima teach all of claim 10. Kim also teaches a first reflective layer and a second reflective layer disposed between the light emitting elements and overlapping the non-emission areas (Kim, fig. 7 numeral 140-1 and 140-2). Baek teaches two reflective layers between the definition walls and the cover layer (Baek, fig. 13 numeral MP corresponding to fig. 3 numeral AE).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention to combine the non-emission area overlapping reflective layers in Kim with the definition walls and cover layer in Baek in order to protect the reflective layers by covering them with a protective layer while also reflecting light that may exit the emitting areas into the non-emitting areas.
For claim 13, Kim, Baek, and Tajima teach all of claim 10. Baek also teaches a color filter layer on the wavelength controller comprising a first color filter that transmits first light (Baek, fig. 3 numeral 181), a second color filter that transmits second light (fig. 3 numeral 183), and a third color filter that transmits third light (fig. 3 numeral 185).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20130105845 A1 hereinafter Kim in view of US 20210104586 A1 hereinafter Baek and in view of US 20130328075 A1 hereinafter Tajima and in further view of US 20200279979 A1 hereinafter Lee.
For claim 11, Kim, Baek, and Tajima teach all of claim 10. Baek also teaches the definition wall comprising a first and second definition walls disposed on each other (Baek, fig. 3 numeral 160 and BM). Kim, Baek, and Tajima are silent regarding the first and second definition walls including light blocking material.
Lee teaches a display device (Lee, fig. 8D) with a first definition wall (fig. 8D numeral 220) and a second definition wall on the first definition wall (fig. 8D numeral 260) and wherein the definition walls comprise light blocking material (Par. [0103]; Par. [0191 - 0192]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention to combine the light blocking material in Lee with the definition walls and light emitting elements in Kim, Baek, and Tajima in order to prevent light mixing (Lee, Par. [0193]).
Allowable Subject Matter
Claim 2 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Kim, Baek, and Tajima teach the common electrode being in direct contact with semiconductor layers. However, Tajima does not appear to teach forming an exposed portion of the second semiconductor layer through an insulating layer. Kim appears to teach the insulating layer that surrounds an outer circumferential surface of the first, second, and third semiconductor layers and the active layer and exposing a portion of a semiconductor layer, but not a side surface of the second semiconductor layer or that the side surface is exposed by the insulating layer. As such, it does not appear that Kim, Baek, and Tajima would suggest forming a direct contact with the side surface of the second semiconductor layer and that the side surface in direct contact with the common electrode is exposed by the insulating layer.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/J.T.N./Examiner, Art Unit 2815
/MONICA D HARRISON/Primary Examiner, Art Unit 2815