Prosecution Insights
Last updated: July 17, 2026
Application No. 18/305,386

SEMICONDUCTOR DEVICE

Non-Final OA §103
Filed
Apr 24, 2023
Priority
May 18, 2022 — JP 2022-081761
Examiner
HOQUE, MOHAMMAD M
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
627 granted / 737 resolved
+17.1% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
43 currently pending
Career history
777
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
86.4%
+46.4% vs TC avg
§102
8.0%
-32.0% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 737 resolved cases

Office Action

§103
DETAILED ACTION Examiner’s Note Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182. Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Election/Restrictions Applicant’s election without traverse of species A/fig. 6, reflected in claims 1-14, 16-20 in the reply filed on 02/27/2026 is acknowledged. Claim 15 is withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-9 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Ogura; Tsuneo et al. (US 20150021657 A1, hereinafter Ogura‘657) in view of Nakagawa Akio et al. (JP 2003124467 A, hereinafter Nakagawa‘467). Regarding independent claim 1, Ogura‘657 teaches, “A semiconductor device (fig. 1-13; ¶ [0021] - ¶ [0146]), comprising: a semiconductor substrate (see annotated fig. 1A) which includes an upper surface and a lower surface and is provided with a drift region (31) of a first conductivity type (N-); an emitter region (41) of a first conductivity type (n+), which is provided in contact with the upper surface of the semiconductor substrate and has a higher doping concentration than the drift region (31); a base region (40) of a second conductivity type (p), which is provided in contact with the emitter region (41); and a collector region (20, 21) of a second conductivity type (P), which is provided between the drift region (31) and the lower surface of the semiconductor substrate, wherein the collector region includes a first region (20, width20, fig. 1A, 1C) and a second region (21, width21) having a lower implantation efficiency of carriers (P) with respect to the drift region (31, n type) than the first region (20) (W21/W20 0.1-10, ¶ [0068]), and ((when an area of the first region and an area of the second region per unit area of the collector region in a top view are respectively represented by S1 and S2, the implantation efficiency of the first region is represented by ɳ1, and the implantation efficiency of the second region is represented by ɳ2, an average implantation efficiency ɳc given by an expression below is 0.1 or more and 0.4 or less: ɳc = (S1 x ɳ1 + S2 x ɳ2)/(S1 + S2)”)). But Ogura‘657 is silent upon the provision of wherein semiconductor device further comprising: when an area of the first region and an area of the second region per unit area of the collector region in a top view are respectively represented by S1 and S2, the implantation efficiency of the first region is represented by ɳ1, and the implantation efficiency of the second region is represented by ɳ2, an average implantation efficiency ɳc given by an expression below is 0.1 or more and 0.4 or less: ɳc = (S1 x ɳ1 + S2 x ɳ2)/(S1 + S2)”. PNG media_image1.png 784 556 media_image1.png Greyscale However, Nakagawa‘467 teaches a similar IGBT device (30, fig. 1) comprising a collector region (31). The implantation efficiency of the collector layer (31) is 0.27 or less (‘The injection efficiency of the hole current from the drain layer is less than or equal to a value obtained by dividing the mobility of electrons by the sum of the mobilities of electrons and holes, that is, 0.27 or less’, page 4). This value (0.27 or less) is within the claimed range (0.1 or more and 0.4 or less). A specific example in the prior art which is within a claimed range anticipates the range. See MPEP 2131.03. PNG media_image2.png 568 452 media_image2.png Greyscale Ogura‘657 and Nakagawa‘467 are analogous art because they both are directed to an IGBT device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Ogura‘657 with the features of Nakagawa‘467 because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Ogura‘657 and Nakagawa‘467 to form the collector region and the drift region of having the claimed implantation efficiency according to the teachings of Nakagawa‘467 with a motivation of reducing the switching loss during turn off while maintaining low on resistance and high withstand voltage. See Nakagawa‘467, Abstract. Regarding claim 2, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 1, wherein a doping concentration of the collector region in the first region (20, P+, fig. 1, Ogura‘657) is higher than a doping concentration of the collector region in the second region (21, P-)”. Regarding claim 3, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 2, wherein when the doping concentration (1x1019 atoms/cm3, ¶ [0042], Ogura‘657) of the collector region in the first region (20, Ogura‘657) is represented by D1 and the doping concentration (1x1015 atoms/cm3 or more and 1x1017 atoms/cm3 or less, ¶ [0043], Ogura‘657) of the collector region in the second region (21) is represented by D2, an average doping concentration Dc given by an expression below is 1 x 1015/cm3 or more and 1 x 1018/cm3 or less: Dc = (S1 x D1 + S2 X D2)/(S1 + S2)”. S2/S1=W21/W20= 0.1~10 (¶ [0031], Ogura‘657), D1= 1x1019 atoms/cm3, (¶ [0042], Ogura‘657), D2= 1x1015 atoms/cm3 or more and 1x1017 atoms/cm3 or less, (¶ [0043], Ogura‘657), By using values of S2/S1, D1 and D2 in above equation, Dc = (S1 x D1 + S2 X D2)/(S1 + S2) = 2.81 * 1016 atoms/cm3 or more and 9.12 * 1018 atoms/cm3 or less. As the claimed range (1 x 1015/cm3 or more and 1 x 1018/cm3 or less) overlaps the calculated value (2.81 * 1016 atoms/cm3 or more and 9.12 * 1018 atoms/cm3 or less) using prior art Ogura‘657, a prima facie case of obviousness exists. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Regarding claim 4, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 3, wherein the doping concentration of the collector region in the second region (21, Ogura‘657) is 1 x 1015/cm3 or more and 1 x 1017/cm3 or less (1x1015 atoms/cm3 or more and 1x1017 atoms/cm3 or less, ¶ [0043], Ogura‘657) . Regarding claim 5, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 3, wherein the doping concentration (1x1015 atoms/cm3 or more and 3x1017 atoms/cm3 or less, ¶ [0043], Ogura‘657) of the collector region in the second region (21) is higher than a doping concentration of the drift region (1x1015 atoms/cm3, ¶ [0044])”. Regarding claim 6, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 3, further comprising: a buffer region (30, fig. 1, Ogura‘657) which is formed between the second region (21) and the drift region (31) and has a higher doping concentration (1x1015 atoms/cm3 or more and 1x1017 atoms/cm3, ¶ [0048]) than the drift region (1x1015 atoms/cm3 or less, ¶ [0044]), wherein the doping concentration of the collector region in the second region (21, 1x1015 atoms/cm3 or more and 3x1017 atoms/cm3 or less, ¶ [0043], Ogura‘657) is higher than a donor concentration at a PN junction portion between the second region and the buffer region (1x1015 atoms/cm3 or more and 1x1017 atoms/cm3, ¶ [0048])”. Regarding claim 7, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 3, wherein the doping concentration D1 of the collector region in the first region (1x1019 atoms/cm3, (¶ [0042], Ogura‘657) is higher than the average doping concentration Dc (2.81 * 1016 atoms/cm3 or more and 9.12 * 1018 atoms/cm3 or less), the average doping concentration Dc (2.81 * 1016 atoms/cm3 or more and 9.12 * 1018 atoms/cm3 or less) is higher than the doping concentration D2 of the collector region in the second region (1x1015 atoms/cm3 or more and 1x1017 atoms/cm3 or less, ¶ [0043], Ogura‘657), a ratio a of the area S2 of the second region to the area S1 of the first region is given by an expression below: α= S2/S1 (W21/W20= 0.1~10 (¶ [0031], Ogura‘657), a ratio β is given by an expression below including the doping concentration D1 of the collector region in the first region: β = (D1/Dc - 1) + D2/(Dc - D2), and (see claim 3 for values of D1, D2, Dc) the ratio α is equal to or larger than the ratio β”. Regarding claim 8, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 1, wherein the collector region in the first region (20, fig. 8A, Ogura‘657) is thicker in a depth direction of the semiconductor substrate than the collector region in the second region (21)”. Regarding claim 9, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 8, wherein a concentration of a second conductivity type impurity (P impurity) of the second region is higher than a concentration of a second conductivity type impurity of the first region (by mapping in fig. 1 of Ogura‘657, element 20 as second region and element 21 as first region)”. Regarding claim 14, Ogura‘657 modified with Nakagawa‘467 further teaches, “The semiconductor device according to claim 1, further comprising: a gate trench portion (fig. 1A, Ogura‘657) which is provided from the upper surface of the semiconductor substrate to the drift region (31) and is in contact with the emitter region (41) and the base region (40), wherein the first region (20) is provided at a position overlapping the gate trench portion”. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Ogura‘657 modified with Nakagawa‘467 as applied to claim 8 as above, and further in view of LAW et al., (Self-Consistent Model of Minority-Carrier Lifetime, Diffusion Length, and Mobility, IEEE ELECTRON DEVICE LETTERS, United States, IEEE, 08 / 31 / 1991, Volume 12, Issue 8, pp. 401 - 403, DOI:10.1109/55.119145, hereinafter Law‘1991). . Regarding claim 10, Ogura‘657 modified with Nakagawa‘467 teaches all the limitations described in claim 8. Ogura‘657 modified with Nakagawa‘467 further teaches, wherein "W21" is 1 to 100 μm, and the impurity concentration of "drift layer 21" is lower than the impurity concentration of "buffer layer 20" (1* 1015 cm-3 to 1* 1017 cm-3). But Ogura‘657 modified with Nakagawa‘467 is silent upon the provision of wherein a distance between two of the first regions in the top view is equal to or smaller than a diffusion length of minority carriers in the drift region. However, Law‘1991 teaches (line 27 of the left column on page 1 to line 28 of the right column on page 2, and Fig. 3), wherein the hole diffusion length is about 100 micrometers when the donor concentration is 1* 1016 cm-3. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Ogura‘657 modified with Nakagawa‘467 and Law‘1991 to make "W21" equal to or less than the hole diffusion length in the "drift layer" according to the teachings of Law‘1991 achieve better electron minority-carrier mobility in the device. See Law‘1991, ‘.IV. ELECTROMNI NORITY-CARRMIEORB ILITY’. Claims 11, 13 and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ogura‘657 modified with Nakagawa‘467 as applied to claim 1 as above, and further in view ASAI MAKOTO (JP 2009176772 A, hereinafter Asai‘772). Regarding claim 11 and 17-20, Ogura‘657 modified with Nakagawa‘467 teaches all the limitations described in claim 1-5. But Ogura‘657 modified with Nakagawa‘467 is silent upon the provision of wherein the semiconductor device according to claim 1-5, comprising: an active portion including the emitter region and the base region; a well region of a second conductivity type, which encloses the active portion in the top view and is provided in contact with the upper surface of the semiconductor substrate; and an edge termination structure portion arranged between the well region and end sides of the semiconductor substrate, wherein the active portion is provided with both the first region and the second region, and the edge termination structure portion is provided with the second region and is not provided with the first region. However, Asai‘772 teaches a similar device (1, fig. 4) wherein an active portion (Dd) including the emitter region (105) and the base region (102); a well region (outer peripheral portion of the "base region 102") of a second conductivity type (P), which encloses the active portion (Dd) in the top view and is provided in contact with the upper surface of the semiconductor substrate (101); and an edge termination structure portion (Dr) arranged between the well region and end sides of the semiconductor substrate, wherein the active portion (Dd) is provided with both the first region (107) and the second region (117, fig. 4), and the edge termination structure portion (Dr) is provided with the second region (117) and is not provided with the first region (107). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Ogura‘657 modified with Nakagawa‘467 and Asai‘772 to heavily dope the source/drain extension regions according to the teachings of Asai‘772 with a motivation to improve the switching tolerance of the instant IGBT device, See Asai‘772, Abstract. Regarding claim 13, Ogura‘657 modified with Nakagawa‘467 and Asai‘772 further teaches. “The semiconductor device according to claim 11, wherein the second region of the edge termination structure portion (117, fig. 13 , Asai‘772) is provided so as to extend to a position overlapping the emitter region of the active portion”. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Ogura‘657. Regarding independent claim 16, Ogura‘657 teaches, “A semiconductor device (fig. 1-13; ¶ [0021] - ¶ [0146]), comprising: a semiconductor substrate (see annotated fig. 1A) which includes an upper surface and a lower surface and is provided with a drift region (31) of a first conductivity type (N-); an emitter region (41) of a first conductivity type (N+), which is provided between the drift region (31) and the upper surface of the semiconductor substrate and has a higher doping concentration than the drift region (31); a base region (40) of a second conductivity type (p), which is provided in contact with the emitter region (41); and a collector region (20, 21) of a second conductivity type (P), which is provided between the drift region (31) and the lower surface of the semiconductor substrate, wherein the collector region includes a first region (20) and a second region (21) having a lower implantation efficiency of carriers with respect to the drift region (31) than the first region (20), and when an area of the first region and an area of the second region per unit area of the collector region in a top view are respectively represented by S1 and S2, a doping concentration of the collector region in the first region is represented by D1, and a doping concentration of the collector region in the second region is represented by D2, an average doping concentration Dc given by an expression below is 1 x 1015/cm3 or more and 1 x 1018/cm3 or less: Dc = (S1 x D1 + S2 X D2)/(S1 + S2) (see below)”. S2/S1=W21/W20= 0.1~10 (¶ [0031], Ogura‘657), D1= 1x1019 atoms/cm3, (¶ [0042], Ogura‘657), D2= 1x1015 atoms/cm3 or more and 1x1017 atoms/cm3 or less, (¶ [0043], Ogura‘657), By using values of S2/S1, D1 and D2 in above equation, Dc = (S1 x D1 + S2 X D2)/(S1 + S2) = 2.81 * 1016 atoms/cm3 or more and 9.12 * 1018 atoms/cm3 or less. As the claimed range (1 x 1015/cm3 or more and 1 x 1018/cm3 or less) overlaps the calculated value (2.81 * 1016 atoms/cm3 or more and 9.12 * 1018 atoms/cm3 or less) using prior art Ogura‘657, a prima facie case of obviousness exists. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Apr 24, 2023
Application Filed
May 08, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684808
SEMICONDUCTOR DEVICE INCLUDING A TRENCH GATE TYPE MOSFET AND METHOD OF MANUFACTURING THE SAME
3y 7m to grant Granted Jul 14, 2026
Patent 12684827
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME WITH DOPING REGIONS HAVING DIFFERENT CONDUCTIVITY TYPES
3y 5m to grant Granted Jul 14, 2026
Patent 12666670
SEMICONDUCTOR DEVICE AND METHOD FOR THE SAME
3y 3m to grant Granted Jun 23, 2026
Patent 12666711
STACKED HYBRID TFET AND MOSFET
3y 1m to grant Granted Jun 23, 2026
Patent 12660260
REDUCING CHANNEL STRUCTURE TIP DAMAGE DURING SPACER DEPOSITION
4y 4m to grant Granted Jun 16, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
94%
With Interview (+9.2%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 737 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month