DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Species 1, Modifications A2, B1 in the reply filed on 30 January 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claims 1, 2, 3, 5, and 9 are hereby Examined on the merits in this Office action.
Claim Objections
Claim 9 is objected to because of the following informalities: it recites “wherein there first layer and the second layers are the only layers”. It appears this should read “wherein the first layer and the second layer are the only layers”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 2, 3, 5, and 9 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding Claim 1, it recites “the nanogap extending through the first layer and at least partially through the second layer beyond the plane of the 2DEG layer”. Mapped to Applicant’s Fig. 1 for clarity of reference, the claim requires the source (18) and drain (20) electrodes to be fixed on the second layer (AlGaN) opposite the first layer (GaN). Therefore, there is no support for “the nanogap (14) extending through the first layer (GaN) and at least partially through the second layer (AlGaN) beyond the plane of the 2DEG layer (24)” as the nanogap (14) extends through the second layer (AlGaN) and partially through the first layer (GaN). For at least this reason claims 2, 3, 5, and 9 are also rejected under 35 USC §112(a) based on their dependency from claim 1.
For the purpose of applying prior art, this limitation will be interpreted in light of Applicant’s Fig. 1, wherein “the nanogap extending through the [second] layer and at least partially through the [first] layer beyond the plane of the 2DEG layer”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3, 5, and 9 are rejected under 35 U.S.C. 102(s)(2) as being anticipated by Yosuke Kajiwara et al. (US 20230006058 A1; hereinafter Kajiwara).
Regarding Claim 1, Kajiwara discloses a transistor (Fig. 12; 115) comprising:
a first layer (10) comprising a first material (GaN; ¶0027);
a second layer (20) comprising a second material (AlGaN; ¶0030) applied directly onto the first layer (10) (as shown in Fig. 12), the first layer (10) of the first material and the second layer (20) of the second material forming a first heterojunction (at the interface of 10/20);
a first 2-dimensional gas (2DEG) layer (10C; ¶0038) in the first layer (10) adjacent the first heterojunction, a plane of the 2DEG layer being parallel to the first heterojunction (as shown in Fig. 12; a plane of 10C is parallel to the heterojunction);
a source electrode (51; ¶0036) and a drain electrode (52;¶0036) fixed on the second layer (20) opposite the first layer (10) (as shown in Fig. 12);
a nanogap (gap lined with compound member 45 interrupting 10C) between the source electrode (51) and the drain electrode (52), the nanogap extending through the [second] layer (20) and at least partially through the [first] layer (10) beyond the plane of the 2DEG layer (10C), the nanogap arranged perpendicular to the heterojunction (as shown in Fig. 12); and
one or more gates (53; ¶0036) arranged adjacent the source electrode (51).
Regarding Claim 3, Kajiwara discloses the transistor of claim 1, wherein the one or more gates (53) are top gates (53 is disposed on a top of 20), and the nanogap is formed on one of a drain side (side of 52) and a source side (side of 51) of the one or more top gates (53) (the gap is on the source side 51 of the top gate 53).
Regarding Claim 5, Kajiwara discloses the transistor of claim 1, wherein the first material is Gallium Nitride (GaN) (¶0027) and the second material is (Aluminum Gallium Nitride) AlGaN (¶0030).
Regarding Claim 9, Kajiwara discloses the transistor of claim 1, wherein there first layer (10) and the second layers (20) are the only layers (10 and 20 are the only layers as commensurate in scope with Applicant’s Fig. 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Kajiwara in view of Josephine Chang et al. (US 20200411676 A1; hereinafter Chang).
Regarding Claim 2, Kajiwara discloses the transistor of claim 1, but is silent regarding wherein the nanogap is between about 30-50 nm in width.
In the same field of endeavor, Chang teaches a gate (Fig. 2; G1; ¶0019) in a gap (106) between a source (S1) and a drain (S2) that has a width (L) in a range of 10nm-500nm (¶0018).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have and optimize the width of the gap (with the gate) of Kajiwara within the claimed range (as in Chang) in order to optimize the gate length in the gap in order to optimize performance of the transistor. MPEP 2144.05
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN PRIDEMORE whose telephone number is (703)756-4640. The examiner can normally be reached Monday - Friday 8:00am - 4:00pm EST.
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NATHAN PRIDEMORE
Examiner
Art Unit 2898
/NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898