Prosecution Insights
Last updated: April 19, 2026
Application No. 18/305,681

SEMICONDUCTOR DEVICES WITH FRONT SIDE LASER-BASED DAMAGE REGIONS

Non-Final OA §103
Filed
Apr 24, 2023
Examiner
MUSE, ISMAIL A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
5 (Non-Final)
86%
Grant Probability
Favorable
5-6
OA Rounds
2y 6m
To Grant
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
530 granted / 613 resolved
+18.5% vs TC avg
Moderate +8% lift
Without
With
+7.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
45 currently pending
Career history
658
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
52.3%
+12.3% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
16.7%
-23.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 613 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/08/2025 has been entered. Response to Arguments Applicant's arguments filed 12/08/2025 have been fully considered but they are not persuasive. The Applicant argues that Sakamoto fails to teach “a first laser damaged region including a first plurality of cracks disposed above and adjacent to a second plurality of cracks, the first plurality of cracks and the second plurality of cracks extending from a substantially linear region at a first depth,” as claimed in claim 16. The Applicant specifically argued that modified region 7 (marked with PNG media_image1.png 22 18 media_image1.png Greyscale ) merely indicates that the substrate is "modified" (in other words, different than other areas without such marks) as a result of laser light converges under a condition generating multiphoton absorption. Thus, no person of ordinary skill in the art would understand or interpret that the mark actually represents morphology or structural features of the modified region 7. The Applicant’s argument is not persuasive because the argument seems to be the Applicant’s understanding or interpretation of Sakamoto’s invention. The Office acknowledges that nowhere in the Sakamoto’s written description is the morphology or structural features of the modified region 7. However, it should be noted that the figure of Sakamoto constitutes as part of Sakamoto’s invention. Thus, without a clear indication that the depiction of Fig. 5 is not actual or accurate, it seems reasonable for a person of ordinary skills in the art to understand the structure (Fig. 5) to read on the claimed invention. Moreover, referring to other figures of Sakamoto (Figs. 8, 14, and 19), Sakamoto depicts the modified regions with a shape different from that of Fig. 5. In view of these other depictions, a person having ordinary skills in the art can come to reasoning that the shapes of the modified regions are not just circumstantial –instead, they seem obviously intentional to depict intended shape or structure. The Applicant then argued that even assuming for the sake of argument that the mark may represent morphology or structural features of the modified region 7 (which Applicant expressly represents status of such features prior to cutting the object 1, and does not concede), the mark thus does not teach or suggest structural or morphological features of the surface of the object 1 after cutting. This argument is also not persuasive. It should be noted that the claim does not have any limitation regard feature before and after a cutting. At best, the claim suggests that the device has a surface (possibly claimed sidewall) comprising the claimed features. However, it should be noted that Fig. 5 is a sectional view of the object taken along the line V-V of FIG. 3 (Para 23), thus, the morphology or structural features of the modified region 7 (as shown in Fig. 5) addresses and dispels the Applicant’s argument regarding before and after cutting. The rejection in view of Sakamoto is deemed reasonable and would be maintained. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 16-17 and 19-21 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. [US PGPUB 20130168831] (hereinafter Sakamoto). Regarding claim 16, Sakamoto teaches a semiconductor die (3, Para 23), comprising: a front side (3, Para 127) with active circuitry (15/19/20, Para 127) disposed thereon (Fig. 20); a back side (21, Para 130) opposite the front side (Fig. 20); and a sidewall (Fig. 1/4) including: a first laser damaged region (region of modified region 71, Para 131 Fig. 20/22) including a first plurality damage region (71, Fig. 22); and a second laser damaged region (region of modified region 72, Para 131, Fig. 20/22) including a first plurality damage region (72, Fig. 22); and wherein an unmodified portion (Fig. 20) of the semiconductor die is disposed between and in contact with end portions of the first laser damaged region and the second laser damaged region (see annotated Fig. 20). In the embodiment of Fig. 20/22, Sakamoto does not specifically disclose the first laser damaged region including a first plurality of cracks disposed above and adjacent to a second plurality of cracks, the first plurality of cracks and the second plurality of cracks extending from a substantially linear region at a first depth; and a second laser damaged region including a third plurality of cracks disposed above and adjacent to a fourth plurality of cracks, the third plurality of cracks and the fourth plurality of cracks extending from an additional substantially linear region at a second depth; wherein the second plurality of cracks is disposed above the third plurality of cracks; and wherein an unmodified portion of the semiconductor die is disposed between and in contact with end portions of the second plurality of cracks and end portions of the third plurality of cracks. Referring to Fig. 5 of Sakamoto, Sakamoto discloses an exemplary laser damaged region (region of modified region 7, Para 52) including a first plurality of cracks (see annotated Fig. 5 below) disposed above and adjacent to a second plurality of cracks (see annotated Fig. 5 below), the first plurality of cracks and the second plurality of cracks extending from a substantially linear region at a first depth (see annotated Fig. 5 below). PNG media_image2.png 277 743 media_image2.png Greyscale Annotated Fig. 5 In view of such teaching by Sakamoto according to the embodiment of Fig. 5, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the embodiment of Fig. 20/22 comprise the teachings of the embodiment of Fig. 5 at least based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.B). In view of such teaching by substitution, a person having ordinary skills in the art to will find it at least obvious that the limitation of claim 16 would be met because a structure (modified Fig. 20/22) as depicted below would be formed. PNG media_image3.png 375 571 media_image3.png Greyscale Modified Fig. 20/22 Regarding claim 17, Sakamoto teaches a semiconductor die wherein the sidewall of the semiconductor die is exclusive of metal (silicon substrate, Para 127). Regarding claim 19, Sakamoto teaches a semiconductor die wherein the second depth is greater than the first depth (Fig. 20/22). Regarding claim 20, Sakamoto teaches a semiconductor die wherein the first laser damaged region is closer to the front side of the semiconductor die than the second laser damaged region (Fig. 20/22). Regarding claim 21, Sakamoto specifically in view of modified Fig. 20/22, Sakamoto teaches a semiconductor die wherein: the first plurality of cracks substantially have a first angular orientation and the second plurality of cracks substantially have a second angular orientation different than the first angular orientation (Fig. 20; i.e., first angular orientation which has an angle of about 90º and failing within the first and second of a circle at about 45º to 135º and second angular orientation which has an angle of about 90º and failing within the third and fourth of a circle at about 225º to 315º); the third plurality of cracks substantially have a third angular orientation and the fourth plurality of cracks substantially have a fourth angular orientation different than the third angular orientation (Fig. 20; i.e., third angular orientation which has an angle of about 90º and failing within the first and second of a circle at about 45º to 135º and fourth angular orientation which has an angle of about 90º and failing within the third and fourth of a circle at about 225º to 315º). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto in view of Nishino et al. [US PGPUB 20170348796] (hereinafter Nishino). Regarding claim 18, Sakamoto teaches the limitation of claim 16 upon which it depends. Sakamoto does not specifically disclose the limitations of claim 18. Referring to the invention of Nishino, Nishino teaches an exemplary crack structure comprising first plurality of cracks (leftmost 2 cracks 66, Fig. 5C), second plurality of cracks (leftmost 2 cracks 64, Fig. 5C), third plurality of cracks (rightmost 2 cracks 66, Fig. 5C) and fourth plurality of cracks (rightmost 2 cracks 64, Fig. 5C), wherein, a first average angle relative to a surface normal of the semiconductor die for the first plurality of cracks is greater than a second average angle relative to the surface normal of the semiconductor die for the second plurality of cracks (Fig. 5C); and a third average angle relative to a surface normal of the semiconductor die for the third plurality of cracks is greater than a fourth average angle relative to the surface normal of the semiconductor die for the fourth plurality of cracks (Fig. 5C). In view of such teaching by Nishino, it would have been obvious to a person having ordinary skills in the art to have the crack structure of Nishino implement in the device or Kobayashi at based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results or improve similar device in the same way (MPEP 2143.I.B) such improving dicing/singulation process. Allowable Subject Matter Claims 1-15 are allowed. Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claims 1-15 are allowed because all prior arts of record and related prior arts not of record either singularly or in combination fail to anticipate or render obvious a semiconductor die, comprising: wherein the angled damage feature region comprises a first plurality of cracks and the damage region comprises a second plurality of cracks, the first plurality of cracks and the second plurality of cracks extending from a substantially linear region at a first depth (as claimed in claim 1), in combination with the rest of claim limitations as claimed and defined by the Applicant. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ISMAIL A MUSE whose telephone number is (571)272-1470. The examiner can normally be reached Monday - Friday 8:00 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571)270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ISMAIL A MUSE/ Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Apr 24, 2023
Application Filed
Feb 01, 2024
Non-Final Rejection — §103
Jul 08, 2024
Response Filed
Oct 02, 2024
Final Rejection — §103
Jan 07, 2025
Request for Continued Examination
Jan 13, 2025
Response after Non-Final Action
Feb 06, 2025
Non-Final Rejection — §103
May 12, 2025
Response Filed
Aug 03, 2025
Final Rejection — §103
Dec 08, 2025
Request for Continued Examination
Dec 18, 2025
Response after Non-Final Action
Feb 03, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+7.9%)
2y 6m
Median Time to Grant
High
PTA Risk
Based on 613 resolved cases by this examiner. Grant probability derived from career allow rate.

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