Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Species A (Claims 1-8 and 12-20) in the reply filed on 6/19/2026 is acknowledged.
Claims 9-11 are withdrawn.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 6-8, 12 and 16-17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bonilla et al. (US Pub. No. 2011/0175226 A1), hereafter referred to as Bonilla.
As to claim 1, Bonilla discloses an interconnect structure (fig 3, 300; [0027]) comprising:
a metal line (302a and 302b) embedded in a dielectric layer (306); and
a via (304 and 302c) intersecting with the metal line (302a/302b),
wherein the via extends vertically at least from a top surface of the metal line to a bottom surface of the metal line (via 304/302c extends from top to bottom surface of 302a/302b) and has a width that is equal to or larger than a width of the metal line ([0027]-[0028]).
As to claim 2, Bonilla discloses the interconnect structure of claim 1 (paragraphs above),
wherein the via is a first via, further comprising a second via intersecting with the metal line, wherein the second via is separated from the first via along the metal line by a length that is less than a blech length of the metal line ([0028]).
As to claim 6, Bonilla discloses the interconnect structure of claim 1 (paragraphs above).
wherein the via includes a conductive liner at a first and a second sidewall of the via (fig 3, liner 312; [0030]) and wherein the metal line (302a/302b) is in direct contact with the conductive liner of the via at the first and the second sidewall (liner 312).
As to claim 7, Bonilla discloses the interconnect structure of claim 6 (paragraphs above).
wherein the conductive liner of the via is a conformal conductive liner ([0030]), and a portion of the conductive liner (312) that covers a bottom of the via (304/302c) is below the bottom surface of the metal line (302a/302b).
As to claim 8, Bonilla discloses the interconnect structure of claim 6 (paragraphs above).
wherein the conductive liner of the via is a first conductive liner (fig 3, liner 312 for via 302c/304), wherein the metal line (302a/b) includes a second conductive liner (liner 312 for 302a/b) at sidewalls thereof and at the bottom surface of the metal line, wherein the second conductive liner is materially different from the first conductive liner ([0028]).
As to claim 12, Bonilla discloses an interconnect structure (fig 3, 300) comprising:
a metal line (302a/b) embedded in a dielectric layer (306);
a first via (304/302c) intersecting with the metal line (302a/b); and
a second via intersecting with the metal line ([0028]), the second via being horizontally separated from the first via by a length that is less than a blech length of the metal line ([0028]),
wherein the first and the second via extend vertically at least from a top surface of the metal line to a bottom surface of the metal line (fig 3, via 304/302c) and have a width that is equal to or larger than a width of the metal line ([0027]-[0028]).
As to claim 16, Bonilla discloses a method of forming an interconnect structure (figs 4a-h, [0012]), the method comprising:
forming a metal line (302a/b) and a via (304/302c) in contact with the metal line (302a/b), wherein the via (304/302c) has a height and a width that are sufficiently tall and wide to completely truncate the metal line ([0027]-[0028]).
As to claim 17, Bonilla discloses the method of claim 16 (paragraphs above),
wherein forming the metal line and the via (fig 4a-h) comprises:
forming the metal line in a dielectric layer (fig 4b, metal 406 in dielectric 306);
creating a gouge through the metal line (fig 4b-4e, gouge formed by the removal of metal 406 then additional removal of dielectric 306 creating gouge between 302a-b), the gouge being sufficiently deep and wide to completely truncate the metal line ([0028]);
forming a conductive liner lining the gouge (fig 4f, liner 312); and
depositing a conductive material in the gouge thereby forming the via (fig 4g, 410; [0032]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3 and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bonilla in view of Briggs et al. (US Patent No. 9,418,934 B1), hereafter referred to as Briggs.
As to claim 3, Bonilla discloses the interconnect structure of claim 2 (paragraphs above).
Bonilla does not disclose wherein the metal line is a first metal line, further comprising a second metal line above the first metal line, wherein the first via connects the first metal line with the second metal line.
Nonetheless, Briggs discloses an interconnect structure including a first metal line (fig 14, M1), further comprising a second metal line (M2) above the first metal line (M1), wherein a first via (V1) connects the first metal line with the second metal line (M1 to M2).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include a second metal line in the interconnect of Bonilla as taught by Briggs since this will provide further electrical integration above the first ILD layer.
As to claim 13, Bonilla discloses the interconnect structure of claim 12 (paragraphs above),
Bonilla does not disclose wherein the metal line is a first metal line, wherein at least the first via is electrically connected to a second metal line, the second metal line being above or below the first metal line and placed in an orientation that is orthogonal to the first metal line.
Nonetheless, Briggs discloses an interconnect structure including a first metal line (fig 14, M1), further comprising a second metal line (M2) above the first metal line (M1), wherein a first via (V1) connects the first metal line with the second metal line (M1 to M2) and the second metal line placed in an orientation that is orthogonal to the first metal line (fig 14, M1 and M2).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include a second metal line in the interconnect of Bonilla as taught by Briggs since this will provide further electrical integration above the first ILD layer.
As to claim 14, Bonilla in view of Briggs disclose the interconnect structure of claim 13 (paragraphs above).
Bonilla further discloses wherein the first via (304/302c) includes a first conductive liner at sidewalls thereof (312 on 304/302c) and the first metal line (302a/b) includes a second conductive liner (312 on 302a/b), and wherein the first metal line is in direct contact with the first conductive liner of the first via without going through the second conductive liner (fig 3, 302a/b directly contact liner 312 at the upper surface without going through the liner 312 on the bottom and side surfaces of 302a/b).
As to claim 15, Bonilla in view of Briggs disclose the interconnect structure of claim 13 (paragraphs above).
Bonilla further discloses wherein the conductive liner of the first via is a conformal conductive liner (fig 3, 312 of the via; [0030]).
Allowable Subject Matter
Claims 4-5 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach or suggest a third metal line above the first metal line, wherein the third metal line is above the second via, and electrically isolated from the second via by the dielectric layer, as recited in claim 4; or wherein forming the metal line and the via comprises: forming a first conductive layer on top of a first dielectric layer; patterning the first conductive layer to form at least the via; forming a second conductive layer surrounding a top portion of the via; and patterning the second conductive layer to form the metal line, as recited in claim 18. Claims 5 and 19-20 are objected because of its dependence from either claim 4 or claim 18.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub. No. 2023/0077878A1; US Pub. No. 2011/0175226A1; US Pub. No. 20170194256A1; US Pub. No. 2017/0269481 A1; and US Pub. No. 2022/0406704A1.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Purvis, Sue can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 7/30/2026
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