DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Acknowledgement is made of the amendment received on 04/08/2026. Claims 1-18 are pending in this application. Claims 1, 11, and 13-16 are amended.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 has been amended to recite limitation:
“temporary removing at least one first light-emitting of the plurality of first light-emitting elements from the support member …” in lines 13-14;
followed by;
“after the step of temporarily removing the at least one first light-emitting element from the support member, joining the joining portions of the first light-emitting elements and the corresponding wiring portions and evaluating electrical characteristics of each of the plurality of first light-emitting elements” in lines 18-21.
However, the claim 1 does not explain whether the temporarily removed first light-emitting element is subsequently returned to the support member, rejoined to the corresponding wiring portion, replaced by another first light-emitting element, or remains removed during the subsequent evaluating step.
This ambiguity is material because the claim 1 subsequently requires “evaluating electrical characteristics of each of the plurality of first light-emitting elements”. Thus, it is unclear whether the temporarily removed first light-emitting element remains part of the recited plurality during the electrical evaluation step, and if so, how electrical characteristics of “each” first light-emitting element are evaluated after one of the first light-emitting elements has already been removed from the support member.
Further, the claim 1 has been amended to recite limitation: “determining that the at least one first light-emitting element is defective in the step of evaluating electrical characteristics” in lines 22-23. Because the definite phrase “the at least one first light-emitting element” refers back to the previously recited temporarily removed first light-emitting element, the claim further appears to require that the same temporarily removed first light-emitting element is subsequently determined to be defective during the electrical evaluation step. However, the claim does not explain whether the temporarily removed first light-emitting element is returned to the support member and electrically evaluated as part of the plurality of first light-emitting elements prior to the defective determination step.
The ambiguity is further compounded by the repeated use of the phrase “the at least one first light-emitting element” throughout the subsequent limitations. Because the claim repeatedly uses the definite phrase “the at least one first light-emitting element”, the claim language is reasonably interpreted as referring to the same previously recited element(s). Under such interpretation, the claim appears to require that the same first light-emitting element is: (i) temporarily removed from the support member, (ii) subsequently evaluated for electrical characteristics as part of the plurality of first light-emitting elements, (iii) determined to be defective, and (iv) removed from the support member as a defective product. However, the claim does not explain how the first light-emitting element can be evaluated as part of the plurality after already being removed from the support member, or whether the temporarily removed first light-emitting elements is first returned to the support member prior to the evaluating step.
Accordingly, it is unclear how the claimed process sequence is performed and whether the “temporarily removing” step requires a temporary removal followed by rejoining or restoration of the first light-emitting element prior to the subsequent electrical evaluation step. Therefore, the scope of the claim 1 cannot be determined with reasonable certainty.
Claims 2-18 are rejected due to their dependency.
For best understanding and examination purpose, the claims will be best considered based on drawings, disclosure, and/or any applicable prior arts.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wada et al. (KR 2021/0091640; hereinafter ‘Wada’).
Regarding claim 1, Wada teaches a method for manufacturing a light-emitting device [0011-0012], the method comprising:
providing a plurality of first light-emitting elements (11, FIG. 9, [0075]), each comprising a joining portion (12) containing gold (12 including Au, [0040]);
providing a support member (20 and 21; hereinafter ‘SM’) comprising:
a substrate (20), and
a plurality of wiring portions (21), each disposed on the substrate (20) and containing gold (21 being formed of a metal material corresponding to 12, [0040, 0075]);
joining (temporary bonding, [0076]) the joining portions (12) of the first light-emitting elements (11) and corresponding ones of the wiring portions (21) under a first joining condition (a temporary bonding condition) by bringing the joining portions (12) of the first light-emitting elements (11) and the corresponding wiring portions (21) into direct contact with each other (12 and 21 directly contacting each other at bonding region 13, [0024]);
temporarily removing (the removing with a defective chip by the first repair step S103, [0066, 0072]) at least one first light-emitting element of the plurality of first light-emitting elements (defective chip of 11 by S103, FIG. 8, [0066]; hereinafter ‘11DS103’) from the support member (SM) by bringing an adhesive member (31 of 14, FIGS. 5-6 and 9, [0072, 0091]), into contact with the at least one first light-emitting element (11DS103) and then moving the adhesive member (31) in a direction from the support member toward the at least one first light-emitting element (11DS103 being separated from 20 toward 14);
after the step of temporarily removing (S103) the at least one first light-emitting element (11DS103) from the support member (SM), joining (the replacing with a good quality chip (hereinafter ‘11N S103’) of the first repair step S103, [0066]) the joining portions (12) of the first light-emitting elements (11) and the corresponding wiring portions (21 of 11DS103, since 11DS103 is replaced with 11NS103 depending on the location of the remembered 11DS103, [0066]), and evaluating electrical characteristics (S104, FIG. 8, [0067]) of each of the plurality of first light-emitting elements (11); and
determining that the at least one first light-emitting element is defective in the step of evaluating electrical characteristics (determining a defective chip of 11 by S104, [0067]), and removing (the removing with the defective chip by the second repair step S106, FIG. 8, [0069]) from the support member (SM) the at least one first light-emitting element of the plurality of first light-emitting elements (defective chip of 11 by S106, [0069]; hereinafter ‘11DS106’).
Regarding claim 2, Wada teaches the method for manufacturing the light-emitting device according to claim 1, further comprising:
joining a plurality of joining portions (12 of replacement 11, FIG. 12, [0107]; hereinafter ‘12R’) of a plurality of second light-emitting elements (replacement 11; hereinafter ‘11R’) and a plurality of corresponding wiring portions of the plurality of wiring portions (corresponding 21 contacted by 12R; hereinafter 21R) by disposing the second light-emitting elements (11R) at a plurality of corresponding positions (positions of removed 11, FIG. 11; hereinafter ‘11P’), and by bringing the joining portions (12R) of the plurality of second light-emitting elements (11R) and the corresponding wiring portions (21R) into contact with each other (shown in FIG. 12), wherein:
each of the joining portions (12R) of the plurality of second light-emitting elements (11R) contains gold (12 including Au, [0040]), and
the corresponding positions (11P) comprise a first position (a position from which 11 identified as defective through an electrical test is removed, [0071]) where the first light-emitting element (11) determined to be defective in the step of evaluating electrical characteristics (electrical test, [0107]) of each of the plurality of first light-emitting elements (11) is removed and a second position (a position from which 11 is removed during evaluation of removability under a temporary bonding condition, [0076-0077]) where the at least one first light-emitting element (11) is removed in the step of evaluating (evaluating removability) whether the at least one first light-emitting element of the plurality of first light-emitting elements (11) is removable.
Regarding claim 3, Wada teaches the method for manufacturing the light-emitting device according to claim 2, further comprising:
after the step of joining the joining portions (12R, FIG. 12) of the second light-emitting elements (11R) and the corresponding wiring portions of the plurality of wiring portions (21), joining the joining portions (12R) of the plurality of first light-emitting elements (11R) and the corresponding wiring portions (21) as well as the joining portions (12R) of the plurality of second light-emitting elements (11R) and the corresponding wiring portions (21), under a second joining condition (reflow step, FIG. 12, [0081]), wherein:
a temperature under the second joining condition is higher than a temperature under the first joining condition, and/or a load under the second joining condition is greater than a load under the first joining condition (a temperature under the reflow step being higher than a solder melting temperature and the temperature under the temporary bonding step being lower than the solder melting temperature, [0076, 0081]).
Regarding claim 4, Wada teaches the method for manufacturing the light-emitting device according to claim 1, wherein:
an element region (an element region in which 11 are disposed in an array on 20 after temporary bonding, FIGS. 7 and 9, [0064]; hereinafter ‘ER’) comprising the plurality of first light-emitting elements (11) disposed on the substrate (20) is formed after the step of joining (the temporary bonding step) the joining portions (12) of the plurality of first light-emitting elements (11) and the corresponding wiring portions (21),
in a plan view (shown in FIG. 7), the element region (ER) comprises an outer peripheral portion (an outer peripheral portion; hereinafter ‘ERout’), and an inner portion (an inner portion; hereinafter ‘ERin’) surrounded by the outer peripheral portion (ERout) and located inside the outer peripheral portion (ERout), and
in the step of evaluating (S104) whether at least one first light-emitting element of the plurality of first light-emitting elements is removable (the defective chip of 11 is removable, [0067-0069]), the adhesive member is brought into contact with the at least one first light-emitting element located in the inner portion (31 is brought into contact with the defective chip of 11 by S104 located in ERin, [0072]).
Regarding claim 5, Wada teaches the method for manufacturing the light-emitting device according to claim 2, wherein:
an element region (an element region in which 11 are disposed in an array on 20 after temporary bonding, FIGS. 7 and 9, [0064]; hereinafter ‘ER’) comprising the plurality of first light-emitting elements (11) disposed on the substrate (20) is formed after the step of joining (the temporary bonding step) the joining portions (12) of the plurality of first light-emitting elements (11) and the corresponding wiring portions (21),
in a plan view (shown in FIG. 7), the element region (ER) comprises an outer peripheral portion (an outer peripheral portion; hereinafter ‘ERout’), and an inner portion (an inner portion; hereinafter ‘ERin’) surrounded by the outer peripheral portion (ERout) and located inside the outer peripheral portion (ERout), and
in the step of evaluating (S104) whether the at least one first light-emitting element of the plurality of first light-emitting elements is removable (the defective chip of 11 is removable, [0067-0069]), the adhesive member is brought into contact with the at least one first light-emitting element located in the inner portion (31 is brought into contact with the defective chip of 11 by S104 located in ERin, [0072]).
Regarding claim 6, Wada teaches the method for manufacturing the light-emitting device according to claim 3, wherein:
an element region (an element region in which 11 are disposed in an array on 20 after temporary bonding, FIGS. 7 and 9, [0064]; hereinafter ‘ER’) comprising the plurality of first light-emitting elements (11) disposed on the substrate (20) is formed after the step of joining (the temporary bonding step) the joining portions (12) of the plurality of first light-emitting elements (11) and the corresponding wiring portions (21),
in a plan view (shown in FIG. 7), the element region (ER) comprises an outer peripheral portion (an outer peripheral portion; hereinafter ‘ERout’), and an inner portion (an inner portion; hereinafter ‘ERin’) surrounded by the outer peripheral portion (ERout) and located inside the outer peripheral portion (ERout), and
in the step of evaluating (S104) whether the at least one first light-emitting element of the plurality of first light-emitting elements is removable (the defective chip of 11 is removable, [0067-0069]), the adhesive member is brought into contact with the at least one first light-emitting element located in the inner portion (31 is brought into contact with the defective chip of 11 by S104 located in ERin, [0072]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Wada (KR 2021/0091640) in view of Sau et al. (US 2021/0249395; hereinafter ‘Sau’).
Regarding claim 7, Wada teaches the method for manufacturing the light-emitting device according to claim 4, but does not teach the method wherein: an interval between the plurality of first light-emitting elements disposed in the element region is equal to or less than 30 μm.
Sau teaches a method (FIGS. 9A and 9B) wherein: an interval (w2, FIG. 1, [0031]) between the plurality of first light-emitting elements (120) disposed in the element region (102) is equal to or less than 30 μm (w2 is approximately 20 μm or less).
As taught by Sau, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: an interval between the plurality of first light-emitting elements disposed in the element region is equal to or less than 30 μm as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Sau in combination with Wada due to above reason.
Regarding claim 8, Wada teaches the method for manufacturing the light-emitting device according to claim 5, but does not teach the method wherein: an interval between the plurality of first light-emitting elements disposed in the element region is equal to or less than 30 μm.
Sau teaches a method (FIGS. 9A and 9B) wherein: an interval (w2, FIG. 1, [0031]) between the plurality of first light-emitting elements (120) disposed in the element region (102) is equal to or less than 30 μm (w2 is approximately 20 μm or less).
As taught by Sau, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: an interval between the plurality of first light-emitting elements disposed in the element region is equal to or less than 30 μm as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Sau in combination with Wada due to above reason.
Regarding claim 9, Wada teaches the method for manufacturing the light-emitting device according to claim 6, but does not teach the method wherein: an interval between the plurality of first light-emitting elements disposed in the element region is equal to or less than 30 μm.
Sau teaches a method (FIGS. 9A and 9B) wherein: an interval (w2, FIG. 1, [0031]) between the plurality of first light-emitting elements (120) disposed in the element region (102) is equal to or less than 30 μm (w2 is approximately 20 μm or less).
As taught by Sau, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: an interval between the plurality of first light-emitting elements disposed in the element region is equal to or less than 30 μm as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Sau in combination with Wada due to above reason.
Claims 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Wada (KR 2021/0091640).
Regarding claim 10, Wada teaches the method for manufacturing the light-emitting device according to claim 1, wherein:
in a plan view (a plan view, FIG. 7), a shape of each of the plurality of first light-emitting elements is rectangular (11 is rectangular shape, [0049]), and
a length of one side of each of the plurality of first light-emitting elements is in a range of 30 μm to 100 μm (the length of 11 in a range from 1 μm to 100 μm, [0049]).
Wada does not explicitly teach the method, wherein a length of one side of each of the plurality of first light-emitting elements is in a range of 30 μm to 100 μm.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Wada to obtain and achieve the method the plurality of first light-emitting elements is in a range of 30 μm to 100 μm as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Regarding claim 11, Wada teaches the method for manufacturing the light-emitting device according to claim 2, wherein:
in a plan view (a plan view, FIG. 7), a shape of each of the plurality of first light-emitting elements is rectangular (11 is rectangular shape, [0049]), and
a length of one side of each of the plurality of first light-emitting elements is in a range of 30 μm to 100 μm (the length of 11 in a range from 1 μm to 100 μm, [0049]).
Wada does not explicitly teach the method, wherein a length of one side of each of the plurality of first light-emitting elements is in a range of 30 μm to 100 μm.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Wada to obtain and achieve the method the plurality of first light-emitting elements is in a range of 30 μm to 100 μm as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Regarding claim 12, Wada teaches the method for manufacturing the light-emitting device according to claim 3, wherein:
in a plan view (a plan view, FIG. 7), a shape of each of the plurality of first light-emitting elements is rectangular (11 is rectangular shape, [0049]), and
a length of one side of each of the plurality of first light-emitting elements is in a range of 30 μm to 100 μm (the length of 11 in a range from 1 μm to 100 μm, [0049]).
Wada does not explicitly teach the method, wherein a length of one side of each of the plurality of first light-emitting elements is in a range of 30 μm to 100 μm.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Wada to obtain and achieve the method the plurality of first light-emitting elements is in a range of 30 μm to 100 μm as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Regarding claim 13, Wada teaches the method for manufacturing the light-emitting device according to claim 3, wherein:
the temperature under the first joining condition is in a range of 80° C to 200° C (a temperature under the temporary bonding step in a range from room temperature to below 216 °C, [0076, 0078]), and
the temperature under the second joining condition is in a range of 200° C. to 300° C (a temperature under the reflow step higher than a solder melting temperature being in a range of 217-220 °C, [0078, 0081]).
Wada does not explicitly teach the method wherein a temperature under the first joining condition is in a range of 80° C to 200° C.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Wada to obtain and achieve the method wherein a temperature under the first joining condition is in a range of 80° C to 200° C as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Regarding claim 14, Wada teaches the method for manufacturing the light-emitting device according to claim 6, wherein:
the temperature under the first joining condition is in a range of 80° C to 200° C (a temperature under the temporary bonding step in a range from room temperature to below 216 °C, [0076, 0078]), and
the temperature under the second joining condition is in a range of 200° C. to 300° C (a temperature under the reflow step higher than a solder melting temperature being in a range of 217-220 °C, [0078, 0081]).
Wada does not explicitly teach the method wherein a temperature under the first joining condition is in a range of 80° C to 200° C.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Wada to obtain and achieve the method wherein a temperature under the first joining condition is in a range of 80° C to 200° C as claimed, because it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Wada (KR 2021/0091640) in view of Hideki et al. (JPH 10110235).
Regarding claim 15, Wada teaches the method for manufacturing the light-emitting device according to claim 3, but does not teach the method wherein: an applied pressure under the first joining condition is in a range of 10 MPa to 150 MPa, and an applied pressure under the second joining condition is in a range of 40 MPa to 200 MPa.
Hideki teaches a method [0013] wherein:
an applied pressure under the first joining condition is in a range of 10 MPa to 150 MPa (50 MPa applied pressure during the first joining condition performed at a temperature lower than an eutectic melting temperature, [0022, 0024, 0027]), and
an applied pressure under the second joining condition is in a range of 40 MPa to 200 MPa (50 MPa applied pressure during the second joining condition performed at a temperature higher than the eutectic melting temperature).
Hideki does not explicitly teach a solder bonding process for a method for manufacturing a light-emitting device.
Hideki, however, discloses a pressure-assisted joining process involving eutectic phase formation and solidification with reference to a eutectic melting temperature, under applied pressures within a range of 10 MPa to 200 MPa [0018, 0027]. Accordingly, the applied pressure conditions are readily applicable to solder bonding processes, in which joining is likewise governed by material behavior below and above a solder melting point. Thus, it would have been obvious that the pressure-assisted joining technique is applicable to a method for manufacturing a light-emitting device, including joining of light-emitting elements. Further, if the body of a claim fully and intrinsically sets forth all of the limitations of the claimed invention, and the preamble merely states the purpose or intended use of the invention, the preamble is not considered a limitation and is of no significance to claim construction. Corning Glass Works, 868 F.2d at 1257, 9 USPQ2d at 1966 (Fed. Cir. 1989)
As taught by Hideki, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: an applied load under the first joining condition is in a range of 10 MPa to 150 MPa, and an applied load under the second joining condition is in a range of 40 MPa to 200 MPa as claimed, because an applied pressure in a range of 10 MPa to 50 MPa is preferred for pressure-assisted joining, in that pressure below this range are insufficient to induce the desired joining effect, while pressure above this range impose practical limitations on processing equipment, thereby favoriting process stability and practicality [0018]. Further, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Hideki in combination with Wada due to above reason.
Regarding claim 16, Wada teaches the method for manufacturing the light-emitting device according to claim 6, but does not teach the method wherein: an applied pressure under the first joining condition is in a range of 10 MPa to 150 MPa, and an applied pressure under the second joining condition is in a range of 40 MPa to 200 MPa.
Hideki teaches a method [0013] wherein:
an applied pressure under the first joining condition is in a range of 10 MPa to 150 MPa (50 MPa applied pressure during the first joining condition performed at a temperature lower than an eutectic melting temperature, [0022, 0024, 0027]), and
an applied pressure under the second joining condition is in a range of 40 MPa to 200 MPa (50 MPa applied pressure during the second joining condition performed at a temperature higher than the eutectic melting temperature).
Hideki does not explicitly teach a solder bonding process for a method for manufacturing a light-emitting device.
Hideki, however, discloses a pressure-assisted joining process involving eutectic phase formation and solidification with reference to a eutectic melting temperature, under applied pressures within a range of 10 MPa to 200 MPa [0018, 0027]. Accordingly, the applied pressure conditions are readily applicable to solder bonding processes, in which joining is likewise governed by material behavior below and above a solder melting point. Thus, it would have been obvious that the pressure-assisted joining technique is applicable to a method for manufacturing a light-emitting device, including joining of light-emitting elements. Further, if the body of a claim fully and intrinsically sets forth all of the limitations of the claimed invention, and the preamble merely states the purpose or intended use of the invention, the preamble is not considered a limitation and is of no significance to claim construction. Corning Glass Works, 868 F.2d at 1257, 9 USPQ2d at 1966 (Fed. Cir. 1989)
As taught by Hideki, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: an applied load under the first joining condition is in a range of 10 MPa to 150 MPa, and an applied load under the second joining condition is in a range of 40 MPa to 200 MPa as claimed, because an applied pressure in a range of 10 MPa to 50 MPa is preferred for pressure-assisted joining, in that pressure below this range are insufficient to induce the desired joining effect, while pressure above this range impose practical limitations on processing equipment, thereby favoriting process stability and practicality [0018]. Further, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Alter, 105 USPQ 233.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Hideki in combination with Wada due to above reason.
Claims 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Wada (KR 2021/0091640) in view of Koyama (US 2015/0348858).
Regarding claim 17, Wada teaches the method for manufacturing the light-emitting device according to claim 3, but does not teach the method wherein: a time period during which the load is applied under the first joining condition is in a range of 0.1 seconds to 10 seconds, and a time period during which the load is applied under the second joining condition is in a range of 1 seconds to 60 seconds.
Koyama teaches a method [0049] wherein:
a time period during which the load is applied under the first joining condition is in a range of 0.1 seconds to 10 seconds (the IC chips is mounted under a load of 30N for 5 seconds, [0071]), and
a time period during which the load is applied under the second joining condition is in a range of 1 seconds to 60 seconds (thermocompression bonding is performed while a load of 30N is applied for 5 seconds during temperature increase to 250 °C, [0072]).
Koyama does not explicitly teach that the IC chip is a light-emitting element.
Koyama, however, discloses suppression of damage to a thin semiconductor chip [0055] having a small thickness [0069], and thus, it would have been obvious that the disclosed techniques are applicable to light-emitting elements. Further, if the body of a claim fully and intrinsically sets forth all of the limitations of the claimed invention, and the preamble merely states the purpose or intended use of the invention, the preamble is not considered a limitation and is of no significance to claim construction. Corning Glass Works, 868 F.2d at 1257, 9 USPQ2d at 1966 (Fed. Cir. 1989)
As taught by Koyama, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: a time period during which the load is applied under the first joining condition is in a range of 0.1 seconds to 10 seconds, and a time period during which the load is applied under the second joining condition is in a range of 1 seconds to 60 seconds as claimed, because a two-step bonding process performed at two different temperatures with respect to the solder melting point under an applied load for a short duration suppresses damage to the semiconductor chip while improving manufacturing efficiency [0040, 0050, 0071-0072].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Koyama in combination with Wada due to above reason.
Regarding claim 18, Wada teaches the method for manufacturing the light-emitting device according to claim 6, but does not teach the method wherein: a time period during which the load is applied under the first joining condition is in a range of 0.1 seconds to 10 seconds, and a time period during which the load is applied under the second joining condition is in a range of 1 seconds to 60 seconds.
Koyama teaches a method [0049] wherein:
a time period during which the load is applied under the first joining condition is in a range of 0.1 seconds to 10 seconds (the IC chips is mounted under a load of 30N for 5 seconds, [0071]), and
a time period during which the load is applied under the second joining condition is in a range of 1 seconds to 60 seconds (thermocompression bonding is performed while a load of 30N is applied for 5 seconds during temperature increase to 250 °C, [0072]).
Koyama does not explicitly teach that the IC chip is a light-emitting element.
Koyama, however, discloses suppression of damage to a thin semiconductor chip [0055] having a small thickness [0069], and thus, it would have been obvious that the disclosed techniques are applicable to light-emitting elements. Further, if the body of a claim fully and intrinsically sets forth all of the limitations of the claimed invention, and the preamble merely states the purpose or intended use of the invention, the preamble is not considered a limitation and is of no significance to claim construction. Corning Glass Works, 868 F.2d at 1257, 9 USPQ2d at 1966 (Fed. Cir. 1989)
As taught by Koyama, one of ordinary skill in the art would utilize and modify the above teaching into Wada to obtain and achieve the method wherein: a time period during which the load is applied under the first joining condition is in a range of 0.1 seconds to 10 seconds, and a time period during which the load is applied under the second joining condition is in a range of 1 seconds to 60 seconds as claimed, because a two-step bonding process performed at two different temperatures with respect to the solder melting point under an applied load for a short duration suppresses damage to the semiconductor chip while improving manufacturing efficiency [0040, 0050, 0071-0072].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Koyama in combination with Wada due to above reason.
Response to Arguments
Applicant's arguments with respect to claims have been considered but are moot in view of the new ground of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Applicant submits, in page 11 of Remark, that “joining the joining portions of the first light-emitting elements and corresponding ones of the wiring portions under a first joining condition by bringing the joining portions of the first light-emitting elements and the corresponding wiring portions into direct contact with each other”, because solder material 13 is disposed between chip-side electrode 12 and driving substrate-side electrode 21.
The examiner respectfully disagrees.
As discussed in the rejection above, Wada teaches temporary bonding between chip side electrode 12 and driving substrate-side electrode 21 through conductive metallic material 13 (FIG. 9, [0083]). The amended limitation does not recite that the joining portions and the wiring portions are joined without any intervening metallic material, solder material alloy region, or metallic interfacial layer. Rather, the claim merely requires that the joining portions and the corresponding wiring portions are brought into “direct contact with each other”.
The portions joined in Wada are conductive metallic structures physically and electrically connected through metallic bonding material 13. Such metallic joining reasonably satisfies the claimed “direct contact”, because the claim does not exclude conductive metallic interfacial material and does not require direct exposure of pure gold surfaces without any intervening metallic bonding structure.
Applicant’s arguments rely on importing unclaimed limitations from the specification into claim 1. Although the specification discusses certain advantages associated with direct joining of gold-containing sections, including reduced residue and improved rejoining characteristics, those advantages are not positively recited in the claim. Claim 1 does not recite solder-free bonding, residue-free separation, direct Au-to-Au surface contact, or absence of intervening metallic material.
Further, Wada expressly teaches that material 13 may be “solder (or metal material)” [0083]. Thus, Wada teaches a metallic bonding interface between chip-side electrode 12 and driving substrate-side electrode 21. Under the broadest reasonable interpretation, such metallic bonding structure reasonably corresponds to the claimed direct contact between the joining portions and the wiring portions.
Applicant submits, in page 13 of Remark, that “Yip does not cure the deficiencies of Wada discussed with respect to claim 1”.
The examiner respectfully disagrees.
As discussed in the rejection above, the presently amended limitations directed to temporary removal, adhesive-member-assisted separation, electrical inspection, defective chip determination, and defective chip removal are taught by Wada itself, including repair operations S103 and S106 and the associated relay substrate repair structure disclosed in FIGS. 5-9. Accordingly, Applicant’s arguments directed to Yip are not persuasive.
Details included in the above rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 6/8/26
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