Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Remarks
Regarding claims 1 and 17:
PNG
media_image1.png
64
628
media_image1.png
Greyscale
The examiner respectfully disagrees with the applicants’ position. The applicant states Chapelle doesn’t teach at least optical divider coupled between a single input node and multiple photodiodes. Although Fig. 3 doesn’t explicitly show this limitation, Fig. 1, which teaches the system view of the prior art, teaches these limitations. Especially Chapelle teaches in Fig. 1, a single input node coupled to receive an optical input signal from a single input waveguide (Fig. 1 shows single input at 22)…at least one optical divider coupled between the single input node and the photodiodes (Fig. 1 shows divider 20 between 22 and photodiodes coupled to fibers 24 which are also shown in Fig. 3; Col. 2, Coupler 20 divides the optic signal on fiber-optic cable 22 into three optical signals on fiber-optic cables 24). Therefore, Chapelle teaches these limitations of the claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 102a1 as being anticipated by de la Chapelle (US 5001336) hereon Chapelle.
Regarding claim 1, Chapelle teaches a circuit (Fig. 3) comprising: a single input node coupled to receive an optical input signal from a single input waveguide (Fig. 1 shows single input at 22); an output line having an output node (Fig. 5, discloses a photodiode array. The electrical current are summed on the output line with resistors 92. It is the same line 70 in Fig. 3); a power supply line (Fig. 3, voltage source 52 supplies power to the photodiodes); and photodiodes electrically connected in parallel between the power supply line and the output line (Fig. 3, photodiodes 60 connected in parallel); at least one optical divider coupled between the single input node and the photodiodes (Fig. 1 shows divider 20 between 22 and photodiodes coupled to fibers 24 which are also shown in Fig. 3; Col. 2, lines 50-55, Coupler 20 divides the optic signal on fiber-optic cable 22 into three optical signals on fiber-optic cables 24), wherein the photodiodes generate an electrical output signal at the output node in response to the optical input signal (Fig. 3, photodiodes generate electrical output signals according to the incoming optical signals from optical fibers 24).
Regarding claim 2, Chapelle teaches the circuit of claim 1, wherein the power supply line is connected to receive a positive power supply voltage, wherein the photodiodes have cathode terminals connected to the power supply line and anode terminals connected to intermediate nodes, respectively, on the output line (Fig. 3 shows the voltage connections to the photodiodes and the output line), and wherein the circuit further includes: one optical divider coupled to receive the optical input signal and to output equally divided optical signals to the photodiodes, respectively (Col. 2, lines 50-55, Coupler 20 divides the optic signal on fiber-optic cable 22 into three optical signals on fiber-optic cables 24; optical input in Fig. 3 is divided onto optical fibers 24); and at least one transmission link in the output line, wherein each transmission link is connected between two adjacent intermediate nodes (Fig. 3, the transmission lines are disclosed as 70).
Regarding claim 3, Chapelle teaches the circuit of claim 1, wherein the photodiodes have a same design (Fig. 3 shows the photodiodes have a same design).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 17 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over de la Chapelle (US 5001336) hereon Chapelle in view of Sugimoto (US 2011/0318015).
Regarding claim 17, Chapelle teaches an optical receiver (Fig. 3) comprising: a multi-photodetector circuit including a single input node coupled to receive an optical input signal from a single input waveguide (Fig. 1 shows single input at 22), at least one power supply line (Fig. 3, voltage source 52 supplies power to the photodiodes), an output line (Fig. 5, discloses a photodiode array. The electrical current are summed on the output line with resistors 92. It is the same line 70 in Fig. 3), and at least two photodiodes electrically connected in parallel between the power supply line and the output line (Fig. 3, photodiodes generate electrical output signals according to the incoming optical signals from optical fibers 24) and at least one optical divider coupled between the single input node and the photodiodes (Fig. 1 shows divider 20 between 22 and photodiodes coupled to fibers 24 which are also shown in Fig. 3; Col. 2, lines 50-55, Coupler 20 divides the optic signal on fiber-optic cable 22 into three optical signals on fiber-optic cables 24), wherein the photodiodes generate an electrical output signal at the output node in response to the optical input signal (Fig. 3, photodiodes generate electrical output signals according to the incoming optical signals from optical fibers 24)
Chapelle doesn’t teach the receiver comprises a transimpedance amplifier; wherein the output line has an output node connected to the transimpedance amplifier.
Sugimoto teaches a receiver comprising a transimpedance amplifier (Fig. 1, TIA 10); wherein the output line has an output node connected to the transimpedance amplifier (Fig. 1, output from multi photodetector setup 12/14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the receiver taught by Chapelle and incorporate the TIA taught by Sugimoto in order to enhance the SNR of the signal (Sugimoto: paragraph [0020]).
Regarding claim 18, Chapelle in view of Sugimoto teaches the optical receiver of claim 17, wherein Chapelle teaches the power supply line is a positive power supply line, all the photodiodes have cathode terminals connected to the positive power supply line and anode terminals connected to the output line (Fig. 3 shows the voltage connections to the photodiodes and the output line).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over de la Chapelle (US 5001336) hereon Chapelle in view of Sugimoto (US 2011/0318015) in further view of Welch (US 2005/0207696).
Regarding claim 20, Chapelle in view of Sugimoto teaches the optical receiver of claim 17.
Although Chapelle in view of Sugimoto teaches the optical receiver, Chapelle in view of Sugimoto doesn’t teach wherein the optical receiver is a monolithically integrated optical receiver on a radio frequency integrated circuit chip.
Welch teaches a receiver wherein the optical receiver is a monolithically integrated optical receiver on a radio frequency integrated circuit chip (paragraph [0182], architecture for coupling the electrical signal outputs from bonding pads 28 of the RxPIC chip photodiodes 16 to a RF submount substrate or a miniature circuit board or a monolithic microwave integrated circuit (MMIC)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate a monolithically integrated receiver as taught by Welch with the teachings of Chapelle in view of Sugimoto in order to have a compact substrate thereby reducing costs and boosting performance.
Allowable Subject Matter
Claims 4-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 21-26 are allowed over the prior arts of record.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See the notice of reference cited (PTO-892).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRANESH K BARUA whose telephone number is (571)270-1017. The examiner can normally be reached on Mon-Sat: 11-8pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Payne can be reached on 5712723024. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PRANESH K BARUA/Primary Examiner, Art Unit 2635
Prosecution Insights