Prosecution Insights
Last updated: April 19, 2026
Application No. 18/307,977

THIN FILM RESISTOR WITH GRADED RESISTIVE LAYER

Non-Final OA §103
Filed
Apr 27, 2023
Examiner
LEE, KYUNG S
Art Unit
2831
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
92%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
984 granted / 1129 resolved
+19.2% vs TC avg
Minimal +5% lift
Without
With
+4.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
33 currently pending
Career history
1162
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
39.2%
-0.8% vs TC avg
§102
41.4%
+1.4% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1129 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to because: Figs. 3A to 3G include enlarged views. Each of the view and the enlarged view must be labeled as separate views. Further, respective “profiles 032a-302g” in the Figs. 3A to 3G also require separate labeling. In Figs. 5A to 5J, “cross-section A-A” should be removed. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Hill et al., US Pat. 7,332,403 in view of Yang et al., US Pat. 8,530,320. Regarding claim 13, Hill teaches the method (detailed in figs. 1-21), comprising: forming a resistor layer (SiCr thin film resistor 210; col. 4, line 47-53) over a dielectric layer (dielectric material substrate layer 130; see col. 4, lines 44-46); forming a capping structure (TiN layer deposited over the thin film resistor 210; col. 5, lines 7-19); and forming an interconnect structure (conductive filler 1610; col. 7, lines 17-20). Hill teaches the claimed invention except for the resistive layer being a graded resistive layer. Yang teaches a graded resistive layer (metal nitride layer 22 and 24, forming of the graded resistive layer; see at least col. 1, lines 55-62 and col. 8, lines 24-49), the graded resistive layer providing higher electrical resistance as compared to prior art metal resistors having the same dimension. It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to combine the teachings of Yang with Hill, since the graded resistive layer taught by Yang provides higher resistance resistor, thus allowing for decreasing the size of the resistive device of Hill. Allowable Subject Matter Claims 1-12 are allowed. Regarding claim 1, the prior art does not teach or suggest the graded resistive layer below the capping structure comprising: a bulk silicon chromium region; and a chromium-rich region. Claims 2-6 depend on claim 1. Regarding claim 7, the prior art does not teach or suggest the graded resistive layer below the capping structure comprising: a bulk silicon chromium region; and a silicon-rich region. Claims 8-12 depend on claim 7. Claims 14-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 14, the prior art does not teach or suggest a method, wherein forming the graded resistive layer over the dielectric layer comprising: depositing a layer of a bulk silicon chromium material over the dielectric layer; and depositing a layer of a chromium-rich material on the layer of the bulk silicon chromium material. Regarding claim 15, the prior art does not teach or suggest a method, wherein forming the graded resistive layer over the dielectric layer comprising: depositing a layer of a bulk silicon chromium material over the dielectric layer; and depositing a layer of a silicon-rich material on the layer of the bulk silicon chromium material. Claim 16 depends on claim 15. Regarding claim 17, the prior art does not teach or suggest a method, wherein forming the graded resistive layer over the dielectric layer comprising: depositing a layer of a silicon-rich material over the dielectric layer; and depositing a layer of a bulk silicon chromium material on the layer of the silicon-rich material. Claim 18 depends on claim 17. Regarding claim 19, the prior art does not teach or suggest a method, wherein forming the graded resistive layer over the dielectric layer comprising: depositing a first layer of a silicon-rich material over the dielectric layer; depositing a layer of a bulk silicon chromium material on the first layer of the silicon-rich material; and depositing a second layer of a silicon-rich material on the layer of the bulk silicon chromium material. Claim 20 depends on claim 19. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYUNG S LEE whose telephone number is (571)272-1994. The examiner can normally be reached 7AM-3PM M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Renee Luebke can be reached at 571-272-2009. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KYUNG S LEE/Primary Examiner, Art Unit 2833
Read full office action

Prosecution Timeline

Apr 27, 2023
Application Filed
Jan 05, 2026
Non-Final Rejection — §103
Mar 17, 2026
Interview Requested
Mar 23, 2026
Applicant Interview (Telephonic)
Mar 24, 2026
Examiner Interview Summary

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603198
SURFACE-MOUNTED POLYMER PCT OVERCURRENT PROTECTION ELEMENT HAVING SMALL PACKAGE SIZE
2y 5m to grant Granted Apr 14, 2026
Patent 12592328
RESISTOR TRIMMING DEVICE AND ELECTRONIC DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12586698
DEVICES AND METHODS RELATED TO MOV HAVING MODIFIED EDGE
2y 5m to grant Granted Mar 24, 2026
Patent 12580104
SHUNT RESISTOR AND SHUNT RESISTANCE DEVICE
2y 5m to grant Granted Mar 17, 2026
Patent 12580105
MULTILAYER VARISTOR AND METHOD FOR MANUFACTURING THE SAME
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
92%
With Interview (+4.8%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 1129 resolved cases by this examiner. Grant probability derived from career allow rate.

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