DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/12/2026 has been entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-10, 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Ariki (20170323839) in view of Takei (20110255281) further in view of Iwai (20210020551) further in view of Shirao (20220173007)
Regarding Claim 1, in Figs. 1-3 and paragraphs 0035, 0040 and 0041, Ariki discloses a semiconductor module comprising: a first die pad having a first face, and a second face directed in a direction opposite to the first face; a first outer lead positioned in the direction in which the second face is directed relative to the first die pad; a first inner lead connecting the first die pad and the first outer lead to each other and having a portion; a first semiconductor chip joined to the second face; and a sealing material sealing the first die pad and the first semiconductor chip, wherein the sealing material includes: a first sealing portion joined to the first face and constituted of a first resin composition; and a second sealing portion joined to the second face and constituted of a second resin composition lower in thermal conductivity than the first resin composition, and the first sealing portion has: an exposed face constituting a part of an outer surface of the sealing material; a first joining face joined to the first die pad; and a second joining face joined to the portion along a height direction of the portion. Ariki fails to disclose the claimed stepped portion. However, Takei discloses a semiconductor device where in Figs. 3A, 3B and 5-10, the required stepped portion is disclosed.
It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required stepped portion in Ariki as taught by Takei in order increase the thermal dissipation efficiency.
Ariki and Takei combination fails to disclose the added limitation wherein the stepped portion is inclined, and a thickness of the first inner lead differs from a thickness of the first die pad. However, Iwai discloses a semiconductor device where in Figs.2 and paragraphs 0002, 0048 and 0057 the required thickness relationship is disclosed.
It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required thickness requirement in Ariki and Takei combination as taught by Iwai in order to suppress heat generation.
Ariki, Takei, Iwai combination fails to disclose the newly added limitation of at least a portion of the first inner lead, excluding the stepped portion, is included within the second sealing portion. However, Shirao discloses a semiconductor module where in Figs 4 and 17, at least a portion of the first inner lead 21a/11, excluding the stepped portion, is included within the second sealing portion 5/62
It would have been obvious toe one of having ordinary skill in the art before the effective filing of the claimed invention to have the required configuration of lead within the sealing portion in Ariki, Takei and Iwai combination as taught by Shirao, in order to protect the semiconductor chips since the configuration will suppress the sealant unfilled portion
Regarding Claim 2, in Ariki, the first joining face is joined to a side surface of the first die pad and the first face.
Regarding Claim 3, in Ariki, the second face has a part that is not joined to the first joining face.
Regarding Claim 4, in Ariki, the second joining face is joined to the stepped portion entirely in a height direction of the stepped portion.
Regarding Claim 5, in Ariki, the second joining face is joined to the stepped portion entirely in a circumferential direction of the stepped portion.
Regarding Claim 6, in Ariki, the second joining face covers an entirety of a surface of the stepped portion.
Regarding Claim 7, in Ariki, the first sealing portion has an end face directed in a direction opposite to the exposed face, and the end face has a part overlapping with the stepped portion when viewed in a thickness direction of the first die pad and being parallel to the second face.
Regarding Claim 8, in Ariki, a thickness of the first die pad is greater than that of the first inner lead.
Regarding Claim 9, in Ariki, a second die pad positioned in a direction in which the second face is directed relative to the first die pad; a second outer lead; a second inner lead configured integrally with the second die pad and the second outer lead; and a second semiconductor chip joined to the second die pad, wherein the first sealing portion further has a third joining face joined to either or both of the second die pad and the second inner lead.
Regarding Claim 10, in Ariki, the first sealing portion has a notch part extending from the exposed face to the first face, and the second sealing portion has a part filled in the notch part.
Regarding Claim 14, in paragraphs 0087 and 0104 of Iwai, a thickness of the first inner lead differs from a thickness of the first die pad.
Regarding Claim 15, in paragraphs 0087 and 0104 of Iwai, a thickness of the first die pad is greater than twice that of the first inner lead.
Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Ariki (20170323839) in view of Kawashima (20190057928) further in view of Iwai (20210020551) further in view of Shirao (20220173007)
Regarding Claim 11, in Figs. 1-3 and paragraphs 0035, 0040 and 0041, Ariki discloses a manufacturing method for a semiconductor module including: a first die pad having a first face, and a second face directed in a direction opposite to the first face, a first outer lead positioned in the direction in which the second face is directed relative to the first die pad, a first inner lead connecting the first die pad and the first outer lead to each other and having a stepped portion, a first semiconductor chip joined to the second face, and a sealing material sealing the first die pad and the first semiconductor chip, the method comprising: preparing a lead frame including the first die pad, the first outer lead, and the first inner lead; forming, as a first forming step, a first sealing portion to be joined to the first face as a part of the sealing material using a first resin composition; and forming, as a second forming step, forming a second sealing portion to be joined to the second face as another part of the sealing material using a second resin composition lower in thermal conductivity than the first resin composition, wherein the first sealing portion has: an exposed face constituting a part of an outer surface of the sealing material; a first joining face joined to the first die pad; and a second joining face joined to the portion along a height direction of the portion. Ariki fails to disclose the claimed stepped portion. However, Kawashima discloses a semiconductor device where in Figs. 2, 4 and 7-10, the required stepped portion is disclosed.
It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required stepped portion in Ariki as taught by Kawashima in order increase the thermal dissipation efficiency.
Ariki and Kawashima combination fails to disclose the added limitation wherein the stepped portion is inclined, and a thickness of the first inner lead differs from a thickness of the first die pad. However, Iwai discloses a semiconductor device where in Figs.2 and paragraphs 0002, 0048 and 0057 the required thickness relationship is disclosed.
It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required thickness requirement in Ariki and Kawashima combination as taught by Iwai in order to suppress heat generation.
Ariki, Kawashima, Iwai combination fails to disclose the newly added limitation of at least a portion of the first inner lead, excluding the stepped portion, is included within the second sealing portion. However, Shirao discloses a semiconductor module where in Figs 4 and 17, at least a portion of the first inner lead 21a/11, excluding the stepped portion, is included within the second sealing portion 5/62
It would have been obvious toe one of having ordinary skill in the art before the effective filing of the claimed invention to have the required configuration of lead within the sealing portion in Ariki, Kawashima and Iwai combination as taught by Shirao, in order to protect the semiconductor chips since the configuration will suppress the sealant unfilled portion
Regarding Claim 12, in Ariki, the first forming step includes forming the first sealing portion using a first forming mold, and the second forming step includes forming the second sealing portion using a second forming mold different from the first forming mold.
Regarding Claim 13, in Ariki, the first forming mold has protrusions to be brought into contact with the first face, the first forming step includes forming a notch part extending from the exposed face to the first face on the first sealing portion by the protrusions, and the second forming step includes forming fills the notch part with a part of the second sealing portion.
Conclusion
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/FAZLI ERDEM/Primary Examiner, Art Unit 2812 1/15/2026