Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
Claim(s) 1-5, 14-15, and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar (US Patent No. 9997353) in further view of Wu (US Patent No. 11894318).
Regarding claim 1, Kumar teaches a circuit chip comprising: a first body having a negative Poisson’s ratio, a second body having a positive Poisson’s ratio, wherein the first body and the second body are stacked on one another and thermally coupled to one another (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a glass-ceramic layer 120 (first body) and a silicon substrate 110 (second body).).
Kumar fails to teach a first integrated circuit embedded in the second body.
Wu teaches a first integrated circuit embedded in the second body (Fig. 28 and Col. 20, lines 47-55 point to a package substrate 650 (second body), which may be a PCB or the like and which may include a wide variety of devices such as transistors, capacitors, resistors, combinations of these (first integrated circuit).). Thus, it would have been obvious to a person of ordinary skill in the art (POSITA) prior to the filing date of the claimed invention to combine the teachings of Kumar and Wu, such that the second body further comprises an integrated circuit in order to generate the structural and functional requirements of the design for the device stack, such as the formation of functional circuitry.
Regarding claim 2, Kumar teaches wherein the first body and the second body are rigid (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a glass-ceramic layer 120 (first body) and a silicon substrate 110 (second body).).
Regarding claim 3, Kumar teaches wherein the first body comprises a semiconductor, a glass, a ceramic, or a glass-ceramic (Fig. 1A and Col. 4, lines 17-19 point to the glass-ceramic layer 120 (first body).).
Regarding claim 4, Kumar teaches wherein the second body comprises a silicon substrate or a printed circuit board (Fig. 1A and Col. 4, lines 17-19 point to the silicon substrate 110 (second body).).
Regarding claim 5, Kumar teaches wherein the first body and the second body each have a substantially planar shape with a shortest dimension in a first direction, and wherein the first body and the second body are stacked on one another in the first direction (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a glass-ceramic layer 120 (first body) and a silicon substrate 110 (second body) stacked vertically (first direction).).
Regarding claim 14, Kumar teaches wherein the first body and the second body are in contact with one another (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a glass-ceramic layer 120 (first body) and a silicon substrate 110 (second body).).
Regarding claim 15, Kumar teaches a third body having a negative Poisson’s ratio; a fourth body having a positive Poisson’s ratio, wherein the third body and the fourth body are stacked on one another and thermally coupled to one another, and wherein the first body and the second body are spaced apart from the third body and the fourth body (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a glass-ceramic layer 120 (third body) and a silicon substrate 110 (fourth body). It is considered obvious that multiple iterations of the same structure would occur, and that one of ordinary skill in the art would at least attempt to work them together in order to increase the overall area of the device and allow for further components to be attached.).
Kumar fails to teach a second integrated circuit in the fourth body; and one or more connectors electrically coupling the first integrated circuit to the second integrated circuit.
Wu teaches a second integrated circuit in the fourth body (Fig. 28 and Col. 20, lines 47-55 point to a package substrate 650 (fourth body), which may be a PCB or the like and which may include a wide variety of devices such as transistors, capacitors, resistors, combinations of these (second integrated circuit).); and one or more connectors electrically coupling the first integrated circuit to the second integrated circuit (It is considered obvious that one of ordinary skill in the art would at least attempt to electrically couple both integrated circuits in order to have them work together.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar and Wu, such that a second integrated circuit is formed in a separate structure/fourth body and electrically coupled to the first integrated circuit in order to create a multi-chip module where each chip is a functionally separate domain that works together in an overall system.
Regarding claim 17, Kumar teaches a circuit chip, comprising: a body having a positive Poisson’s ratio; and a coating on the body, the coating having a negative Poisson’s ratio (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a silicon substrate 110 (body) and a glass-ceramic layer 120 (coating).).
Kumar fails to teach an integrated circuit embedded in the body.
Wu teaches an integrated circuit embedded in the body (Fig. 28 and Col. 20, lines 47-55 point to a package substrate 650 (body), which may be a PCB or the like and which may include a wide variety of devices such as transistors, capacitors, resistors, combinations of these (integrated circuit).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar and Wu, such that the body further comprises an integrated circuit in order to generate the structural and functional requirements of the design for the device stack, such as the formation of functional circuitry.
Regarding claim 18, Kumar teaches wherein the coating comprises a glass-ceramic having the negative Poisson’s ratio (Fig. 1A and Col. 4, lines 17-19 point to a composite substrate comprising a glass-ceramic layer 120 (coating).).
Claim(s) 6-7, 9-12, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al. in further view of Collins (PGPub No. 20230097236).
Regarding claim 6, Collins teaches a metal pillar extending through the first body (Fig. 2C points to an electronic package comprising a portion 223 (metal pillar), which may be a PTH via, that passes through the core 202 (first body).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that a via/metal pillar extends through the core/first body in order to create a signal path between the two opposite sides of the electronic package.
Regarding claim 7, Collins teaches wherein the metal pillar extends between the first body and the second body (Fig. 2C points to a signal path (metal pillar) comprising portions 221, 222, and 223, which extend through the core 202 (first body) and the front side layers 201 (second body).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that a via/metal pillar extends through both the core/first body and the front side layers/second body in order to create a signal path between the two opposite sides of the electronic package.
Regarding claim 9, Collins teaches a second integrated circuit embedded in the first body (Fig. 2B points to an alternative embodiment of an electronic package comprising power circuitry 208 (second integrated circuit).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that a second integrated circuit is formed within the core/first body in order to allow for communication with other components without compromising the package’s overall profile.
Regarding claim 10, Collins teaches a connector arranged to electrically couple the first integrated circuit and the second integrated circuit (Fig. 2B points to at least one signal path (connector) extending from the power circuitry 208 (second integrated circuit) and through the front side layers 201 (second body).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that the first integrated circuit in the second body is electrically coupled to the second integrated circuit in the first body in order to allow for effective communication between the two circuits without compromising the package’s overall profile.
Regarding claim 11, Collins teaches a third body having a positive Poisson’s ratio, wherein the first body is stacked between the second body and the third body (Fig. 2C points to a package substrate 205 comprising a core 202 (first body), an upper portion (second body) including front side layers 201 and signal path portions 221 and 222, and a lower portion (third body) including back side layers 203 and signal path portions 224 and 225.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that an additional portion/third body is formed on the opposite side of the core/first body in order to increase routing density and/or provide mechanical and thermal protection to the core.
Regarding claim 12, Collins teaches wherein the second body and the third body are formed of a common material (Fig. 2C points to a package substrate 205 comprising a core 202 (first body), an upper portion (second body) including front side layers 201 and signal path portions 221 and 222, and a lower portion (third body) including back side layers 203 and signal path portions 224 and 225. [0081] further points to an alternative embodiment where both the front side layers and back side layers comprise a dielectric material.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that both the upper portion/second body and the lower portion/third body are formed of a common material in order to streamline the fabrication process and/or reduce costs.
Regarding claim 16, Collins teaches an electronic device comprising the circuit chip of claim 1, the electronic device comprising a smartphone, a computer, a tablet, a wearable devices, an Internet of Things device, a camera, a vehicle, or a drone (Fig. 9 points to a computing device 900 (electronic device).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that the package/chip is part of a larger computing device/electronic device in order to provide a higher interconnect density to said device while still saving space.
Claim(s) 8 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al. in further view of Ichikawa (PGPub No. 20220102229).
Regarding claim 8, Ichikawa teaches a metal heatsink thermally coupled to the metal pillar (Fig. 22 points to a heat sink 190 in thermal contact with a composite substrate 14 (first body; metal pillar).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Ichikawa, such that a surface of the circuit chip/composite substrate is thermally coupled to a heat sink in order to improve heat dissipation.
Regarding claim 20, Ichikawa teaches a metal heatsink (Fig. 22 points to a heat sink 190 in thermal contact with a composite substrate 14 (first body; metal pillar).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Ichikawa, such that a surface of the circuit chip/composite substrate is thermally coupled to a heat sink in order to improve heat dissipation.
Ichikawa fails to teach a metal pillar extending from the body, through the coating, and to the metal heatsink.
Collins teaches a metal pillar extending from the body, through the coating, and to the metal heatsink (Fig. 4B points to an alternative electronic package comprising a signal path (metal pillar) made up of portions 421 and 422, which extends from the front side layers 401 (body) and through the core 402 (coating).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Collins, such that the metal pillar extends towards the heat sink in order to create a thermal pathway and further improve heat dissipation.
Claim(s) 13 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al. in further view of Heine (PGPub No. 20210198158).
Regarding claim 13, Heine teaches wherein the first body is porous ([0054] points to a porous sheet or porous substrate (first body) comprised of a glass-ceramic.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Heine, such that the glass-ceramic comprising the first body is porous in order to lower the thermal conductivity and/or enable higher-speed signals.
Regarding claim 19, Heine teaches wherein the coating is porous ([0054] points to a porous sheet or porous substrate (coating) comprised of a glass-ceramic.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Kumar et al. and Heine, such that the glass-ceramic comprising the coating is porous in order to lower the thermal conductivity and/or enable higher-speed signals.
Response to Arguments
Applicant's arguments filed 02/23/2026 in regards to the rejection of claims 1 and 17 have been fully considered but they are not persuasive. In response to applicant's argument that the “glass-ceramic layer 120” as taught by Kumar does not necessarily have “a negative Poisson’s ratio” as disclosed by claims 1 and 17 of the present application, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. As further disclosed by the present application in claims 3 and 7, the first body/coating may comprise/comprises “a glass-ceramic”, which matches the same structure as the glass-ceramic layer 120 taught by Kumar. Although Kumar does not explicitly state that said layer exhibits a negative Poisson’s ratio, it does teach the same material composition as disclosed by the present application, while Kumar et al. further points to the same overall structure as that disclosed by said application, making it obvious to one of ordinary skill in the art that the glass ceramic layer/first body would also exhibit a negative Poission’s ratio. Thus, Applicant’s arguments are considered unpersuasive and fail to overcome the previous rejections.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/PATRICK CULLEN/ Assistant Examiner, Art Unit 2899
/DALE E PAGE/ Supervisory Patent Examiner, Art Unit 2899