Prosecution Insights
Last updated: April 19, 2026
Application No. 18/309,827

HYBRID DIAMOND BASED HEAT SPREADERS

Final Rejection §102§103
Filed
Apr 30, 2023
Examiner
LEBENTRITT, MICHAEL
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Phononics Ltd.
OA Round
2 (Final)
92%
Grant Probability
Favorable
3-4
OA Rounds
2y 5m
To Grant
98%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
916 granted / 992 resolved
+24.3% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
25 currently pending
Career history
1017
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
40.8%
+0.8% vs TC avg
§102
30.2%
-9.8% vs TC avg
§112
10.1%
-29.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 992 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Note: claims 8-14 are being treated as product by process claims, therefore the manufacturing limitations are not given patentable weight. Claim(s) 1 -3, and 8-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hu et al, US 20080157348 A1 Hu teaches: a hot areas generating portion (120) that generates hot areas during operation; and hybrid diamond heat spreaders (HDHSs) (122, 112) that are configured to dissipate at least part of the heat generated in the hot areas; wherein a HDHS of the HDHSs comprises at least two layers that include: (para 15) a crystalline diamond layer of a first thickness, a first mechanical strength, a first thermal conductivity, and a first coefficient of thermal expansion (CTE); and a diamond layer support element of a second thickness, a second mechanical strength, a second thermal conductivity, and a second CTE. (para 15-17) Note: A diamond layer is crystalline by definition, see attached supporting evidence Wikipedia downloaded December 8, 2025. 2. (Original) The semiconductor unit according to claim | wherein at least one of the following is true: (a) the first thickness is lower than the second thickness; (b) the first mechanical strength is higher than the second mechanical strength; (c) the first thermal conductivity exceeds the second thermal conductivity; or (d) the second CTE exceeds the first CTE. (para 15-17) 3. (Original) The semiconductor unit according to claim 2 wherein the first thickness is lower than the second thickness, the first mechanical strength is higher than the second mechanical strength, the first thermal conductivity exceeds the second thermal conductivity; and the second CTE exceeds the first CTE. (para 15-17) 15. (Original) The semiconductor unit according to claim 1, wherein the semiconductor unit is a single die. (para 12) 16. (Original) The semiconductor unit according to claim 1, wherein the HDHSs are in thermal communication with the hot areas generating portion and are in mechanical communication with the hot areas generating portion (para 11) 17. (Currently Amended) A method for manufacturing a silicon unit, the method comprises obtaining a hot areas (120) generating portion that generates hot areas during operation; obtaining hybrid diamond heat spreaders (HDHSs) (112, 122); and establishing a thermal communication between the hot areas generating portion and the HDHSs; wherein once established, the HDHSs are configured to dissipate at least part of the heat generated in the hot areas; wherein a HDHS of the HDHSs comprises: (i) a crystalline diamond layer of a first thickness, a first mechanical strength, a first thermal conductivity, and a first coefficient of thermal expansion (CTE); and (it) a diamond layer support element of a second thickness, a second mechanical strength, a second thermal conductivity, and a second CTE; wherein the first thickness is lower than the second thickness, the first mechanical strength is higher than the second mechanical strength, the first thermal conductivity exceeds the second thermal conductivity and the second CTE exceeds the first CTE. (para 15-17) 18. (Original) The method according to claim 17 wherein at least one of the following is true: (a) the first thickness is lower than the second thickness; (b) the first mechanical strength is higher than the second mechanical strength; (c) the first thermal conductivity exceeds the second thermal conductivity; or (d) the second CTE exceeds the first CTE. (para 15-17) 19. (Original) The method according to claim 18 wherein the first thickness is lower than the second thickness, the first mechanical strength is higher than the second mechanical strength, the first thermal conductivity exceeds the second thermal conductivity; and the second CTE exceeds the first CTE. (para 15-17) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hu. Hu fails to teach: wherein the hybrid diamond heat spreaders are spaced apart from each other and their aggregate area is smaller than the area of the semiconductor unit. Hu discloses: The assembly 110 also includes a structure 122 positioned in alignment with the hot spot 120. By aligned it is meant that at least part of the structure 122 is positioned over the hot spot 120. If the assembly were flipped, with the die on top and the heat spreader on the bottom, then at least part of the structure would be positioned under the hot spot. Where multiple hot spots 120 are present, multiple structures 122 may be used. (para 10) In regards to the area, this value would have been optimized through routine experimentation and would not lend itself to patentability in the instant application, without displaying unexpected results. (in Re Alller) Hu further teaches: 6. (Original) The semiconductor unit according to claim 4, wherein the HDHSs (122) are attached to the hot area generating portion (120) and are at least partially surrounded by a filler (116). (figure 2) Hu fails to teach claim 7: 7. (Original) The semiconductor unit according to claim 1, wherein the semiconductor unit comprises a first wafer and a second wafer, wherein the hot area generating portion belongs to the first wafer and the HDHSs are connected to the second wafer. Hu discloses: Integrated circuits may be formed on semiconductor wafers that are formed from materials such as silicon. The semiconductor wafers are processed to form various electronic devices thereon. The wafers are diced into semiconductor chips, which may then be attached to a package substrate using a variety of known methods. In one known method for attaching a chip (also known as a die) to a substrate… (para 01) In view of this disclosure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form a semiconductor unit that comprises a first wafer and a second wafer, wherein the hot area generating portion belongs to the first wafer and the HDHSs are connected to the second wafer, because this is conventionally done in the art. Allowable Subject Matter Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art references fail to teach: 5. (Original) The semiconductor unit according to claim 4, wherein the hot areas are formed at a first side of the semiconductor unit and the HDHSs are positioned within cavities formed in a second side of the semiconductor unit, the second side differs from the first side. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL LEBENTRITT whose telephone number is (571)272-1873. The examiner can normally be reached IFP Mon- Fri 8:30 am- 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MICHAEL . LEBENTRITT Primary Examiner Art Unit 2893 /MICHAEL LEBENTRITT/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Apr 30, 2023
Application Filed
Jul 08, 2025
Non-Final Rejection — §102, §103
Oct 10, 2025
Response Filed
Dec 22, 2025
Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
92%
Grant Probability
98%
With Interview (+6.0%)
2y 5m
Median Time to Grant
Moderate
PTA Risk
Based on 992 resolved cases by this examiner. Grant probability derived from career allow rate.

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