DETAILED ACTION
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8, 11-13 and 15 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the limitation “the buffer layer and the second capacitor electrode each include protrusions and a depression corresponding to the concave portion and the convex portions of the first capacitor electrode,” is unclear as to which of the protrusions and/or depressions correspond to which of the concave and/or convex portions.
Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 7, 11-2 and 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (KR 20030030714, using machine translation provided herewith; herein “Kim).
Regarding claim 1, Kim discloses in Fig. 8 and related text display device comprising:
a first capacitor electrode (32 of S, see pg. 5 para. 6) disposed on a substrate (31) to include a first conductive layer (35a, see pg. 9 last para.) and a patterned second conductive layer (35b) disposed on the first conductive layer;
a buffer layer (42) disposed on the first capacitor electrode;
a second capacitor electrode (54 of S, see para. 9 last para.) disposed on the buffer layer;
a driving transistor (TFT including gate 36, see pg. 5 para. 7) disposed on the substrate; and
a storage capacitor (S) disposed on the substrate and electrically connected to the driving transistor, wherein
the first capacitor electrode includes a concave portion in which the second conductive layer is removed and convex portions including the first and second conductive layers, the convex portions are separated from each other with the first conductive layer of the concave portion extending between the convex portions (see Fig. 8),
the buffer layer and the second capacitor electrode each include protrusions and a depression corresponding to the concave portion and the convex portions of the first capacitor electrode (see Fig. 8), and
the first capacitor electrode and the second capacitor electrode form two electrodes of the storage capacitor.
Regarding claim 2, Kim further discloses the driving transistor includes:
a semiconductor (44, see pg. 5 para. 7) disposed on the buffer layer to include a channel region, a first region, and a second region;
a gate electrode (36) that overlaps the channel region in a plan view;
a first electrode (38) electrically connected to the first region of the semiconductor; and
a second electrode (40) electrically connected to the second region of the semiconductor.
Regarding claim 7, Kim further discloses wherein the second capacitor electrode (54) and the semiconductor (44) of the driving transistor are on a same layer (e.g. on 42).
Regarding claims 11-12, Kim discloses the claimed invention in substantially the same manner and for the same reasons as applied to claims 1-2 above, respectively.
Regarding claim 15, Kim further discloses wherein the third conductive layer (54) of the storage capacitor and the gate electrode (36) of the driving transistor are on a same layer (e.g. on 31).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 3-4, 5-6, 8, 11, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yun et al. (US 20230411409; herein “Yun”) in view of Kim.
Regarding claim 1, Yun discloses in Fig. 9 and related text a display device comprising:
a first capacitor electrode (PLT3, see [0172]) disposed on a substrate to include a first conductive layer (PLT3a) and a patterned second conductive layer (PLT3b) disposed on the first conductive layer;
a buffer layer (BUF2) disposed on the first capacitor electrode;
a second capacitor electrode (PLT1, see [0171]) disposed on the buffer layer;
a driving transistor (transistor of area 810, see [0190]) disposed on the substrate; and
a storage capacitor (capacitor of area 820, see [0190]) disposed on the substrate and electrically connected to the driving transistor (see e.g. Figs. 2-4), wherein
the first capacitor electrode and the second capacitor electrode form two electrodes of the storage capacitor (see [0171]-[0172]).
Yun does not explicitly disclose
the first capacitor electrode includes a concave portion in which the second conductive layer is removed and convex portions including the first and second conductive layers, the convex portions are separated from each other with the first conductive layer of the concave portion extending between the convex portions,
the buffer layer and the second capacitor electrode each include protrusions and a depression corresponding to the concave portion and the convex portions of the first capacitor electrode.
In the same field of endeavor, Kim teaches in Fig. 8 and related text a display device comprising
the first capacitor electrode (32 of S, see pg. 5 para. 6) includes a concave portion in which the second conductive layer (35b, see pg. 9 last para.) is removed and convex portions including the first (35a, see pg. 9 last para.) and second conductive layers, the convex portions are separated from each other with the first conductive layer of the concave portion extending between the convex portions (see Fig. 8),
the buffer layer (42) and the second capacitor electrode (54 of S, see para. 9 last para.) each include protrusions and a depression corresponding to the concave portion and the convex portions of the first capacitor electrode (see Fig. 8)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Yun by having the first capacitor electrode includes a concave portion in which the second conductive layer is removed and convex portions including the first and second conductive layers, the convex portions are separated from each other with the first conductive layer of the concave portion extending between the convex portions, and the buffer layer and the second capacitor electrode each include protrusions and a depression corresponding to the concave portion and the convex portions of the first capacitor electrode, as taught by Kim, in order to increase surface area of the capacitor, increase capacity, and improve aperture ratio (see Kim pg. 6 para. 2 and pg. 7 para. 2).
Regarding claim 3, Yun further discloses wherein the second conductive layer is thicker than the first conductive layer (see Fig. 9).
Additionally, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Yun by having the second conductive layer is thicker than the first conductive layer for the purpose of choosing from a finite number of identified, predictable solutions (i.e. greater than, less than, or equal to), with a reasonable expectation of success (KSR International Co. v. Teleflex Inc. 82 USPQ2d 1385 (2007)).
Regarding claim 4, Yun further discloses wherein a thickness of the second conductive layer is equal to or greater than about 5000 Å (note that “about” has been given its broadest reasonable interpretation).
Additionally, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness to be a result effective variable affecting shielding properties and electrical characteristics. Thus, it would have been obvious to modify the device of Yun to have the thickness within the claimed range in order to achieve a desired balance between characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Regarding claim 5, Yun further discloses wherein the first conductive layer (PLT3a) includes titanium or a transparent conductive oxide (see [0175] and [0151]).
Regarding claim 6, Yun further discloses wherein the second conductive layer (PLT3b) includes copper or aluminum (see [0175] and [0151]).
Regarding claim 8, Yun further discloses
a light blocking layer (LS, see [0125]) disposed on the substrate and spaced apart from the first capacitor electrode (PLT3), wherein
the light blocking layer is connected to the first electrode of the driving transistor (see Fig. 9).
Regarding claims 11 and 13, Yun in view of Yang teach the claimed invention in substantially the same manner and for the same reasons as applied to claims 1 and 3 above, respectively.
Response to Arguments
Applicant's arguments filed 1/20/206 have been fully considered but are moot in view of the new grounds of rejection presented above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
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/LAUREN R BELL/Primary Examiner, Art Unit 2896 3/19/2026