Prosecution Insights
Last updated: October 02, 2026
Application No. 18/315,787

POWER ELECTRONIC ASSEMBLY AND POWER MODULE FOR EMBEDDING IN A PRINTED CIRCUIT BOARD

Non-Final OA §102
Filed
May 11, 2023
Priority
Jun 21, 2021 — divisional of 11/699,640
Examiner
ISAAC, STANETTA D
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
6 (Non-Final)
86%
Grant Probability
Favorable
6-7
OA Rounds
0m
Est. Remaining
50%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
838 granted / 977 resolved
+17.8% vs TC avg
Minimal -36% lift
Without
With
+-36.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
39 currently pending
Career history
1027
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
50.9%
+10.9% vs TC avg
§102
44.3%
+4.3% vs TC avg
§112
4.3%
-35.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 977 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This office action is in response to the amendment filed on 6/29/26. Claims 1-17 are pending. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kasem et al. (US PGPub 2006/0108671, hereinafter referred to as “Kasem”, IDS reference). Kasem discloses the semiconductor device as claimed. See figures 1A-14B and corresponding text, where Kasem teaches, in claim 1, a power electronic assembly, comprising: a printed circuit board (PCB); and a power module embedded in the PCB, wherein the power module comprises: a leadframe (10, 12); a power semiconductor die (14) having a first load terminal (126) and a control terminal (128) at a first side of the power semiconductor die (14) and a second load terminal at a second side opposite the first side, the second load terminal being soldered to the leadframe (10, 12); a first metal clip soldered to the first load terminal and forming a first terminal of the power module at a first side of the power module; and a second metal clip soldered to the control terminal and forming a second terminal of the power module at the first side of the power module, wherein the leadframe extends to the first side of the power module and forms a third terminal of the power module at the first side of the power module, or a third metal clip is soldered to the leadframe and forms the third terminal of the power module, wherein the PCB includes electrically conductive vias that extend through one or more insulating layers of the PCB and contact the first terminal, the second terminal and the third terminal of the power module at the first side of the power module (figure 5; [0034-0038]). Kasem teaches, in claim 2, wherein the first terminal, the second terminal and the third terminal of the power module are coplanar within +/- 30 pm at the first side of the power module (figure 5; [0034-0038]). Kasem teaches, in claim 3, wherein the power module is a molded module (figure 5; [0034-0038]). Kasem teaches, in claim 4, wherein the first metal clip of the power module has a plurality of slots configured as a reservoir for accommodating solder paste used to solder the first metal clip to the first load terminal of the power semiconductor die (figure 5; [0034-0038]). Kasem teaches, in claim 5, wherein the second metal clip of the power module has one or more slots configured as a reservoir for accommodating solder paste used to solder the second metal clip to the control terminal of the power semiconductor die (figure 5; [0034-0038]). Kasem teaches, in claim 6, wherein the first metal clip of the power module has a plurality of slots configured as a reservoir for accommodating solder paste used to solder the first metal clip to the first load terminal of the power semiconductor die, and wherein the second metal clip of the power module has one or more slots configured as a reservoir for accommodating solder paste used to solder the second metal clip to the control terminal of the power semiconductor die (figure 5; [0034-0038]). Kasem teaches, in claim 7, wherein the power semiconductor die has a thickness less than 100 pm, and wherein each of the first load terminal, the second load terminal and the control terminal of the power semiconductor die comprises Cu and has a thickness less than 10 pm (figure 5; [0034-0038]). Kasem teaches, in claim 8, wherein the third terminal of the power module at the first side of the power module is formed by a region of the leadframe that extends to the first side of the power module (figure 5; [0034-0038]). Kasem teaches, in claim 9, wherein the third terminal of the power module at the first side of the power module is formed by the third metal clip soldered to the leadframe (figure 5; [0034-0038]). Kasem teaches, in claim 10, a power module for embedding in a printed circuit board (PCB), the power module comprising (figure 5; [0034-0038]) : a leadframe; a power semiconductor die having a first load terminal and a control terminal at a first side of the power semiconductor die and a second load terminal at a second side opposite the first side, the second load terminal being soldered to the leadframe; a first metal clip soldered to the first load terminal and forming a first terminal of the power module at a first side of the power module; and a second metal clip soldered to the control terminal and forming a second terminal of the power module at the first side of the power module, wherein the leadframe extends to the first side of the power module and forms a third terminal of the power module at the first side of the power module, or a third metal clip is soldered to the leadframe and forms the third terminal of the power module, wherein the first terminal, the second terminal and the third terminal of the power module are coplanar within +/- 30 pm at the first side of the power module. Kasem teaches, in claim 11, wherein the first metal clip has a plurality of slots configured as a reservoir for accommodating solder paste used to solder the first metal clip to the first load terminal of the power semiconductor die (figure 5; [0034-0038]). Kasem teaches, in claim 12, wherein the second metal clip has one or more slots configured as a reservoir for accommodating solder paste used to solder the second metal clip to the control terminal of the power semiconductor die (figure 5; [0034-0038]). Kasem teaches, in claim 13, wherein the power semiconductor die and part of the leadframe are embedded in a molding compound (figure 5; [0034-0038]). Kasem teaches, in claim 14, wherein the first metal clip has a plurality of slots configured as a reservoir for accommodating solder paste used to solder the first metal clip to the first load terminal of the power semiconductor die, and wherein the second metal clip has one or more slots configured as a reservoir for accommodating solder paste used to solder the second metal clip to the control terminal of the power semiconductor die (figure 5; [0034-0038]). Kasem teaches, in claim 15, wherein the semiconductor power die has a thickness less than 100 pm, and wherein each of the first load terminal, the second load terminal and the control terminal of the power semiconductor die comprises Cu and has a thickness less than 10 pm (figure 5; [0034-0038]). Kasem teaches, in claim 16, wherein the third terminal of the power module at the first side of the power module is formed by a region of the leadframe that extends to the first side of the power module (figure 5; [0034-0038]). Kasem teaches, in claim 17, wherein the third terminal of the power module at the first side of the power module is formed by the third metal clip soldered to the leadframe (figure 5; [0034-0038]). Response to Arguments Applicant’s arguments, see remarks, filed 6/29/26, with respect to the rejection(s) of claim(s) 1-17 under Mahler et al. (US PGPub 2015/0064844, hereinafter referred to as “Mahler”, IDS reference) in view of Stahr et al. (US PGPub 2017/1064481, hereinafter referred to as “Stahr”) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Kasem et al. (US PGPub 2006/0108671, hereinafter referred to as “Kasem”, IDS reference). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANETTA D ISAAC whose telephone number is (571)272-1671. The examiner can normally be reached M-F 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STANETTA D ISAAC/Examiner, Art Unit 2898 September 5, 2026
Read full office action

Prosecution Timeline

Show 4 earlier events
Sep 10, 2024
Response Filed
Apr 23, 2025
Non-Final Rejection mailed — §102
Jun 30, 2025
Response Filed
Oct 20, 2025
Non-Final Rejection mailed — §102
Dec 19, 2025
Response Filed
Apr 22, 2026
Non-Final Rejection mailed — §102
Jun 29, 2026
Response Filed
Sep 10, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

6-7
Expected OA Rounds
86%
Grant Probability
50%
With Interview (-36.2%)
2y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 977 resolved cases by this examiner. Grant probability derived from career allowance rate.

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