Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgement
Claims 1-14 and 19-24 are currently pending in the present application, with claim(s) 1 and 19 being written in independent form. Claims 12, and 23-24 have been withdrawn from consideration. The objection to specification has been withdrawn in view of the new title.
Response to Arguments
Applicant’s arguments with respect to claim(s) 19-22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant’s arguments along with claim amendments to claim 1 have overcome the previous rejection under 102.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mao et al. (US 20210358993 A1; hereinafter “Mao”) in view of Huang et al. (US 20230352508 A1; hereinafter “Huang”) and Fujita et al. (US 20220045110 A1; hereinafter “Fujita”).
In re claim 19, Mao discloses in figs. 1-5, an image sensor comprising:
a substrate (as described in ¶30, pixel cell 304 includes a first subpixel 314 located in the center of pixel cell 304 and surrounded by a plurality of second subpixels 316 in a semiconductor material. The semiconductor material can be a silicon substrate; hereinafter “Subx”) comprising a first surface and a second surface opposite to each other (e.g., shown in fig. 5; an upper and lower surfaces of the semiconductor layer 556; ¶54, 56);
a pixel isolation layer 326 configured to partition a first sub-pixel region 316 and a second sub-pixel region 314 (¶29-44);
a first photoelectric conversion region 316-1 through 316-6 and a first floating diffusion region (FD1 and FD2 outside of the DTI 326; hereinafter “FDiffusion1”) that are in the substrate Subx and in the first sub-pixel region 316 (¶29-44);
a second photoelectric conversion region (SPD area shown in the middle of the sub-pixel 314) and a second floating diffusion region (FD1 and FD2 inside of the DTI 326; hereinafter “FDiffusion2”) that are in the substrate Subx and in the second sub-pixel region 314;
a potential level isolation region 524 configured to at least partially block movement of charges, the potential level isolation region in the substrate and partitioning the first photoelectric conversion region into a first sub-region 316-1 and a second sub-region 316-2 (¶53-54); and
a transfer gate TX1LPD through TX6LPD on the substrate Subx, the transfer gate comprising a first sub-transfer gate TX1LPD on the first sub-region 316-1 and configured to control electrical connection between the first sub-region 316-1 and the first floating diffusion region FDiffusion1,
a second sub-transfer gate TX2LPD on the second sub-region 316-2 and configured to control electrical connection between the second sub-region 316-2 and the first floating diffusion region FDiffusion1, and
a second transfer gate TX1SPD on the second sub-pixel region 314 and configured to control electrical connection between the second photoelectric conversion region SPD and the second floating diffusion region FDiffusion2,
wherein the first sub-transfer gate TX1LPD and the second sub-transfer gate TX2LPD are commonly connected to a common electrode of the first floating diffusion region 430-1 (fig. 4).
Mao does not expressly disclose the pixel isolation layer configured to penetrate the substrate from the first surface to the second surface.
In the same field of endeavor, Huang discloses an image sensor (figs. 17, 26) comprising a pixel isolation layer 240D configured to penetrate the substrate from the first surface to the second surface 202 (¶28-29).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form the DTI structures of Mao configured to penetrate the substrate from the first surface to the second surface to better block light noise from neighboring large photodiodes into the small photodiodes as suggested by Huang (¶15).
Mao does not expressly disclose wherein the first sub-region and the second sub-region both correspond to a first microlens.
In the same field of endeavor, Fujita discloses in figs. 23-25, an image sensor, wherein a first sub-region (PD1 in PX1) and the second sub-region (PD2 in PX1) both correspond to a first microlens 905 (¶87-92).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Fujita into the image sensor of Mao and provide a shared microlens between first sub-region and the second sub-regions to enhance light collection efficiency of the autofocusing pixel.
In re claim 20, Mao as modified by Huang and Fujita discloses the image sensor of claim 19 outlined above. Mao further discloses in figs. 1-5, wherein the potential level isolation region 514 comprises
a first segment (e.g., a segment of the P-well isolation 524 between the two top left sub-sub-pixels 516; hereinafter “514_1”) extending from a first edge (e.g., top edge) of the first sub-pixel 316 and
a second segment (e.g., a segment of the P-well isolation 524 between the two bottom left sub-sub-pixels 516; hereinafter “514_2”) extending from a second edge (e.g., a bottom edge) of the first sub-pixel 316, and
an end of the first segment 514_1 and an end of the second segment 514_2 are spaced apart from each other.
Claim(s) 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mao in view of Huang and Fujita as applied to claim 20 above, and further in view of Park et al. (US 20220328557 A1; hereinafter “Park”).
In re claim 21, Mao as modified by Huang and Fujita discloses the image sensor of claim 20 outlined above, but doesn’t expressly disclose wherein each of the first segment and the second segment penetrates the substrate from the first surface to the second surface.
In the same field of endeavor, Park discloses an image sensor (figs. 1-6) comprising:
an isolation region 150 between multiple LPDs having a first segment 150 and a second segment 150 (see fig. 6; ¶55);
wherein each of the first segment 150 and the second segment 150 penetrates the substrate 110 from the first surface F1 to the second surface F2.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form each of the first segment and the second segment of Mao/Huang/Fujita configured to penetrate the substrate from the first surface to the second surface to prevent a blooming phenomenon that photocharges generated by any first photodiode LPD move to an adjacent first photodiode LPD as suggested by Park (¶62).
In re claim 22, Mao as modified by Huang, Fujita and Park discloses the image sensor of claim 21 outlined above. Park further discloses in figs. 1-6, wherein the first segment 150 and the second segment 150 each comprise a same material as the pixel isolation layer 150 and branched from the pixel isolation layer 150 (¶60-64).
Allowable Subject Matter
Claims 1-11 and 13-14 are allowed.
Regarding claim 1, closest prior art of record, alone or in combination, does not expressly disclose an image sensor including the first sub-transfer transistor and the second sub-transfer transistor are commonly connected to a common electrode of the first photoelectric conversion region, and wherein the first sub-region and the second sub-region both correspond to a first microlens, in combination with other limitations cited in claim 1.
Dependent claims 2-11 and 13-14 are indicated allowable based on their dependency on claim 1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/NILUFA RAHIM/Primary Examiner, Art Unit 2893