Prosecution Insights
Last updated: April 19, 2026
Application No. 18/317,328

EXTREME ULTRAVIOLET (EUV) PHOTOMASK

Non-Final OA §102§103§112
Filed
May 15, 2023
Examiner
ANGEBRANNDT, MARTIN J
Art Unit
1737
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
55%
Grant Probability
Moderate
1-2
OA Rounds
3y 3m
To Grant
90%
With Interview

Examiner Intelligence

Grants 55% of resolved cases
55%
Career Allow Rate
745 granted / 1351 resolved
-9.9% vs TC avg
Strong +34% interview lift
Without
With
+34.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
86 currently pending
Career history
1437
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
59.6%
+19.6% vs TC avg
§102
4.2%
-35.8% vs TC avg
§112
2.1%
-37.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1351 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims should make it clear that the black border region is formed by a heat treatment and the buffer region is a region which is indirectly partially heated during the heat treatment and prevents alteration of the main region and the scribe lane region during the heat treatment (see prepub of the instant specification at [0043,0062-0064,0068,0069,122-123]). In Claim 10, the source of the nitride is not clear from the claim language (mixing the silicon and molybdenum layers (see specification at [0061]) would yield a SiMo, not SiN (silicon nitride)) In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5,7,9, 11-15 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Amano JP 2012212787. Amano JP 2012212787 (machine translation attached) teaches EUV photomasks where an ion beam (27) is used to disturb/degrade the periodicity of the reflective multilayer (3) and reduce its EUV reflectivity. Figure 5 shows a top view of the mask and figures 3 show the overlap of four successive exposures. Figure 10 shows the spacing of the areas exposed to the ion beam (13), from the edge of the absorber in the frame/border region (12). This separation between the image area and the edge of the light shielding area (ion beams exposed area) is 0.1 to 1000 microns, with 1-300 microns being preferred [0061]. In example 1, an EUV photomask is formed by coating a substrate with Mo/Si multilayer, a Ru capping layer, and a Ta absorber layer. The surface of the absorber layer was then irradiated with hydrogen and helium ions to a penetration depth of 350 nm [0092-0094]. Example 3 is similar to example 1, but the Ta absorber layer was patterned before irradiation with He+ ion beams. The distance between the ion irradiated portion and the circuit pattern was 500nm. The reflectivity of the absorber was 2% and the irradiated areas had an absorption of 0.1% [0098-0101]. Example 4 is similar to example 3, but the distance between the edge of the circuit pattern and the ion irradiated portion was 100 nm to 1000 microns in the inventive photomasks (there is a comparative example first). This was used in an exposure where four exposure fields were overlapped as in figure 3 with a 1/5 reduction exposure and the tolerances of 5% dimension variation was achieved [0102-0105]. PNG media_image1.png 296 323 media_image1.png Greyscale PNG media_image2.png 278 281 media_image2.png Greyscale PNG media_image3.png 187 221 media_image3.png Greyscale The claims recite first, second and third buffer regions, a scribe lane region, a marker region, a first, second and third sub-buffer region and first , second and third corner regions, first, second and third blocking regions, first, second, third and fourth auxiliary pattern regions but does not further limit or describe these areas of the mask. The examiner points to the formation of the black border area by degradation of the reflective multilayer in the reference and the instant specification (see prepub at [0062]) and the distance between the this treatment and the edge of the circuit area defined by the absorber layer in the frame region. The examiner holds that the areas/regions recited are merely arbitrary designated areas of the mask, which are tied to neither structure or a particular functionality. The applicant could obviate this rejection by clearly reciting functionality and/or dimensions for the layers. Claims 1-5,7,9, 11-15 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Kaneko et al. JP 2012209398. Kaneko et al. JP 2012209398 (machine translation attached) illustrates in figures 3 and 4, an EUV mask including a the black mixing region (21a) formed in the reflective multilayer (21), which is spaced a distance from the circuit pattern (85). The mixing is facilitated by electron beams exposure which causes heating [0038-0049]. PNG media_image4.png 423 736 media_image4.png Greyscale The claims recite first, second and third buffer regions, a scribe lane region, a marker region, a first, second and third sub-buffer region and first , second and third corner regions, first, second and third blocking regions, first, second, third and fourth auxiliary pattern regions but does not further limit or describe these areas of the mask. The examiner points to the formation of the black border area by degradation of the reflective multilayer in the reference and the instant specification (see prepub at [0062]) and the distance between the this treatment and the edge of the circuit area defined by the absorber layer in the frame region. The examiner holds that the areas/regions recited are merely arbitrary designated areas of the mask, which are tied to neither structure or a particular functionality. The applicant could obviate this rejection by clearly reciting functionality and/or dimensions for the layers. Claims 1-5,7-9, 11-15 and 17-20 rejected under 35 U.S.C. 103 as being unpatentable over Amano JP 2012212787. While the examiner has held above that the areas described are arbitrary in their size and arrangement, Amano JP 2012212787 does not exemplify the width of the buffer regions between the mask pattern area as defined by the edge of the absorber layer and the decomposed/mixed/degraded areas of the reflective multilayer being between 4 and 8 microns. The examiner holds that it would have been obvious to one skilled in the art to modify examples 3 or 4 by choosing a distance between the irradiated area and the edge of the absorber layer forming the frame to be between 4 and 8 microns based upon this being within the 1-300 microns being preferred [0061] with a reasonable expectation of forming a useful photomask. Claims 1-5,7-15 and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Amano JP 2012212787, in view of Mikami et al. 20150160548. Mikami 20150160548 in example 1 forms and EUV maskblank on a substrate, by coating at reflective multilayer of alternating 2.3 nm Mo/4.5nm Si (B doped), where each Si layer is exposed to a nitrogen plasma prior to coating the subsequent Mo layer. The topmost Si layer is then coated with a 2.5 nm Ru capping layer [0146-0180]. Example 4 is similar, but includes the coating of a TaSiN absorber layer and a TaSiON low reflectance layer [0186-0203]. The protective (capping) layer can be a platinum group metal layer such as ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), or a compound containing these metals A layer is preferred because it satisfies the above conditions. Among them, it is preferable to form a Ru layer or a Ru compound (RuB, RuZr, etc.) layer. When a Ru compound (capping) layer is formed as the protective layer 13, the Ru content in the protective layer 13 is preferably 50 at% or more, and more preferably 70 at% or more [0093]. The SiN layer can be 0.3 to 1.5 nm and MoN can be 0.2-2.0 nm. The patterning of the absorber layer to form a useful EUV mask is disclosed [0076-0077]. In the present invention, the thickness of the thin film 12b containing Si and N formed on the Si layer 12a is not particularly limited, but the thickness of the thin film 12b is preferably 0.2 to 2.0 nm. When the film thickness of the thin film 12b is 0.2 nm or more, it is preferable in order to exhibit an effect of suppressing the progress of mixing at the layer interface constituting the Mo / Si multilayer reflective film. On the other hand, it is preferable that the film thickness of the thin film 12b is 2.0 nm or less because a decrease in EUV reflectance is slight [0072-0073,0078]. When a thin film containing Mo and N is formed at the interface between the Mo layer and the Si layer (in the Si layer on the Mo layer), the thickness of the thin film is not particularly limited. The thickness is preferably 0.2 to 2.0 nm. When the thickness of the thin film is 0.2 nm or more, it is preferable for exhibiting an action of suppressing the progress of mixing at the layer interface constituting the Mo / Si multilayer reflective film. On the other hand, it is preferable that the thickness of the thin film is 2.0 nm or less because the decrease in EUV reflectance is slight [0072]. The nitridation of the surface of the Si layer or the Mo layer is disclosed. the time for exposing the Si layer surface or the Mo layer surface to the nitrogen-containing atmosphere is set to 60 sec and 600 sec, respectively, but the time for exposing the Si layer surface or the Mo layer surface to the nitrogen-containing atmosphere is limited to this. It can select suitably in the range which satisfies the conditions regarding the nitrogen-containing atmosphere mentioned above. The procedure of exposing the Si layer surface or Mo layer surface to nitrogen gas or a mixed gas of nitrogen gas and an inert gas such as argon under a reduced-pressure atmosphere, as in the procedure shown in the examples described later, When film formation and Mo layer formation are performed using the same chamber, the surface of the Si layer or the surface of the Mo layer is made of nitrogen gas (or a mixed gas of nitrogen gas and an inert gas such as argon). It is important to exhaust the nitrogen gas (or a mixed gas of nitrogen gas and an inert gas such as argon) in the chamber after performing the exposure procedure and before forming the Mo layer or Si layer. Is a preferred procedure. Moreover, this procedure controls the exposure amount of nitrogen gas (or a mixed gas of nitrogen gas and an inert gas such as argon) to the Si layer surface or Mo layer surface, whereby a thin film containing Si and N, Or it is a preferable procedure also in the point that the nitrogen content of the thin film containing Mo and N can be controlled [0075-0076] It would have been obvious to one skilled in the art to modify the EUV masks exemplified or rendered obvious by Amano JP 2012212787 by nitriding the Mo/Si interfaces by exposing them to nitrogen gas and inducing the formation of SiN and MoN layers as taught by Mikami 20150160548 at [0146-0180] to prevent mixing at the interface as taught in Mikami 20150160548 at [0072-0073,0078]. Claims 1-9, and 11-20 are rejected under 35 U.S.C. 103 as being unpatentable over Amano JP 2012212787, in view of Van de Kerkhof WO 2022207259 and/or Chen TW I338819 Van de Kerkhof WO 2022207259 illustrates in figure 2, shows a photomask with imaging area (20) and alignment marks (28) which are within the scribe line area and course alignment marks (32) locates in the corner areas (34) [00065-00077] PNG media_image5.png 282 332 media_image5.png Greyscale Chen TW I338819 (machine translation attached) in figure 6 teaches the squares in the four regions formed at the corners where the non-transmissive regions 104 and the scribe lane regions 108 meet are different (page 14/lines 9-13) .Referring to FIG. 8, after performing an exposure process of the non-adjacent exposure of step 220, the four blocks 126a, 126b, 126c, 126d of the stack pattern on the reticle pattern are on the wafer 800. An overlap occurs at one corner of the exposure area 802 to form a box-in-box pattern 804. In an embodiment, if there are four sets of stacked pairs of measurement patterns on the reticle pattern as an example, an overlap will be generated at the four corners of the exposed area on the wafer to form four frame patterns (not shown) (17/lines 4-10). PNG media_image6.png 571 499 media_image6.png Greyscale PNG media_image7.png 547 515 media_image7.png Greyscale Amano JP 2012212787 does not describe the use of alignment marks in the areas of the mask corresponding to the dicing region. It would have been obvious to one skilled in the art to modify the EUV masks exemplified or rendered obvious by Amano JP 2012212787 by forming alignment features in the dicing area, including in the corner regions as is known in the masking art as evidenced by the teachings of Van de Kerkhof WO 2022207259 and/or Chen TW I338819, which allows alignment of successive exposures without decreasing the area for the circuit pattern on the mask and the wafer. The examiner holds that the alignment features are sized so that they printout on the wafer during exposures within the exposure latitude. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Amano JP 2012212787, in view of Mikami et al. 20150160548, further in view of Van de Kerkhof WO 2022207259 and/or Chen TW I338819 The combination of Amano JP 2012212787 and Mikami et al. 20150160548 does not describe the use of alignment marks in the areas of the mask corresponding to the dicing region. It would have been obvious to one skilled in the art to modify the EUV masks rendered obvious by the combination of Amano JP 2012212787 and Mikami et al. 20150160548 by forming alignment features in the dicing area, including in the corner regions as is known in the masking art as evidenced by the teachings of Van de Kerkhof WO 2022207259 and/or Chen TW I338819, which allows alignment of successive exposures without decreasing the area for the circuit pattern on the mask and the wafer. The examiner holds that the alignment features are sized so that they printout on the wafer during exposures within the exposure latitude. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Takai 20090220869 teaches the use of a femtosecond laser to anneal/mix/denature the Mo/Si layers of the reflective multilayer with respect to figures 12 [0094-0097]. Tanady et al. 20220121101 teaches EUV masks with a magnetic layer (240) surrounding the pattern area of the absorber. PNG media_image8.png 369 449 media_image8.png Greyscale PNG media_image9.png 393 414 media_image9.png Greyscale Ha et al. 20220082926 teaches EUV mask with patterns in the dicing lane. PNG media_image10.png 400 320 media_image10.png Greyscale Cho et al. 20190163046 teaches EUV photomasks (see figure 4), the exposures are overlapped as in figure 6, where X1 is the main pattern area, X2 is exposed by two overlapping exposures and X4 is subjected to 4 overlapping exposures. PNG media_image11.png 359 152 media_image11.png Greyscale PNG media_image12.png 308 327 media_image12.png Greyscale Bender et al. 20170108766 teaches EUV photomasks (figures 1A and 1B) and figures 2B and 2C shows the exposures which abut each other, where stray light fields (f1,f2,f3 and f4 overlap and have widths of 200-850 microns [0042]. PNG media_image13.png 276 353 media_image13.png Greyscale PNG media_image14.png 250 350 media_image14.png Greyscale PNG media_image15.png 368 292 media_image15.png Greyscale PNG media_image16.png 278 343 media_image16.png Greyscale Chen et al. 20140272686 teaches EUV photomasks including that of figure 3 and the use of the mask in exposing the wafer, where the scribe areas overlap so that the sides are exposed twice and the corners are exposed four times. [0012-0015,0017] PNG media_image17.png 422 326 media_image17.png Greyscale PNG media_image18.png 446 336 media_image18.png Greyscale Hsu et al. 2020004133 illustrates in figure 7G, the laser treatment of the absorber and underlying reflective layer to form the black border region to facilitate laser annealing of the reflective multilayer where the annealing exposure is a distance from the interior edge of the absorber layer delineating the mask pattern region (204). PNG media_image19.png 230 301 media_image19.png Greyscale PNG media_image20.png 201 318 media_image20.png Greyscale PNG media_image21.png 246 381 media_image21.png Greyscale After the second photoresist layer 206 is patterned, a treatment by laser radiation 605 is performed to form the inter-diffused portion 600 in the black border region 150 as shown in FIG. 7G. Heat generated by the laser radiation 605, more specifically, a pulsed laser radiation 610 causes a diffusion of silicon (Si) and molybdenum (Mo) in the multilayer stack 320, thereby creating a Si—Mo inter-diffused portion 600 of the multilayer stack 320. In some embodiments, the inter-diffused portion 600 may include vertical inter-diffusion walls 620 over the multilayer stack 320. In some embodiments, and the inter-diffused portion 600 may also include a horizontal inter-diffusion wall 640 [0051]. The edge of the horizontal diffusion wall is illustrated as aligned with the edge of the absorber layer (330), which defines the scribe area circumscribing the main pattern (ie the scribe/dice region) PNG media_image22.png 383 434 media_image22.png Greyscale Han et al. 20210033959 illustrates in figure 7, the laser treatment of the absorber and underlying reflective layer to form the black border region to facilitate laser annealing of the reflective multilayer, where the annealing exposure is a distance from the interior edge of the absorber layer (22) delineating the mask pattern region (MP,IR) [0032] PNG media_image23.png 637 370 media_image23.png Greyscale Iwabuchi JP H08220732 (machine translation attached) teaches a, exposure mask including a translucent chromium oxide layer (1) which will be patterned with the desired circuit pattern in region (2), surrounded by a light shielding (frame) region (3) which prevents the exposure of the resist multiple (four) times in the four corners when used in an exposure process (abstract) PNG media_image24.png 324 233 media_image24.png Greyscale PNG media_image25.png 322 217 media_image25.png Greyscale PNG media_image26.png 343 190 media_image26.png Greyscale Kim KR 20060039638 (machine translation attached) teaches with respect to figure 2, an exposure mask is a transparent substrate of a square shape (10) the light transmitting area and a light shielding film pattern in the center of the (not shown) that is the semiconductor chip 12 is formed, which is selectively exposed to form and the semiconductor chip 12 of the outer frame has a frame portion corresponding to the scribe lines of the wafer 14 is located, the frame section 14 is formed with the light shielding film pattern and the alignment marks (16) (page, near bottom). As shown in Figure 4 the dummy pattern formed in the scribe line region 34 in a field of the plate-shaped pattern to prevent the edges of both the light shielding film pattern, and the up, down, left, and right side edge portion is two times not interfering with each other arranged to be offset from the line / space dummy shape pattern region (36-1,36-2) is to be formed at the time of exposure. The area where the dummy pattern (36-1,36-2) is sized to not form a developer in the pattern, that is formed of a size less than the resolution limit, and the pattern does not overlap even when exposed to offset each other a light shielding film is formed on the area is not formed over 100um. Therefore, the dummy pattern areas C, E part 36-1 is formed, in the region D or F is a dummy pattern area (36-2) is formed (page 3, near bottom) PNG media_image27.png 260 229 media_image27.png Greyscale PNG media_image28.png 606 399 media_image28.png Greyscale Narimatsu 6114072 teaches photomask with alignment marks in the areas of the mask corresponding to the dicing lanes. PNG media_image29.png 340 300 media_image29.png Greyscale Lee et al. 20230230834 teaches EUV masks with the pattern PNG media_image30.png 406 363 media_image30.png Greyscale Yu et al. 20190033706 teaches alignment marks in EUV masks PNG media_image31.png 377 442 media_image31.png Greyscale PNG media_image32.png 444 458 media_image32.png Greyscale Any inquiry concerning this communication or earlier communications from the examiner should be directed to Martin J Angebranndt whose telephone number is (571)272-1378. The examiner can normally be reached 7-3:30 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark F Huff can be reached at 571-272-1385. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARTIN J. ANGEBRANNDT Primary Examiner Art Unit 1737 /MARTIN J ANGEBRANNDT/Primary Examiner, Art Unit 1737 January 5, 2026
Read full office action

Prosecution Timeline

May 15, 2023
Application Filed
Jan 06, 2026
Non-Final Rejection — §102, §103, §112
Feb 19, 2026
Examiner Interview Summary
Feb 19, 2026
Applicant Interview (Telephonic)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
55%
Grant Probability
90%
With Interview (+34.5%)
3y 3m
Median Time to Grant
Low
PTA Risk
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