DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 16-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1.20.2026.
Claim Rejections - 35 USC § 102 and 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4, 9-10 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Okumura et al. (of record, US 20190006532 A1).
Regarding claim 1, Okumura discloses an avalanche photodiode (APD) (Fig. 4), comprising:
a dielectric layer (302);
a silicon layer (303, p-type) disposed on the dielectric layer;
a germanium absorption region (304, intrinsic) disposed on the silicon layer;
a silicon cap layer (305, n-type) disposed on the germanium absorption region, wherein the silicon cap layer comprises a multiplication region (305 itself which comprises Si. The term “multiplication region” does not add an additional structural limitation and recites a property of Si; since the prior art discloses Si, said property is considered implicitly met per MPEP 2112 and/or 2114), wherein the germanium absorption region (304) is disposed between the silicon layer (303) and the silicon cap layer (305) in a stacked arrangement (Fig. 4); and
a cathode electrode (307) coupled to the silicon cap layer (305, n-type).
Regarding claim 2, Okumura discloses the APD of claim 1, further comprising: a N-doped region (abutting 307) of the silicon cap layer (305, n-type), wherein the cathode electrode (307( is connected to the N-doped region (Fig. 4).
Regarding claim 4, Okumura discloses the APD of claim 1, wherein the silicon layer (303, p-type) is P-doped, further comprising: an anode electrode (308) connected to the silicon layer (Fig. 4).
Regarding claim 9, Okumura discloses an avalanche photodiode (APD) (Fig. 4), comprising:
a buried oxide (BOX) layer (302);
a silicon layer (303, p-type) disposed on the BOX layer;
a germanium layer (304, intrinsic) disposed on the silicon layer;
a silicon cap layer (305, n-type) disposed on the germanium layer, wherein the silicon cap layer comprises a multiplication region (305 itself which comprises Si. The term “multiplication region” does not add an additional structural limitation and recites a property of Si; since the prior art discloses Si, said property is considered implicitly met per MPEP 2112 and/or 2114), wherein a germanium absorption region (304 itself) is disposed between the silicon layer (303) and the silicon cap layer (305) in a stacked arrangement; and
a cathode electrode (307) coupled to the silicon cap layer (305, n-type).
Regarding claim 10, Okumura discloses the APD of claim 9, further comprising: a N-doped region (abutting 307) of the silicon cap layer (305, n-type), wherein the cathode electrode (307( is connected to the N-doped region (Fig. 4).
Regarding claim 12, Okumura discloses the APD of claim 9, wherein the silicon layer (303, p-type) is P-doped, further comprising: an anode electrode (308) connected to the silicon layer (Fig. 4).
Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Okumura et al. (of record, US 20190006532 A1).
Regarding claims 7 and 14, Okumura fails to disclose the APD of claim 1/9, wherein a width of the silicon cap layer (305) is at least 500 nm.
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to arrive at values within the claimed ranges in Okumura so as to optimize device characteristics of the APD such as, for example, optimizing a width of the light absorbing layer for increased sensitivity or increased absorbing volume since the silicon cap layer covers an entirety of the light absorbing region (Fig. 4)
Claims 1 and 9 are rejected under 35 U.S.C. 102(a)(1) or 35 U.S.C. 102(a)(2) as being anticipated by Lee (US 20220271182 A1).
Regarding claim 1, Lee discloses an avalanche photodiode (APD) (Fig. 2), comprising:
a dielectric layer (110, [0045]);
a silicon layer (100, [0044]) disposed on the dielectric layer;
a germanium absorption region (220, [0050]) disposed on the silicon layer;
a silicon cap layer (230, [0052]) disposed on the germanium absorption region, wherein the silicon cap layer comprises a multiplication region ([0052]), wherein the germanium absorption region (220) is disposed between the silicon layer (100) and the silicon cap layer (230) in a stacked arrangement; and
a cathode electrode (320, [0043] and [0049]) coupled to the silicon cap layer.
Regarding claim 9, Lee discloses an avalanche photodiode (APD), comprising:
a buried oxide (BOX) layer (110,[0045]);
a silicon layer (100, [0044]) disposed on the BOX layer;
a germanium layer (220, [0050]) disposed on the silicon layer;
a silicon cap layer (230, [0052]) disposed on the germanium layer, wherein the silicon cap layer comprises a multiplication region ([0052]), wherein a germanium absorption region (220) is disposed between the silicon layer (100) and the silicon cap layer (230) in a stacked arrangement; and
a cathode electrode (320, [0043] and [0049]) coupled to the silicon cap layer.
Claims 7-8 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 20220271182 A1)
Regarding claims 7 and 8, Lee fails to disclose (claim 7) the APD of claim 1, wherein a width of the silicon cap layer (230) is at least 500 nm and (claim 8) the APD of claim 7, wherein a thickness of the silicon cap layer (230) is at least 100 nm.
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to arrive at values within the claimed ranges in Lee so as to optimize device characteristics of the APD such as, for example, enhancing the internal multiplication function and/or adjusting device breakdown voltage by varying the width and thickness of the silicon cap layer.
Regarding claims 14 and 15, Lee fails to disclose (claim 14) the APD of claim 9, wherein a width of the silicon cap layer (230) is at least 500 nm and (claim 15) the APD of claim 14, wherein a thickness of the silicon cap layer (230) is at least 100 nm.
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to arrive at values within the claimed ranges in Lee so as to optimize device characteristics of the APD such as, for example, enhancing the internal multiplication function and/or adjusting device breakdown voltage by varying the width and thickness of the silicon cap layer.
Allowable Subject Matter
Claims 3, 5-6, 11 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record fails to disclose or suggest (claim 3) The APD of claim 2, wherein a remaining portion of the silicon cap layer is intrinsic silicon or is lighter doped than the N-doped region of the silicon cap layer, (claim 5) The APD of claim 1, wherein a portion of the germanium absorption region contacting the silicon cap layer forms a charge layer, wherein the charge layer is P-doped; claim 6 depends from claim 5, (claim 11) The APD of claim 10, wherein a remaining portion of the silicon cap layer is intrinsic silicon or is lighter doped than the N-doped region of the silicon cap layer and (claim 13) The APD of claim 9, wherein a portion of the germanium layer contacting the silicon cap layer forms a charge layer, wherein the charge layer is P-doped, wherein a remaining portion of the germanium layer is undoped germanium or is lighter doped than the charge layer.
Response to Arguments
Applicant’s arguments with respect to claims 1 and 9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andres Munoz/ Primary Examiner, Art Unit 2818
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