Prosecution Insights
Last updated: April 19, 2026
Application No. 18/319,229

OPTOELECTRONIC DEVICE INCLUDING NEAR INFRARED PHOTODIODES AND NEAR INFRARED LIGHT EMITTING DIODES

Non-Final OA §102
Filed
May 17, 2023
Examiner
VU, DAVID
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manfacturing Company Ltd.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
96%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
564 granted / 734 resolved
+8.8% vs TC avg
Strong +19% interview lift
Without
With
+18.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
21 currently pending
Career history
755
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
51.9%
+11.9% vs TC avg
§102
34.4%
-5.6% vs TC avg
§112
9.1%
-30.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 734 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/Restriction - Response to Amendment 1. Applicant’s election without traverse of Group I, claims 1-15. Applicant's amendment dated 11/25/2025 in which claims 16-20 were canceled has been entered of record. Because applicant's amendment has canceled claims drawn to a distinct invention, the restriction requirement (dated 09/25/2025) is now moot. New claims 21-25 were added. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 2. Claims 21-22 are rejected under 35 U.S.C. 102(a1) as being anticipated by Jiang et al. (US 2011/0260059; hereinafter Jiang). Regarding claim 21, Jiang, in fig. 6a, discloses a semiconductor device, comprising: a visible light photodiode (630/640 on the right side of the dotted line, see [0067]) in a semiconductor layer 606; and a near infrared photodiode (630/640 on the left side of the dotted line, see [0066]) in the semiconductor layer 606, wherein the near infrared photodiode is adjacent to the visible light photodiode, and wherein the near infrared photodiode comprises at one of a material comprising a type III periodic element, or a material comprising a type V periodic element ([0072]). Regarding claim 22, Jiang discloses further comprising a trench isolation structure 645 between the visible light photodiode and the near infrared photodiode, wherein the trench isolation structure 645 comprises a dielectric layer formed in a trench extending in the semiconductor layer 606 (fig. 6a). Allowable Subject Matter 3. Claims 23-25 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 4. Claims 1-15 are allowed. The following is an examiner's statement of reason for allowance: the prior art of record, either singularly or in combination, does not disclose or suggest at least the claim limitations of " a near infrared light emitting diode within the layer of the silicon material and comprising: a second epitaxial material; and a deep trench isolation structure between the near infrared photodiode and the near infrared light emitting diode” (claim 1); or “a plurality of near infrared light emitting diodes comprising the selectively grown epitaxial material and dispersed near, and along, a perimeter of the semiconductor device; and a seal ring structure between the plurality of near infrared light emitting diodes and the array of near infrared photodiodes” (claim 8) as instantly claimed and in combination with the remaining elements. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled "Comments on Statement of Reasons for Allowance". Conclusion 5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David Vu whose telephone number is (571) 272-1798. The examiner can normally be reached on Monday-Friday from 8:00am to 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempt to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke H can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID VU/ Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

May 17, 2023
Application Filed
Aug 08, 2023
Response after Non-Final Action
Feb 24, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12598798
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12588214
INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12588215
NON-VOLATILE MEMORY DEVICE HAVING SCHOTTKY DIODE
2y 5m to grant Granted Mar 24, 2026
Patent 12581714
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
2y 5m to grant Granted Mar 17, 2026
Patent 12571123
GALLIUM NITRIDE CRYSTAL, GALLIUM NITRIDE SUBSTRATE, AND METHOD FOR PRODUCING GALLIUM NITRIDE SUBSTRATE
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
96%
With Interview (+18.7%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 734 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month