Prosecution Insights
Last updated: October 27, 2026
Application No. 18/319,666

EMULATED DEVICE MANAGEMENT SYSTEM

Non-Final OA §102§103§112
Filed
May 18, 2023
Examiner
HOPKINS, DAVID ANDREW
Art Unit
2188
Tech Center
2100 — Computer Architecture & Software
Assignee
Dell Products L.P.
OA Round
1 (Non-Final)
32%
Grant Probability
At Risk
1-2
OA Rounds
4m
Est. Remaining
70%
With Interview

Examiner Intelligence

Grants only 32% of cases
32%
Career Allowance Rate
75 granted / 234 resolved
-22.9% vs TC avg
Strong +38% interview lift
Without
With
+37.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
25 currently pending
Career history
272
Total Applications
across all art units

Statute-Specific Performance

§101
25.9%
-14.1% vs TC avg
§103
34.0%
-6.0% vs TC avg
§102
9.4%
-30.6% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 234 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION This action is in response to the claims filed on May 18th, 2023. A summary of this action: Claims 1-20 have been presented for examination. Claims 1-2, 4-9, 11-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite Claims 1-2, 4-9, 11-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement Claims 5, 12, 15-16, 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite Claim(s) 1-5, 8-10, 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 in view of Kennedy, Fungible DPU-based Storage Cluster Hands-on Look, Oct. 27th, 2020, Serve The Home Article, URL: servethehome(dot)com/fungible-dpu-based-storage-cluster-hands-on-look/ Claim(s) 7, 11-12, 14, 18-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by He et al., US 2018/0239539 Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 in view of Kennedy, Fungible DPU-based Storage Cluster Hands-on Look, Oct. 27th, 2020, Serve The Home Article, URL: servethehome(dot)com/fungible-dpu-based-storage-cluster-hands-on-look/ taken in further view of Guim Bernat et al., US 2020/0004685 Claim(s) 13 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 taken in further view of Guim Bernat et al., US 2020/0004685 This action is non-final Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Independent claims objected to because of the following informalities: The independent claims use nonce terms for several elements that do not have an associated function to perform in the present claims, e.g. the operating system, the emulated device management system in claim 1. The Examiner suggests amending the claims to clearly and expressly remove use of such nonce terms (to avoid any future § 112(f) invocations, should a function be required to be performed from these elements by amendment), e.g. see suggested amendment below in the § 112(b) (to summarize, with claim 1, claim 1 appears to be intended to convey, from the specification, “A computing device chassis, comprising: a central processing unit (CPU) executing an operating system…”, or if a broader scope is intended “A computing device chassis, comprising: a first processor executing an operating system; a second processor, and a third processor, the third processor physically connected to the first processor via a first physical connection and the third processor further physically connected to the second processor via a second physical connection…wherein the first processor performs operations comprising…emulating a physical device…presented to the second processor as a local device that is connected to the second physical connection”, or the like). This is an objection because the claims are not as clear and concise as they could be, when compared to the specification. Appropriate correction is required. Claim Interpretation – 112(f) The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: Independent claims (claim 1 as representative) and a device emulation subsystem that is provided in the computing device chassis, that is coupled to the operating system via at least one operating system physical connection, and that is coupled to the management system via at least one management system physical connection, wherein the device emulation subsystem is configured to: emulate a physical device to provide an emulated device that is: presented to the operating system as a local device that is connected to the at least one operating system physical connection; and presented to the management system as a local device that is connected to the at least one management system physical connection; receive, from the management system via the at least one management system physical connection, a management information retrieval request that is directed to the local device presented to the management system by the emulated device; retrieve, in response to receiving the management information retrieval request, management information for the emulated device; and provide, to the management system via the at least one management system physical connection, the management information such that the management information appears to come from the local device presented to the management system by the emulated device. as well as: a management system that is included in the computing device chassis; … receive, from the management system via the at least one management system physical connection, a management information retrieval request that is directed to the local device presented to the management system by the emulated device; Representative claim 5: The system of claim 1, wherein the device emulation subsystem includes: an operating system device emulation engine that is configured to emulate the physical device to provide the emulated device that is presented to the operating system; and a management system device emulation engine that is configured to emulate the physical device to provide the emulated device that is presented to the management system, and wherein in response to receiving the management information retrieval request, the management system device emulation engine instructs the operating system device emulation engine to access the physical device in order to retrieve the management information for the emulated device. Claim 7 a processing system and its associated functionally. To clarify, the processing system is not a generic CPU – see ¶ 29, noting the CPU is only providing the OS in a “primary processing system”. Claim 7: receive, from the management system via the at least one management system physical connection, a management information retrieval request that is directed to the local device presented to the management system by the emulated device; Claim 12 – recites similar limitations as claim 5 above. The device emulation subsystem in claim 14, with its claimed functions, along with dependent claim 14 for its limitations similar to those in claim 5. In addition, the limitation of: receiving, by the device emulation subsystem from the management system via the at least one management system physical connection, a management information retrieval request that is directed to the local device presented to the management system by the emulated device; Claim 19 recites similar limitations as claim 5 above. The management system invokes § 112(f), and the corresponding structure is found in ¶ 32: “The chassis 302 also houses a management system that is, in the illustrated embodiment, is provided by a Baseboard Management Controller (BMC) device 308”, e.g. the “iDRAC” controller of Dell per ¶ 32. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112(b) The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-2, 4-9, 11-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The dependent claims inherit the deficiencies of the claims they depend upon. The above noted limitations invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. Claim 1 treated as representative, limitations in the other claims are rejected under a similar rationale as their similar limitations in claim 1. At issue is that the claimed invention is not directed to a generic computer with a processor and memory executing instructions to perform operations, but rather to a particular computer structure, wherein in this structure several components are claimed functionally without any structure clearly linked to those components in the specification. To clarify, see fig. 3 and 6, compare with fig. 1. For the “device emulation subsystem” – see the black box in fig. 3 # 312a, see accompanying description in ¶ 35: “In a specific example, the networking system 312 may be provided by a SmartNIC device (sometimes referred to as a System Control Processor (SCP) device, an Infrastructure Processing Unit (IPU), etc.), which one of skill in the art in possession of the present disclosure will recognize may include a programmable accelerator device that is configured to offload a variety of processing operations from processing systems in the computing device 300 in order to make datacenter networking, security, storage, and/or other computing functionality more efficient and flexible. In the illustrated embodiment, the networking system 312 includes a device emulation subsystem 312a that is described in further detail below and that may be provided by a Data Processing Unit (DPU) that one of skill in the art in possession of the present disclosure will appreciate may include a channel controller provided by a programmable specialized electronic circuit with hardware acceleration for data processing utilized in data-centric computing” and ¶ 36: “To provide a specific example, the DPU that provides the device emulation subsystem 312a may include a CPU, a NIC, and one or more programmable data acceleration engines that allow the DPU to include the generality and programmability of CPUs, while being specialized to operate efficiently on networking data packets, storage requests, analytics requests, and/or other data processing requests that would be apparent to one of skill in the art in possession of the present disclosure. Furthermore, while specific examples described above describe a SmartNIC having a DPU that provides the device emulation subsystem 312a of the present disclosure, one of skill in the art in possession of the present disclosure will appreciate that one of the SmartNIC or the DPU discussed above may provide the functionality of the device emulation subsystem 312 described below (e.g., without the need to provide the other) while remaining within the scope of the present disclosure as well.” – then see ¶ 37: “With reference to Fig. 4, an embodiment of a device emulation subsystem 400 is illustrated that may provide the device emulation subsystem 312a discussed above with reference to Fig. 3. As such, in some embodiments the device emulation subsystem 400 may be included in a networking system such as a SmartNIC, and/or may be provided by a DPU, similarly as described above.” – i.e. it is unclear what structure to be specifically linked that would be sufficient to perform the entire claimed functionality. Representative Claim 5 recites “operating system device emulation engine” and “a management system device emulation engine” along with their corresponding functionality, however this does not have sufficient structure clearly linked to it – rather, see ¶¶ 37-39. See fig. 4, 404a and 404b. Claims 12 and 19 rejected under similar rationales as above. Claim 7 a processing system and its associated functionally. To clarify, the processing system is not a generic CPU – see ¶ 29, noting the CPU is only providing the OS in a “primary processing system”. See ¶ 30 which describes a BIOS processing system with its own processor. Note the plural form of “processing systems” in ¶ 35, and the description of the DPU in ¶ 36. Fundamentally, at issue with the present claims is that they invoke § 112(f) and fail to clearly link sufficient structure to the provide the recited functionally, for it is not a claim to a generic computer with a processor and memory, but rather a claim that is to a particular computer with a particular structure in the computer, several parts of the structure claimed functionally without sufficient structure clearly linked to the various nonce terms and their associated functionality. The Examiner suggests amending the claims substantially to make clear the actual structure being claimed, and the links between the structural elements, and the functions to be performed by each particular piece of structure, e.g. there is a chassis, wherein this chassis comprises structural components such as a CPU and primary memory for it, e.g. DRAM, (¶ 29) for the execution of an operating system; there is a BMC (¶ 32) for the management system, there is a DPU (¶¶ 35-36) for the processor of the networking system 312, wherein the Examiner notes that DPU is a term of art akin to a CPU or GPU. In other words, instead of using broadly described and non-limiting nonce terms for the structure, the Examiner suggests using terms of art that by themselves convey particular structure, as the specification conveys that this is intended to be a particular computer, rather than just a generic computer (cf. 1 to clarify on a generic computer), wherein certain portions of the hardware on the particular computer perform some of the functions, while other portions of the hardware perform other of the functions. If it is intended to only require generic processors to perform each of these, then the Examiner suggests amending the claims to expressly reflect that in the structure recited in the claim. To further clarify on the lack of structure clearly linked to the above noted elements, the issue is that the specification does not clearly set forth what particular structure is required for the means to be able to performed the entire claimed functionality, i.e. does it require the DPU, or just any generic processor, e.g. a CPU, to be enough to perform the claimed functionality? E.g. claims 3 and 10 are not rejected, because the DPU provides sufficient structure for the HIS, wherein the management system invoked § 112(f) and is thus construed as the BMC as being its structure as noted above (Examiner noting that there is no functionality required of the operating system in the present claims) Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Applicant may: (a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph; (b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)). If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either: (a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181. Claim Rejections - 35 USC § 112(a) The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-2, 4-9, 11-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The dependent claims inherit the deficiencies of the claims they depend upon. See the above § 112(f) invocation and corresponding § 112(b) rejection including the citations to the disclosure in the § 112(b) rejection. See MPEP §2181(IV): “When a claim containing a computer-implemented 35 U.S.C. 112(f) claim limitation is found to be indefinite under 35 U.S.C. 112(b) for failure to disclose sufficient corresponding structure (e.g., the computer and the algorithm) in the specification that performs the entire claimed function, it will also lack written description under section 112(a).” and MPEP 2181(II)(B): “When a claim containing a computer-implemented 35 U.S.C. 112(f) claim limitation is found to be indefinite under 35 U.S.C. 112(b) for failure to disclose sufficient corresponding structure (e.g., the computer and the algorithm) in the specification that performs the entire claimed function, it will also lack written description under 35 U.S.C. 112(a). See MPEP § 2163.03, subsection VI.” Claim Rejections - 35 USC § 112(b) The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 5, 12, 15-16, 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Representative claim 5 recites, in part: an operating system device emulation engine that is configured to emulate the physical device to provide the emulated device that is presented to the operating system; and a management system device emulation engine that is configured to emulate the physical device to provide the emulated device that is presented to the management system, and wherein in response to receiving the management information retrieval request, the management system device emulation engine instructs the operating system device emulation engine to access the physical device in order to retrieve the management information for the emulated device. At issue is that claim 5, and parallels, create § 112(b) issues for indefiniteness due to antecedent basis. To be clear, in claim 1, it is the device emulation subsystem that is to perform the emulation, but in claim 5 it is now a distinctly different element of the OS emulation engine (similar for claims 14 and 19) as well as the management system device emulation engine. In claim 7, the processing system performs the emulation, but in claim 12 it is an OS emulation sub-engine and management system device emulation sub-engine. Examiner suggests not using nonce terms, and instead amending this claim to be expressly clearly that this is simply adding the step of “access the physical device in order to retrieve the management information for the emulated device” – e.g. amending this to more clearly further limit the retrieving step in claim 1, such as by a wherein clause. Claims 15-16 are indefinite for lack of antecedent basis, because there is no prior recitation of an IHS to refer back to, let alone further limit (i.e. it is indefinite what is being further limited because there is nothing to further limit with the wherein clause), in claim 14. Examiner suggests amending this to more clearly recite the intended structure, similar to the above suggestions. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-5, 8-10, 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 in view of Kennedy, Fungible DPU-based Storage Cluster Hands-on Look, Oct. 27th, 2020, Serve The Home Article, URL: servethehome(dot)com/fungible-dpu-based-storage-cluster-hands-on-look/ Regarding Claim 1 He teaches: An emulated device management system, comprising:…; an operating system that is provided…; a management system that is included …; and a device emulation subsystem that is provided …, that is coupled to the operating system via at least one operating system physical connection, and that is coupled to the management system via at least one management system physical connection, wherein the device emulation subsystem is configured to: (He, see the abstract, then cf. 2-5 – the “Forwarding and processing device” # 202 with its associated “processor” # 2021 is an example of the device emulation subsystem, wherein this is physically connected to a “Baseboard management controller” # 207 [example of the management system] wherein this is further physically connected to the “CPU” # 2011, wherein there are all inside of the “System” # 200, wherein the physical device to be emulated as being a local device is the target storage devices # 205 and 206 – see accompanying description of these parts to clarify; to clarify on the operating system, see ¶ 117, then see ¶ 131 incl. “In this way, multipath software does not need to be installed on the host 201, thereby eliminating complexity caused by a need of matching various possible operating systems during installation of the multipath software on the host 201. In addition, only a generic NVMe standard driver needs to be installed on the host 201 to deliver the NVMe input/output command and management command, and adaptive adjustment does not need to be performed on an operating system according to a specific forwarding requirement of an NVMe over Fabric network, thereby reducing maintenance costs of the host 201… A standard open-source NVMe driver may be loaded in the operating system of the host 201 to send, to the forwarding and processing device 202, the NVMe-related input/output command or management command.” – Examiner notes that as the host is running the operating system, in the figures (e.g. cf. 1 and 3), it was by execution by the CPU and memory of the host emulate a physical device to provide an emulated device that is: presented to the operating system as a local device that is connected to the at least one operating system physical connection; (He, as cited above, then see ¶ 131: “In addition, only a generic NVMe standard driver needs to be installed on the host 201 to deliver the NVMe input/output command and management command, and adaptive adjustment does not need to be performed on an operating system according to a specific forwarding requirement of an NVMe over Fabric network, thereby reducing maintenance costs of the host 201.…In standard open-source NVMe driver may be loaded in the operating system of the host 201 to send, to the forwarding and processing device 202, the NVMe-related input/output command or management command.” - i.e. the host OS is presented the storage device as an emulated local device, because it can use a “NVME standard driver” for it – to clarify, see ¶¶ 3-5, i.e. the storage devices are connected “on a network” to the host, specifically a “NVMe over Fabric” network, whereas local devices are using only “NVMe” – see ¶ 119 to further clarify, and cf. 9 including description of # 900-906 and ¶ 120: “In addition, the processor 2021 is further configured to encapsulate the second packet into a packet in a form that meets an NVMe over Fabric network forwarding requirement, and send the encapsulated second packet”, also cf. 6 including description of # 100 to 106 to clarify on the BRI of the emulation step, see instant disclosure ¶¶ 3, 27, and 43, incl. in ¶ 43: “To provide a specific example, the operating system device emulation operations 600 may include NVMe emulation operations that present one or more NVMe-oF storage devices (e.g., that provide the storage devices 206a 206c included in the storage system 206) as "local" NVMe storage devices to an operating system in the computing device 202a/300.” – e.g. He, as cited above and presented to the management system as a local device that is connected to the at least one management system physical connection; receive, from the management system via the at least one management system physical connection, a management information retrieval request that is directed to the local device presented to the management system by the emulated device; retrieve, in response to receiving the management information retrieval request, management information for the emulated device; and provide, to the management system via the at least one management system physical connection, the management information such that the management information appears to come from the local device presented to the management system by the emulated device. (He, as cited above, then see fig. 5 as discussed starting in ¶ 155: “Optionally, in this embodiment of the present disclosure, when the processor 2021 performs in-band management, the processor 2021 receives, by using the bus port 2022 or another port, the management command sent by the CPU 2011, and implements configuration and management according to the received management command, or when the processor 2021 performs out-of-band management, the processor 2021 receives, by using a baseboard management controller (BMC), the management command sent by the CPU 2011. As shown in FIG. 5, the system 200 further includes the BMC 207. The BMC 207 is connected to the CPU 2011 in the host 201 by using a PCie bus, such as the bus 2013. The BMC 207 may be further connected to the processor 2021 in the forwarding and processing device 202 by using a bus. The bus connecting the BMC 207 and the processor 2021 may be an inter-integrated circuit (I2C), a PCie bus, or the like. The BMC 207 receives the management command delivered by the CPU 2011, and sends the received management command to the processor 2021 for processing [i.e. the processor # 2021 of the device emulation subsystem of He receives a “management command”]. The management command delivered by the CPU 2011 includes but is not limited to: initialization and interface configuration of the forwarding and processing device 202, and management and authentication of hard disk discovery, link establishment, and link disconnection in the target storage device.” – note, this is doing the emulation as the command received is in the NVMe protocol, not the NVMeof protocol, e.g. ¶ 139: “When the first packet includes the management command that complies with the NVMe protocol” and further see ¶¶ 156-157, i.e. the the “management command that complies with the NVMe protocol” and “the packet encapsulated by the processor 2021 can be sent to the NVMe over Fabric network by using the network port ( such as the network port 2024 or the network port 2025).” for returning the data post decapsulation, see ¶ 159: “Further, when the forwarding and processing device 202 receives a packet returned by the target storage device, the processor 2021 receives the packet returned by the target storage device, and decapsulates the received packet, that is, decapsulates, according to a specific network protocol used between the forwarding and processing device 202 and the target storage device, the received packet returned by the target storage device. After decapsulating the received packet returned by the target storage device, the processor 2021 obtains command information or data information that is included in the packet returned by the target storage device, and returns the obtained command information or data information to the host 201”, also see ¶ 180: “Further, the foregoing method further includes step 108 (not shown in the figure) : When the forwarding and processing device 202 receives a response message or data returned by the target storage device (such as the target storage device 205 or the target storage device 206), the processor 2021 receives a packet returned by the target storage device, decapsulates the received packet, and returns the response message or the data obtained after decapsulation to the host 201. That is, the processor 2021 decapsulates, according to the specific network protocol used between the forwarding and processing device 202 and the target storage device, the received packet returned by the target storage device, obtains the response message or the data that is included in the packet returned by the target storage device, and returns the obtained response message or data to the host 201” then, for an example of a management command that is a management information retrieval request, see ¶ 126: “The management command includes but is not limited to: reading device information (such as a serial number and temperature) of the target hard disk, adding or deleting the target hard disk, and the like.” – i.e. when the system of He has the BMC send a management command for “reading device information (such as serial number and temperature) of the target hard disk”, the processor # 2021 (Examiner noting the same part number is used in the various figures of He, i.e. it’s the same feature) receives said command as an NVMe protocol command, encapsulates it as an NVMeof packet, sends it to the target storage device, and then as POSITA would have readily inferred is it is “reading device information” the target storage device would have received said read command and returned a “response message” (see ¶ 163 to clarify: “When the packet returned by the target storage device is the returned packet for the management command, the returned packet may include related data or only a management response message. When the returned packet includes only the management response message and does not include data, a manner in which the processor 2021 sends the obtained management response message to the host 201...”, as well as ¶ 180), wherein the response was sent over as NVMeof, and then decapsulated per He into an NVMe packet before being returned to the BMC Should it be found that He does not anticipate the response message of He being provided to the BMC of He only states returning it to the host, then the Examiner notes that this would have been obvious to try, for the “Host” # 201 (cf. 5) of He only has the BMC and the CPU to return the message to (the finite list), and thus it would have been obvious to try returning to the BMC, wherein POSITA would have found this predictable because the BMC in fig. 5 is the one that sent the command in the first place (i.e. it would be predictable that the response message would be returned to the BMC because this was, to the processor # 2021, the originator of the command as an “out-of-band management” technique, see ¶ 155). While He does not explicitly teach the following limitations, these would have been obvious when He was taken in view of Kennedy: a computing device chassis… in the computing device chassis (He, as cited and discussed above, noting in particular the use of NVMeof taken in view of Kennedy, see the photograph of the FS1600 as discussed in ¶ 1 as a “DPU-storage node”, see page 2 for the discussion of its DPU use ofr “TrueFabric” wherein: “These DPUs utilize data clusters with MIPS cores, high-speed memory interfaces, accelerators, a PCIe root complex, and high-end networking to effectively move data faster and more efficiently than with traditional general-purpose CPUs such as Intel Xeon or AMD EPYC. Since the folks at Fungible have a lot of networking background, not only are they focused on the endpoint processors, but they also have a data fabric called TrueFabric that is designed to handle the scaling and QoS aspects of scaling applications such as storage across DPUs. With those base building blocks, today Fungible has its new storage cluster and DPU-based storage nodes to deliver a high-performance storage solution.”, then see page 3 including: “The third component is that the solution uses NVMeoF to connect to client servers making it relatively easy to integrate.” – note the “Fungible Storage Cluster Overview” , then, see the “Fungible Storage Cluster” on page 4, wherein there are “Compute servers” depicted in their respective chassis, along with the “NVMe-OF” TrueFabric coupling them to “FS1600” storage nodes – also, note the “FS1600 – Under the Hood” figure on page 8, in particular that it uses NVMe over PCIe to connect to the SSDs on the storage node wherein “Each DPU is specifically designed for scale-out storage and to accelerate storage and retrieval of data on the NVMe SSDs”, and finally see the “Next-Step Client TrueFabric with Host-Side DPUs” section starting on page 12, including see the figures and “The host-side DPU can present itself to the server as a network interface and a NVMe device, and then TrueFabric and the Fungible Storage solution can orchestrate storage and parts of the provisioning process.” It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings from He on a packet forwarding method for using in NVMeof networks with target storage devices with the teachings from Kennedy on Fungibile’s storage cluster using NVMeof using DPUs, including its chassis design and its use of DPUs for the NVMe to NVMeof. The motivation to combine would have been that Fungibles system was “Secure” and “reliable” (page 4, see the storage cluster figure), as well as being the “World’s Fastest” and “Disaggregated” (to clarify on disaggregated, see p. 12, bottom figure, for “Enables diskless servers (remote boot) & bare metal services”, i.e. the compute/host nodes are “diskless” and have features such as “remote boot” and can provide “bare metal services” to clients, i.e. “Having a DPU on the host side also allows for features such as turning the x86 or Arm server as a bare-metal resource that can be provisioned as an entire server” – also, the Examiner notes that as depicted visually in the figures, Fungible’s compute server chassis design is stackable, which would have been a motivating factor to use their chassis design, especially with such a “Cloud Native” system for “Scale Out” (p. 4 top of page), e.g. for stacking into server racks in a data center (note the FS1600 on page 1 as visually show is a server for a rack such as in a datacenter). Another motivation would have been that “These DPUs utilize data clusters with MIPS cores, high-speed memory interfaces, accelerators, a PCIe root complex, and high-end networking to effectively move data faster and more efficiently than with traditional general-purpose CPUs such as Intel Xeon or AMD EPYC” Regarding Claim 2 He teaches: The system of claim 1, wherein the device emulation subsystem is included in a networking system that is included in the computing device chassis. (He, cf. 5 as cited above) Regarding Claim 3 He in view of Kennedy teaches: The system of claim 1, wherein the device emulation subsystem is provided by a Data Processing Unit (DPU). (He, as was taken in view of Kennedy as discussed above, including page 2: “One of Fungible’s key differentiators is the Fungible DPU. These DPUs utilize data clusters with MIPS cores, high-speed memory interfaces, accelerators, a PCIe root complex, and high-end networking to effectively move data faster and more efficiently than with traditional general-purpose CPUs such as Intel Xeon or AMD EPYC.”) Regarding Claim 4 He teaches: The system of claim 1, wherein the at least one management system physical connection includes a Peripheral Component Interconnect express (PCIe) physical connection and an Inter-Integrated Circuit (I2C) physical connection. (He, ¶ 155 as cited above) Regarding Claim 5 He teaches: The system of claim 1, wherein the device emulation subsystem includes: an operating system device emulation engine that is configured to emulate the physical device to provide the emulated device that is presented to the operating system; and a management system device emulation engine that is configured to emulate the physical device to provide the emulated device that is presented to the management system, and wherein in response to receiving the management information retrieval request, the management system device emulation engine instructs the operating system device emulation engine to access the physical device in order to retrieve the management information for the emulated device. (He, as cited above, i.e. the processor # 2021 has the “in-band” emulation wherein the target device is presented to the OS on the CPU, and the “out-of-band” emulation wherein the processor # 2021 is presenting the target device as a local device to the BMC for the management command message, e.g. the “reading…” message as noted above (which would have included accessing the physical device via the read command and response message as discussed above) Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 7, 11-12, 14, 18-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by He et al., US 2018/0239539 Regarding Claim 7 This is rejected under a similar rationale as claim 1 above. See ¶ 197 to clarify on the memory coupled to the processor. This claim does not recite the chassis, and thus is anticipated by He as cited and discussed above. Regarding Claim 11. Rejected under a similar rationale as claim 4 above. Regarding Claim 12. Rejected under a similar rationale as claim 5 above. Regarding Claim 14. Rejected under a similar rationale as claim 7 above. Regarding Claim 18. Rejected under a similar rationale as claim 4 above. Regarding Claim 19. Rejected under a similar rationale as claim 5 above. Claim Rejections - 35 USC § 103 Claim(s) 1-5, 8-10, 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 in view of Kennedy, Fungible DPU-based Storage Cluster Hands-on Look, Oct. 27th, 2020, Serve The Home Article, URL: servethehome(dot)com/fungible-dpu-based-storage-cluster-hands-on-look/ Regarding Claim 8 He, in view of Kennedy teaches: The IHS of claim 7, wherein the IHS is provided by a networking system that is included in a chassis that houses the management system and the operating system. (He, cf. 5 as discussed above, along with the other cited portions, as taken in view of Kennedy as cited above) Regarding Claim 9 He teaches: The IHS of claim 8, wherein the networking system includes a Smart Network Interface Controller (SmartNIC). (He, cf. 5, # 202, noting the processor # 2021, and see ¶ 131 of He: “In this way, multipath software does not need to be installed on the host 201, thereby eliminating complexity caused by a need of matching various possible operating systems during installation of the multipath software on the host 201. In addition, only a generic NVMe standard driver needs to be installed on the host 201 to deliver the NVMe input/output command and management command, and adaptive adjustment does not need to be performed on an operating system according to a specific forwarding requirement of an NVMe over Fabric network, thereby reducing maintenance costs of the host 201.” – # 202 is an example of a smartnic, with the processor 2021 as an example of a accelerator (see ¶ 35 of instant disclosure to clarify) should SmartNIC be construed to require the DPU and/or an accelerator, see He, in view of Kennedy as cited above, including Kennedy “Fungible FS-1600 – Under the Hood” on page 9 and p2 ¶ 1: “These DPUs utilize data clusters with MIPS cores, high-speed memory interfaces, accelerators, a PCIe root complex, and high-end networking…” and p. 10: “Instead, the correct way to view the Fungible DPU is that it is a combination of a specialized processor, accelerators, and connectivity…”) Regarding Claim 10. Rejected under a similar rationale as claim 3 above. Regarding Claim 15. Rejected under a similar rationale as claim 8 above. Regarding Claim 16. Rejected under a similar rationale as claim 9 above. Regarding Claim 17. Rejected under a similar rationale as claim 3 above. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 in view of Kennedy, Fungible DPU-based Storage Cluster Hands-on Look, Oct. 27th, 2020, Serve The Home Article, URL: servethehome(dot)com/fungible-dpu-based-storage-cluster-hands-on-look/ taken in further view of Guim Bernat et al., US 2020/0004685 Regarding Claim 6 He, in view of Guim Bernat teaches: The system of claim 1, wherein the device emulation subsystem periodically accesses the physical device to retrieve management information for the physical device prior to receiving the management information retrieval request, stores the management information for the physical device in an emulated device management database and, in response to receiving the management information retrieval request, retrieves a subset of the management information for the physical device from the emulated device management database in order to retrieve the management information for the emulated device. (He, as cited above, including for processor # 2021 of He, and He fig. 5 as discussed above taken in further view of Guim Bernat, abstract, then see ¶ 37: “A critical performance and flexibility challenge faced by in-memory computing applications as their datasets grow exponentially in volume, while their time-to-result needs to shrink one hundred fold or more. However complex a query and however large the dataset over which it needs to be run, many applications and databases are now routinely expected to deliver results in near real time. This is a steep requirement, considering the tension between the four different aspects below…”, also see ¶¶ 38-39, incl.: “As described in more detail herein, each rack houses multiple sleds, each of which may be primarily equipped with a particular type of resource (e.g., memory devices, data storage devices, accelerator devices, general purpose processors), i.e., resources that can be logically coupled to form a composed node, which can act as, for example, a server… In some embodiments, the sleds may be connected with a fabric using Intel OmniPath technology. In other embodiments, the sleds may be connected with other fabrics, such as InfiniBand or Ethernet…” – e.g. see fig. 17 as discussed in ¶¶ 96-97: “FIG. 17 depicts an example environment. For example, a computing platform 1700 can use a network interface (NIC) 1702 to communicate with at least one or more of a storage node, memory pool, accelerators, data centers (not shown), servers (not shown), client devices (not shown), or any device… Data and logs can stored to virtualized storage nodes using a protocol such as NVMe over Fabrics (NVMe-oF).” – also, see ¶ 99 then, see fig. 18A-B, in particular in B inside the “NIC” note the “Prefetcher” circuitry, and see ¶ 102: “…A system can include one or more coherent domains connected through a fabric interconnect (e.g., one or more of a fabric link, a fabric memory tunnel, and a switch)…. However, accesses between different coherent domains are not coherent, such as can include heterogeneous access latency times. Embodiments herein allow for reduction of the access latency times, such as by prefetcher at the NIC 1814A-D.” and ¶ 104: “According to some embodiments, NIC 1814A or 1814B can implement a prefetching scheme, such as can be implemented by prefetcher of the NIC 1814A”, e.g. ¶ 111: “Prefetcher 1852 can monitor requests issued by the node 1802A. Prefetcher 1852 can determine whether there are any patterns ( e.g., repeated sequences of address requests) in the requests issued. Based on the determined patterns, prefetcher 1852 can issue one or more requests that preemptively or proactively retrieve content ( e.g., before the node 1802A produces a request for the content). The preemptively retrieved content can be stored in cache 1854 [example of a database], such as to reduce a latency realized in node 1802A accessing the content from remote memory 1870 and/or 1872”, e.g. ¶¶ 119-121, also see ¶ 123 It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings from He on a network interface for NVMeof communications with the teachings from Guim Bernat on an NVMeof network interface that included prefetching. The motivation to combine would have been that “The preemptively retrieved content can be stored in cache 1854, such as to reduce a latency realized in node 1802A accessing the content from remote memory 1870 and/or 1872”. Claim(s) 13 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., US 2018/0239539 taken in further view of Guim Bernat et al., US 2020/0004685 Regarding Claim 13. Rejected under a similar rationale as claim 6 above. Regarding Claim 20. Rejected under a similar rationale as claim 6 above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tolly. iDRAC9 Telemetry Streaming. Test Report. Feb. 2020. URL: infohub(dot)delltechnologies(dot)com/en-us/section-assets/tolly-dell-emc-idrac9-v4-telemetry-streaming/ - see executive summary and pages 2-3 Markussen, Jonas, et al. "Flexible device compositions and dynamic resource sharing in PCIe interconnected clusters using Device Lending." Cluster Computing 23.2 (2020): 1211-1234. Abstract and § 4 Kennedy. What is a DPU A Data Processing Unit QuickPrimer. Sept. 29th, 2020. Serve the Home Article. URL: servethehome(dot)com/what-is-a-dpu-a-data-processing-unit-quick-primer/ Duer et al., US 11,934,333. Abstract, cf. 3 and accompanying description. Stevens et al., US 2023/0120652. Abstract, see the figures which have a “bridge” for the coupling between the “Tray BMC” and “System BMC” and their accompanying descriptions, also cf. 17-19 and accompanying descriptions. Kim et al., US 2022/0103490. Abstract, cf. 1, 4, 7, and accompanying descriptions. Liu et al., US 2023/0004508. Abstract and cf. 1-2, along with accompanying description. Lu et al., US 9,857,865. Abstract, cf. 1-3B and accompanying description. Ben-Ishay et al., US 11,726,666. Abstract, cf. 1-4 and accompanying description. Bar-Ilan et al., US 11,940,935. Abstract, cf. 1-5 and accompanying description. Ramachandra et al., US 2024/0020103. Abstract, cf. 2-3 and accompanying description. Warkentin et al., US 2023/0229480. Abstract, cf. 2-4 and accompanying descriptions. Li et al., US 2023/0393959. Abstract, cf. 2-4 and accompanying descriptions. Haryadi et al., US 2024/0028343. Abstract, cf. 2-4 and accompanying description. Constantinides et al., US 11,003,618. Abstract, cf. 2-5 noting the BMC in particular, and its accompanying description. Lai et al., US 2012/0023210. Abstract, cf. 2, 4A and accompanying description. Also, ¶¶ 6-8, 17. Noureddine et al., US 11,637,773. Abstract, cf. 3, 6, and accompanying description. Jau et al., US 2020/0029458. Abstract, cf. 4, 6, and accompanying descriptions. Huang et al., US 2024/0232116. Abstract, cf. 9, 11 and accompanying description. Lomelino et al., US 9,756,128. Abstract, cf. 6-7, 11-13, 18, 24, and accompanying description. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A. HOPKINS whose telephone number is (571)272-0537. The examiner can normally be reached Monday to Friday, 10AM to 7 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ryan Pitaro can be reached at (571) 272-4071. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David A Hopkins/ Primary Examiner, Art Unit 2188
Read full office action

Prosecution Timeline

May 18, 2023
Application Filed
Oct 14, 2026
Non-Final Rejection mailed — §102, §103, §112
Oct 21, 2026
Interview Requested

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12762303
PROCESS FOR IDENTIFYING AND IMPLEMENTING ADDITIVE MANUFACTURING EVACUATION GAS FLOW IMPROVEMENTS
5y 0m to grant Granted Oct 13, 2026
Patent 12717982
ESTABLISHMENT OF A DESIGN-BASIS SPECIFICATION FOR A DEVICE FOR A TURBOMACHINE STRUCTURE
6y 5m to grant Granted Aug 25, 2026
Patent 12694170
DESIGN AND PRODUCTION OF A TURBOMACHINE VANE
5y 7m to grant Granted Jul 28, 2026
Patent 12694175
SPRINGBACK-AMOUNT-DISCREPANCY-CAUSING-PORTION SPECIFYING METHOD AND DEVICE
4y 8m to grant Granted Jul 28, 2026
Patent 12669754
METHOD FOR IMPROVING ACCURACY OF IMPRINT FORCE APPLICATION IN IMPRINT LITHOGRAPHY
4y 8m to grant Granted Jun 30, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
32%
Grant Probability
70%
With Interview (+37.7%)
3y 9m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 234 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month