DETAILED ACTION
Claims 1-20 are presented for examination.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Examiner has evaluated the claims under the framework provided in the 2019 Patent Eligibility Guidance published in the Federal Register 01/07/2019 and has provided such analysis below.
Step 1: Claims 1-7 are directed to devices and fall within the statutory category of machines. Claims 8-14 are directed to methods and fall within the statutory category of processes. Claims 15-20 are directed
Therefore, “Are the claims to a process, machine, manufacture or composition of matter?” Yes.
In order to evaluate the Step 2A inquiry “Is the claim directed to a law of nature, a natural phenomenon or an abstract idea?” we must determine, at Step 2A Prong 1, whether the claim recites a law of nature, a natural phenomenon or an abstract idea and further whether the claim recites additional elements that integrate the judicial exception into a practical application.
Step 2A Prong 1:
Claims 1, 8, and 15: The limitations of “assign the plurality of tasks to a set of engine task lists…,” “assign each of a plurality of new tasks to one of the set of engine task lists…,” “assign each of a plurality of new tasks from disconnected engines to one of the set of engine task lists…,” and “rebalance the plurality of tasks…,” as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can easily evaluate where to assign different classifications of tasks based on various properties and then rebalance the assignments when various conditions occur.
Therefore, Yes, claim 1 recites judicial exceptions.
The claims have been identified to recite judicial exceptions, Step 2A Prong 2 will evaluate whether the claims are directed to the judicial exception.
Step 2A Prong 2:
Claims 1, 8, and 15: The judicial exception is not integrated into a practical application. In particular, the claims recite the following additional elements – “an application management device…,” “a cache comprising volatile memory…,” “a non-volatile memory…,” “a processor communicatively coupled to a plurality of engines…,” and “a system for indexing remote data stores,” which are merely recitations of generic computing components and functions (see MPEP § 2106.05(b)) which do not integrate a judicial exception into practical application.
Therefore, “Do the claims recite additional elements that integrate the judicial exception into a practical application? No, these additional elements do not integrate the abstract idea into a practical application and they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea.
After having evaluating the inquires set forth in Steps 2A Prong 1 and 2, it has been concluded that claims 1, 8, and 15 not only recites a judicial exception but that the claim is directed to the judicial exception as the judicial exception has not been integrated into practical application.
Step 2B:
Claims 1, 8, and 15: The claims do not include additional elements, alone or in combination, that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements amount to no more than generic computing components which do not amount to significantly more than the abstract idea.
Therefore, “Do the claims recite additional elements that amount to significantly more than the judicial exception? No, these additional elements, alone or in combination, do not amount to significantly more than the judicial exception.
Having concluded analysis within the provided framework, claims 1, 8, and 15 do not recite patent eligible subject matter under 35 U.S.C. § 101.
Claims 2-7, 9-14, and 16-20 are rejected under 35 U.S.C. 101 as non-statutory for at least the reasons stated above. The claims are dependent on claims 1, 8, and 15, but do not add any feature or subject matter that would solve the non-statutory deficiencies of the parent claims. For instance, claims 2-7, 9-14, and 16-20 simply include additional clarifications on the nature of the generic computing elements or of the algorithm for the mental process rejected above and for when or how it should be executed. Claims 2-7, 9-14, and 16-20 do not add any steps or elements, when considered both individually and as a combination, that would convert claim 1 into patent-eligible subject matter.
Claims 1-20 are therefore not drawn to patent-eligible subject matter as they are directed to an abstract idea without significantly more.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 4, 6, 8, 10, 13, 15, 16, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Karanasos et al (U.S. Pat. Pub. No. 2018/0300174 A1, hereinafter Karanasos) in view of Soumpholphakdy et al (U.S. Pat. Pub. No. 2024/0248788 A1, hereinafter Soumpholphakdy).
As per claim 1, Karanasos teaches the limitations substantially as claimed, including an application management device for indexing remote data stores, the application management device comprising:
a non-volatile memory configured to store a plurality of queues, each of the plurality of tasks corresponding to one of the plurality of queues (Figure 16; Paragraph [0012]);
a processor communicatively coupled to a plurality of engines (Figure 16), the processor configured to:
assign the plurality of tasks to a set of engine task lists, wherein each of the set of engine task lists corresponds to one of the plurality of engines (Paragraph [0194]; Paragraph [0050]);
assign each of a plurality of new tasks to one of the set of engine task lists (Paragraph [0194]), wherein each of the plurality of new tasks is assigned based upon which of the set of engine task lists has fewest assigned tasks (Paragraph [0112]);
assign each of a plurality of new tasks to one of the set of engine task lists (Paragraph [0194]), wherein each of the plurality of new tasks is assigned based upon which of the set of engine task lists has fewest assigned tasks (Paragraph [0112]); and
rebalance the plurality of tasks amongst the set of engine task lists (Paragraph [0118]).
Karanasos does not expressly teach a cache comprising volatile memory and configured to store a plurality of tasks or that the assigned new tasks are tasks of disconnected engines.
However, Soumpholphakdy teaches a cache comprising volatile memory and configured to store a plurality of tasks (Paragraph [0073]) and that the assigned new tasks are tasks of disconnected engines (Figure 8).
It would have been obvious to one of ordinary skill in the art at the time of the filing of the application to combine the teachings of Soumpholphakdy with those of Karanasos in order to allow for Karanasos’ device to respond properly in case of errors in the engines, which could increase the reliability of the device, thereby potentially increasing buy-in among prospective users.
As per claim 4, Soumpholphakdy teaches that the processor is configured to assign the plurality of new tasks before assigning the plurality of tasks from the disconnected engines and assign the plurality of tasks from the disconnected engines before rebalancing (Figure 8).
As per claim 6, Karanasos teaches that the processor is further communicatively coupled to a plurality of spaces, the plurality of spaces including data for processing according to the plurality of queues (Figure 16).
As per claims 8 and 10, they are method claims with no further limitations beyond those rejected above. Therefore, they are rejected for the same reasons.
As per claim 13, Karanasos teaches accessing, by a processor, the queues corresponding to the plurality of tasks in an order based upon a number of tasks assigned to each of the set of engine task lists (Paragraph [0112]).
As per claims 15, 16, and 19, they are system claims with no further limitations beyond those rejected above. Therefore, they are rejected for the same reasons.
Claims 2, 3, 9, 17, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Karanasos and Soumpholphakdy, as applied to claim 1 above, and further in view of Bishop et al (U.S. Pat. No. 9379933 B1, hereinafter Bishop).
As per claim 2, Karanasos and Soumpholphakdy do not expressly teach that the cache has a fixed size.
However, Bishop teaches that the cache has a fixed size (Col. 8, Lines 10-36 contemplates a fixed cache).
It would have been obvious to one of ordinary skill in the art at the time of the filing of the application to combine the teachings of Bishop with those of Karanasos and Soumpholphakdy in order to allow for Karanasos’ and Soumpholphakdy’s device to take advantage of known technologies, which could increase the trust in the device by prospective users, thereby potentially increasing adoption.
As per claim 3, Karanasos and Soumpholphakdy do not expressly teach that the cache has a size that can be adjusted by a user.
However, Bishop teaches that the cache has a size that can be adjusted by a user (Col. 8, Lines 10-36).
It would have been obvious to one of ordinary skill in the art at the time of the filing of the application to combine the teachings of Bishop with those of Karanasos and Soumpholphakdy in order to allow for Karanasos’ and Soumpholphakdy’s device to take advantage of known technologies, which could increase the trust in the device by prospective users, thereby potentially increasing adoption.
As per claim 9, it is a method claim with no further limitations beyond those rejected above. Therefore, it is rejected for the same reasons.
As per claims 17 and 18, they are system claims with no further limitations beyond those rejected above. Therefore, they are rejected for the same reasons.
Claims 5, 11, 12, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Karamasos and Soumpholphakdy, as applied to claim 1 above, and further in view of Dillenberger et al (U.S. Pat. Pub. No. 2008/0046895 A1, hereinafter Dillenberger).
As per claim 5, Karamasos and Soumpholphakdy do not teach that the processor is further configured to assign pinned tasks amongst the set of engine task lists based separately from the plurality of tasks, the plurality of new tasks, and the plurality of tasks from the disconnected engines, and wherein the pinned tasks are assigned based on pinning criteria.
However, Dillenberger teaches that the processor is further configured to assign pinned tasks amongst the set of engine task lists based separately from the plurality of tasks, the plurality of new tasks, and the plurality of tasks from the disconnected engines, and wherein the pinned tasks are assigned based on pinning criteria (Paragraphs [0006] and [0007]).
It would have been obvious to one of ordinary skill in the art at the time of the filing of the application to combine the teachings of Dillenberger with those of Karanasos and Soumpholphakdy in order to allow for Karanasos’ and Soumpholphakdy’s device to more efficiently assign tasks to the proper node, which could result in more efficient execution and thus an increase in user satisfaction.
As per claims 11 and 12, they are method claims with no further limitations beyond those rejected above. Therefore, they are rejected for the same reasons.
As per claim 20, it is a system claim with no further limitations beyond those rejected above. Therefore, it is rejected for the same reasons.
Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Karamasos and Soumpholphakdy, as applied to claim 1 above, and further in view of Narasimhamurthy et al (U.S. Pat. Pub. No. 2015/0288655 A1, hereinafter Narasimhamurthy).
As per claim 7, Karamasos and Soumpholphakdy do not teach that the processor is configured to rebalance the plurality of tasks amongst the set of engine task lists using a self-balancing tree system.
However, Narasimhamurthy teaches that the processor is configured to rebalance the plurality of tasks amongst the set of engine task lists using a self-balancing tree system (Paragraph [0067]).
It would have been obvious to one of ordinary skill in the art at the time of the filing of the application to combine the teachings of Narasimhamurthy with those of Karanasos and Soumpholphakdy in order to allow for Karanasos’ and Soumpholphakdy’s device to take advantage of a known data structure, which could increase confidence in the device by prospective users, thereby potentially increasing adoption.
As per claim 14, it is a method claim with no further limitations beyond those rejected above. Therefore, it is rejected for the same reasons.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Gregory Kessler whose telephone number is (571)270-7762. The examiner can normally be reached M-Th 8:30 - 5, Alternate Fridays 8:30-4.
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/GREGORY A KESSLER/Primary Examiner, Art Unit 2197