DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I, embodiment 1 as shown in fig. 2A,B (claims 1, 4-17, 20, 25-28 readable thereon, claims 2, 3, 18, 19, 21-24, 29-34 withdrawn) in the reply filed on 11/12/2025 is acknowledged.
Claim 11 is further withdrawn from consideration since fig. 2B shows distance A from being less than distance B and claim 11 recites limitations implying the opposite situation as shown in fig. 2B. Claims 1, 4-10, 12-17, 20, 25-28 are being examined on their merits.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 4-10, 12-17, 20, 25-28 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yoshiharu et al. (WO 2020/100995; hereinafter “Yoshiharu”).
Re claim 1: Yoshiharu teaches (e.g. figs. 5 and 8) a semiconductor device comprising: a drift region (lightly doped n-type drift region 18; e.g. paragraph 50 of English translation) of a first conductivity type (n-type) which is provided in a semiconductor substrate (10); a buffer region (buffer region 20; e.g. paragraph 86 of English translation) of the first conductivity type (n-type impurities; e.g. paragraph 86) which is provided in a back surface (lower surface 23; e.g. paragraph 85) side of the semiconductor substrate (10) relative to the drift region (18) and which includes a first peak (111-1) of a doping concentration and a second peak (111-3) of the doping concentration which is provided in a front surface (upper surface 21) side of the semiconductor substrate (10) relative to the first peak (111-1); and a first lifetime control region (lifetime control region 104; e.g. paragraph 56) provided between the first peak (111-1) and the second peak (111-3) in a depth direction of the semiconductor substrate (10).
Re claim 4: Yoshiharu teaches the semiconductor device according to claim 1, wherein the first peak (111-1) is a peak closest to a back surface (23) of the semiconductor substrate (10) among a plurality of peaks included in the buffer region (20).
Re claim 5: Yoshiharu teaches the semiconductor device according to claim 1, wherein the first lifetime control region (104) is away from the second peak (111-3) towards the back surface (23) side by 0.5 µm or more (approximately 5µm as shown in fig. 5) in the depth direction of the semiconductor substrate (10).
Re claim 6: Yoshiharu teaches the semiconductor device according to claim 1, wherein the first lifetime control region (104) is away from the first peak (111-1) towards the front surface (21) side by 1.0 µm or more (approximately 10µm as shown in fig. 5) in the depth direction of the semiconductor substrate (10).
Re claim 7: Yoshiharu teaches the semiconductor device according to claim 1, wherein the first peak (111-1) is provided at a depth of 0.5 µm or more and 2.0 µm or less (111-1 is located at approximately 2µm from the back side 23 as shown in fig. 5) from a back surface (23) of the semiconductor substrate (10).
Re claim 8: Yoshiharu teaches the semiconductor device according to claim 1, wherein the second peak (111-3) is provided at a depth of 2.0 µm or more (111-3 is provided at approximately 16 microns) and 7.0 µm or less from a back surface (23) of the semiconductor substrate (10).
Re claim 9: Yoshiharu teaches the semiconductor device according to claim 1, wherein a distance between the second peak (111-3) and a peak of a lifetime killer concentration (119) of the first lifetime control region (104) is 0.2 µm or more (approximately 5µm as shown in fig. 5) in the depth direction of the semiconductor substrate (10).
Re claim 10: Yoshiharu teaches the semiconductor device according to claim 1, comprising: a collector region (P+ type collector region 22; e.g. paragraph 81) of a second conductivity type (P-type) which is provided at a back surface (23) of the semiconductor substrate (10), wherein a distance between the second peak (111-3) and a peak of a doping concentration (119) of the first lifetime control region (104) is smaller than a distance between an upper end of the collector region (22) and the peak of the first lifetime control region (111-1) in the depth direction of the semiconductor substrate (10).
Re claim 12: Yoshiharu teaches the semiconductor device according to claim 10, wherein the distance between the upper end of the collector region (22) and the peak of the first lifetime control region (104) is 0.1 µm or more (approximately 12 microns as shown in fig. 5) in the depth direction of the semiconductor substrate (10).
Re claim 13: Yoshiharu teaches the semiconductor device according to claim 10, wherein a doping concentration at a peak (119) of the first lifetime control region (104) is larger than a doping concentration at the first peak (111-1) and smaller than a doping concentration at a peak of the collector region (peak of 22 as shown in fig. 9).
Re claim 14: Yoshiharu teaches the semiconductor device according to claim 10, wherein a doping concentration at a peak of the collector region is 1.0 E17 cm-3 or more and 1.0 E19 cm-3 or less (P+ collector region 22; e.g. paragraph 81).
Re claim 15: Yoshiharu teaches the semiconductor device according to claim 1, wherein a doping concentration at a peak of the first lifetime control region (104) is 1.0 E15 cm-3 or more and 1.0 E17 cm-3 or less (fig. 5 shows 119 as 1x1016cm-3).
Re claim 16: Yoshiharu teaches the semiconductor device according to claim 1, wherein a full width at half maximum of a peak of a doping concentration of the first lifetime control region (104) is 0.5 µm or less (as can be seen in fig. 5, the FWHM is very small and is approximately half a micron).
Re claim 17: Yoshiharu teaches the semiconductor device according to claim 1, comprising: a transistor portion (IGBT portion; e.g. paragraph 34) and a diode portion (FWD portion; e.g. paragraph 34) which are provided in the semiconductor substrate (10).
Re claim 20: Yoshiharu teaches (e.g. figs. 5 and 8) a semiconductor device comprising: a drift region (lightly doped n-type drift region 18; e.g. paragraph 50 of English translation) of a first conductivity type (n-type) which is provided in a semiconductor substrate (10); and a buffer region (buffer region 20; e.g. paragraph 86 of English translation) of the first conductivity type (n-type) which is provided in a back surface (lower surface 23; e.g. paragraph 85) side of the semiconductor substrate (10) relative to the drift region (18) and which includes a plurality of peaks (111-1, 111-3) of a doping concentration, wherein the buffer region (20) includes: a first peak (112-1) provided to be closest to the back surface (23) side of the semiconductor substrate (10) among the plurality of peaks (111-2, 111-3) included in the buffer region (20); an auxiliary peak group (111-1, 111-2, 111-3, 104, 111-4) which is provided in a front surface (21) side of the semiconductor substrate (10) relative to the first peak (111-2) and which includes one or more peaks of a doping concentration; and a first lifetime control region (104) provided in the auxiliary peak group (111-1, 111-2, 111-3, 104, 111-4).
Re claim 25: Yoshiharu teaches the semiconductor device according to claim 20, wherein a doping concentration at the one peak in the auxiliary peak group (111-1, 111-2, 111-3, 104, 111-4) is 3.0 E15 cm-3 or more (fig. 5 shows 111-1 as 1x1016cm-3).
Re claim 26: Yoshiharu teaches the semiconductor device according to claim 20, wherein the one peak (111-2) in the auxiliary peak group (111-1, 111-2, 111-3, 104, 111-4) is a second peak adjacent to the front surface (21) side of the first peak (111-1).
Re claim 27: Yoshiharu teaches the semiconductor device according to claim 20, wherein a doping concentration at each peak in the auxiliary peak group (111-1, 111-2, 111-3, 104, 111-4) is smaller than a doping concentration at the first peak (111-1).
Re claim 28: Yoshiharu teaches the semiconductor device according to claim 27, wherein the auxiliary peak group (111-1, 111-2, 111-3, 104, 111-4) includes a plurality of peaks, and doping concentrations of the plurality of peaks in the auxiliary peak group decrease towards the front surface (21) side.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JESSE Y MIYOSHI whose telephone number is (571)270-1629. The examiner can normally be reached M-F, 8:30AM-5:00PM.
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/JESSE Y MIYOSHI/
Primary Examiner, Art Unit 2898