Prosecution Insights
Last updated: April 19, 2026
Application No. 18/322,603

SEMICONDUCTOR DEVICE

Non-Final OA §102§112
Filed
May 24, 2023
Examiner
RAHMAN, MOHAMMAD A
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
459 granted / 531 resolved
+18.4% vs TC avg
Moderate +12% lift
Without
With
+11.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
27 currently pending
Career history
558
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
45.9%
+5.9% vs TC avg
§102
31.1%
-8.9% vs TC avg
§112
18.9%
-21.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 531 resolved cases

Office Action

§102 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/ Restrictions Applicant's election of group II: claims 1-16, in the “Response to Election / Restriction Filed - 11/26/2025”, withdrawal of non-elected claim(s) 17-20 is/are acknowledged. This office action considers claims 1-20, in “Claims - 05/24/2023”, pending for prosecution, of which claim(s) 17-20 is/are withdrawn. Priority Acknowledgment is made of applicant's claim for foreign benefit based on JP2022-111146 filed on 07/11/2022. Claim Rejections - 35 USC § 112 The following is a quotation of the second paragraph of 35 U.S.C. 112: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-16 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 recites: “an anode region of a second conductivity type provided to be closer to a front surface side of the semiconductor substrate than the drift region; and a trench contact portion provided at a front surface of the semiconductor substrate in the diode portion”. As seen in this claim recitation, “a front surface” has been recited twice which make the claim indefinite. It is unclear if they are the same or different. The applicant may recite the following to overcome this rejection: “an anode region of a second conductivity type provided to be closer to a front surface side of the semiconductor substrate than the drift region; and a trench contact portion provided at the front surface of the semiconductor substrate in the diode portion”. Claims 2-16 depend from claim 1. Claim Rejections - 35 USC § 102 The following is a quotation of 35 U.S.C. 102(a)(1) that forms the basis for the rejection set forth in this Office action: (a) NOVELTY; PRIOR ART.—A person shall be entitled to a patent unless— (1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention; Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document. Claims 1-2, 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tamura et al. (US 20210050345 A11 – hereinafter Tamura). Regarding Claim 1, Tamura teaches a semiconductor device that includes a diode portion (see the entire document; Figs. 1A-2C; specifically, ([0077] - [0177]), and as cited below), comprising: a drift region (18 – Fig. 2C) of a first conductivity type ([0080]) provided in a semiconductor substrate (10 – [0079]); an anode region (82) of a second conductivity type ([0082]) provided to be closer to a front surface side (top surface) of the semiconductor substrate (10) than the drift region (18); and a trench contact (54 – [0177])) portion provided at a front surface of the semiconductor substrate in the diode portion (10), wherein in a depth direction of the semiconductor substrate, a doping concentration of the anode region at a same depth as that of a bottom portion of the trench contact portion is 1E16 cm-3 or more and 1E17 cm-3 or less ([0086] – “the doping concentration of the second anode region 82 is 1E16 cm.sup.−3 or higher and 1E17 cm.sup.−3 or lower”). Regarding Claim 2, Tamura teaches the semiconductor device according to claim 1, wherein the anode region has a peak of the doping concentration in the depth direction of the semiconductor substrate (Fig. 1D show 82 having a peak), and the bottom portion of the trench contact portion is closer to the front surface side than the peak of the doping concentration of the anode region, in the depth direction of the semiconductor substrate (that is bottom of 54 is closer to from side of 10 in Fig. 2C). Regarding Claim 5, Tamura teaches the semiconductor device according to claim 1, wherein the anode region has a thickness of 0.6 μm or more and 3.0 μm or less in the depth direction of the semiconductor substrate, and has a flat portion with a doping concentration of 1E16 cm-3 or more and 1E17 cm-3 or less ([0087]). Allowable Subject Matter Claims 3-4, 6-16 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is the Examiner’s Reasons for Allowance: The prior art fails to disclose and would not have rendered obvious: Regarding claim 3: The semiconductor device according to claim 2, wherein the anode region has a positive slope of the doping concentration at the same depth as that of the bottom portion of the trench contact portion in the depth direction of the semiconductor substrate. Claim 4 depends from claim 3. Regarding claim 6: The semiconductor device according to claim 5, wherein a depth of a lower end of the trench contact portion is 0.3 μm or more and 0.6 μm or less from the front surface of the semiconductor substrate. Regarding claim 7: The semiconductor device according to claim 1, comprising a diode plug region of the second conductivity type which is selectively provided in an extension direction of a trench below the bottom portion of the trench contact portion and which has a doping concentration higher than that of the anode region. Claim 8 depends from claim 7. Regarding claim 9: The semiconductor device according to claim 1, further comprising: a transistor portion, wherein the transistor portion has an emitter region of the first conductivity type which is provided above the drift region and which has a doping concentration higher than that of the drift region, and a base region of the second conductivity type provided above the drift region, and the doping concentration of the anode region is lower than a doping concentration of the base region. Claims 11-16 depend from claim 9. Regarding claim 10: The semiconductor device according to claim 2, further comprising: a transistor portion, wherein the transistor portion has an emitter region of the first conductivity type which is provided above the drift region and which has a doping concentration higher than that of the drift region, and a base region of the second conductivity type provided above the drift region, and the doping concentration of the anode region is lower than a doping concentration of the base region. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD A. RAHMAN whose telephone number is (571) 270-0168 and email is mohammad.rahman5@uspto.gov. The examiner can normally be reached on Mon-Fri 8:00-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached on (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD A RAHMAN/ Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

May 24, 2023
Application Filed
Jan 20, 2026
Non-Final Rejection — §102, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+11.7%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 531 resolved cases by this examiner. Grant probability derived from career allow rate.

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