DETAILED ACTION
This action is responsive to the amendment and RCE received on 04/28/2026 and the information disclosure statement submitted on 05/15/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/28/2026 has been entered.
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in REPUBLIC OF KOREA on 12/22/2022.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 05/15/2026 has/have been considered by the examiner and made of record in the application file.
Claim Objections
Claim(s) 11-14 and 16-20 is/are objected to because of the following informalities where proposed corrections are bolded and underlined: Claim 11, line 10, “a plurality of contact plugs respectively connected to [[the]] word lines of the word line stack” as this is the first recitation of word lines of the word line stack. The balance of claims are objected to at least for their dependencies. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 7-14, 16-19, and 21-23 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”). An annotated version of Figure 4B from Xie is provided below for clarity in the rejections that follow.
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Regarding Claim 1. Xie discloses A semiconductor device (#400, Figures 4A-4C are various views, 3D memory device), comprising:
a pair of word line separation slits (#436 upper and lower, Figure 4B, gate line slits) extending in a first direction (Figure 4B, #436 upper and lower both extend in the x-direction);
a word line stack (#420, Figure 4A, stack structure) disposed between the pair of the word line separation slits (Figure 4B, #420 is at least partially between the upper and lower #436s) and including a plurality of word lines that are vertically stacked (#426, Figure 4A, conductive layers included in #420 and stacked in the z-direction);
a plurality of supporters (#425/#412, Figures 4A – 4C, support structures) disposed between the word line separation slits (Figures 4B and 4C, #412s are disposed between the upper and lower #436s) and supporting the word line stack ([0035]-[0036], support structures are provided to support the 3D memory stack); and
a plurality of contact plugs (#424, Figure 4A, contact plugs) respectively connected to the word lines of the word line stack (Figure 4A, #424s are electrically connected to #426s of the stack) and spaced apart from each other along the first direction (Figures 4A-4C, #424s are spaced apart from each other along the x-direction),
wherein the plurality of supporters comprise:
first supporters (1st Supporters, Figure 4B annotated) extending parallel to the word line separation slits (Figures 4B annotated and 4C, 1st supporters at least extend in the x-direction parallel to the #436 upper and lowers, noting here that extend does not require reference to the longest direction in which extension takes place); and
second supporters (2nd Supporters, Figure 4B annotated) extending along a second direction intersecting the first direction (Figures 4B annotated and 4C, 2nd supporters at least extend in the y-direction intersecting the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place) and disposed on opposite sides of the contact plugs and between adjacent ones of the contact plugs in the first direction (Figures 4B annotated and 4C, 2nd supporters are disposed on opposite sides of #424s and between adjacent #424s in the x-direction);
wherein the first supporters are disposed on opposite sides of the second supporters in the second direction (Figures 4B annotated and 4C, 1st supporters are disposed on opposite sides of the second supporters in the y-direction) and between the second supporters and the word line separation slits (Figure 4B annotated, all of the 1st supporters are disposed between a second supporter and either the upper or lower #436 in the y-direction).
Regarding Claim 2. Xie discloses The semiconductor device of claim 1, wherein the word line stack includes:
a word line main portion (#421, Figure 4A, core region), and
a stepped word line edge portion (#423, Figure 4A, staircase regions) extending from the word line main portion (Figure 4A, #423s extend from the #421 portion).
Regarding Claim 3. Xie discloses The semiconductor device of claim 2, further comprising:
a plurality of isolation portions (#438s, Figure 4B, additional gate line slits) suitable for supporting the word line main portion of the word line stack (Figures 4A and 4B, [0035]-[0036], gate line slits may provide support to the 3D memory stack as extending through the stack as a vertical support beam).
Regarding Claim 4. Xie discloses The semiconductor device of claim 2, wherein the plurality of supporters extend vertically to pass through the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack).
Regarding Claim 7. Xie discloses The semiconductor device of claim 1, wherein the plurality of supporters include a dielectric material ([0039], support structures are formed through deposition of an insulating material into their respective trenches).
Regarding Claim 8. Xie discloses The semiconductor device of claim 1, further comprising:
edge isolation portions (portions of #413, Figures 4B and 4C, strip shaped support structures) spaced apart from the plurality of supporters (Figures 4B and 4C, #413s portions are spaced apart from the #412s),
wherein the edge isolation portions extend in the same direction as the second supporters (Figures 4B and 4C, strip shaped support structures of #413 also extend in the y- directions which is the same as the extension y-direction extension of the 2nd supporters, noting here that extend does not require reference to the longest direction in which extension takes place).
Regarding Claim 9. Xie discloses The semiconductor device of claim 8, wherein the edge isolation portions include:
protrusions disposed adjacent to first-side ends of the word line separation slits (Figure 4B, outwardly extending bumps of the portions of #413 are protrusions which are adjacent to the inner ends of the upper and lower #436s as “adjacent” does not carry a particular distance requirement).
Regarding Claim 10. Xie discloses The semiconductor device of claim 8, further comprising:
an edge supporter disposed adjacent to the edge isolation portions (Edge Supporters, Figures 4B annotated and 4C, #412 supporters that are adjacent to portions of #413 where “adjacent to” does not require a particular distance).
Regarding Claim 11. Xie discloses A semiconductor device (#400, Figures 4A-4C are various views, 3D memory device), comprising:
a pair of word line separation slits (#436 upper and lower, Figure 4B, gate line slits) extending in a first direction (Figure 4B, #436 upper and lower both extend in the x-direction);
a cell array portion (#421, Figure 4A, core region) including a plurality of vertical isolation portions (#438s, Figure 4B, additional gate line slits);
a contact portion (#423, Figure 4A, staircase regions) horizontally spaced apart from the cell array portion (Figure 4A, the contact locations in #423s are separate from the #421 portion);
a word line stack (#420, Figure 4A, stack structure) including a word line main portion which is disposed in the cell array portion (Figure 4B, sections of #421 which are disposed between the #436s) and a word line edge portion (Figure 4B, sections of #423 which are disposed between the #436s) which is disposed between the pair of the word line separation slits (Figures 4B, identified sections of #421 and #423 which are between upper and lower #436s);
a plurality of supporters (#425/#412, Figures 4A – 4C, support structures) disposed between the word line separation slits (Figures 4B and 4C, #412s are disposed between the upper and lower #436s) and supporting the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack); and
a plurality of contact plugs (#424, Figure 4A, contact plugs) respectively connected to [[the]] word lines of the word line stack (Figure 4A, #424s are electrically connected to #426s of the stack) and spaced apart from each other along the first direction (Figures 4A-4C, #424s are spaced apart from each other along the x-direction),
wherein the plurality of supporters comprise:
first supporters (1st Supporters, Figure 4B annotated) extending parallel to the word line separation slits (Figures 4B annotated and 4C, 1st supporters at least extend in the x-direction parallel to the #436 upper and lowers, noting here that extend does not require reference to the longest direction in which extension takes place); and
second supporters (2nd Supporters, Figure 4B annotated) extending along a second direction intersecting the first direction (Figures 4B annotated and 4C, 2nd supporters at least extend in the y-direction intersecting the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place) and disposed on opposite sides of the contact plugs and between adjacent ones of the contact plugs in the first direction (Figures 4B annotated and 4C, 2nd supporters are disposed on opposite sides of #424s and between adjacent #424s in the x-direction);
wherein the first supporters are disposed on opposite sides of the second supporters in the second direction (Figures 4B annotated and 4C, 1st supporters are disposed on opposite sides of the second supporters in the y-direction) and between the second supporters and the word line separation slits (Figure 4B annotated, all of the 1st supporters are disposed between a second supporter and either the upper or lower #436 in the y-direction).
Regarding Claim 12. Xie discloses The semiconductor device of claim 11, wherein the word line edge portion includes a stepped structure (Figure 4A, #423s include a stepped region).
Regarding Claim 13. Xie discloses The semiconductor device of claim 11, wherein the plurality of supporters extend vertically to pass through the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack).
Regarding Claim 14. Xie discloses The semiconductor device of claim 11, wherein
the first supporters are disposed adjacent to the word line separation slits (Figures 4B annotated and 4C, 1st supporters are disposed adjacent to the upper and lower #436s where “adjacent to” does not require a particular distance), and the second supporters are disposed adjacent to the contact plugs (Figures 4B annotated and 4C, 2nd supporters adjacent to the #424s where “adjacent to” does not require a particular distance).
Regarding Claim 16. Xie discloses The semiconductor device of claim 11, wherein the plurality of supporters include a dielectric material ([0039], support structures are formed through deposition of an insulating material into their respective trenches).
Regarding Claim 17. Xie discloses The semiconductor device of claim 11, further comprising:
edge isolation portions (portions of #413, Figures 4B and 4C, strip shaped support structures) disposed between the cell array portion and the contact portion (Figure 4B, portions of #413 are disposed at least partially between upper/lower cell array regions and lower/upper (opposite) staircase edge regions) and spaced apart from the plurality of supporters (Figures 4B and 4C, #413’s portions are spaced apart from the #412s).
Regarding Claim 18. Xie discloses The semiconductor device of claim 17, wherein the edge isolation portions include:
protrusions disposed adjacent to first-side ends of the word line separation slits (Figure 4B, outwardly extending bumps of the portions of #413 are protrusions which are adjacent to the inner ends of the upper and lower #436s as “adjacent” does not carry a particular distance requirement).
Regarding Claim 19. Xie discloses The semiconductor device of claim 17, further comprising:
an edge supporter disposed adjacent to the edge isolation portions (Edge Supporters, Figures 4B annotated and 4C, #412 supporters that are adjacent to portions of #413 where “adjacent to” does not require a particular distance), wherein the edge supporter is disposed adjacent to the edge isolation portions (Figures 4B annotated and 4C, #412 supporters that are adjacent to portions of #413 where “adjacent to” does not require a particular distance).
Regarding Claim 21. Xie discloses The semiconductor device of claim 1,
wherein the plurality of second supporters include a pair of second supporters (Figure 4B annotated, #2_1 and #2_2) spaced apart from each other in the first direction (Figure 4B annotated, #2_1 and #2_2 are spaced apart from each other at least partially in the x-direction) and disposed between adjacent ones of the contact plugs (Figure 4B annotated, #2_1 and #2_2 are each disposed between adjacent contact plugs); and
wherein the plurality of first supporters include a pair of first supporters (Figure 4B annotated, #1_1 and #1_2) spaced apart from each other in the second direction (Figure 4B annotated, #1_1 and #1_2 are spaced apart from each other at least partially in the y-direction) and disposed between the word line separation slits (Figure 4B annotated, #1_1 and #1_2 are disposed between the upper and lower #436).
Regarding Claim 22. Xie discloses The semiconductor device of claim 21,
wherein the pair of second supporters are disposed between the pair of first supporters in the second direction (Figure 4B annotated, #2_1 and #2_2 are disposed between #1_1 and #1_2 at least partially in the y-direction) and between adjacent ones of the contact plugs in the first direction (Figure 4B annotated, #2_1 and #2_2 are each disposed between adjacent contact plugs in the x-direction).
Regarding Claim 23. Xie discloses The semiconductor device of claim 1,
wherein the first supporters are offset from the contact plugs in the second direction (Figure 4B annotated, 2nd supporters are offset from the contact plugs in the Y-direction).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0068859 A1; Choi et al.; 03/2022; (“Choi”) in view of US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”). An annotated version of Figure 4B from Xie was provided above.
Regarding Claim 11. Choi discloses A semiconductor device (Figures 5B and 6B, 3D memory device), comprising:
a cell array portion (#BLB, Figure 5B, bit line connection region);
a contact portion (#WLB, Figure 5B, word-line connection region) horizontally spaced apart from the cell array portion (Figure 5B, #BLB and #WLB are at least partially spaced apart in a vertical #D1 direction);
a word line stack (Figures 5B and 6B, stack of word lines #WL) including a word line main portion which is disposed in the cell array portion (Figures 5B and 6B, main portion of #WLs is disposed in the #BLB region) and a word line edge portion (Figure 5B, the word lines have an edge extending towards/into the #WLB region); and
a plurality of contact plugs respectively connected to [[the]] word lines of the word line stack ([0093], Figure 12, word line contact plugs #WPLG connected to the staircase portion of the word lines) and spaced apart from each other along a first direction (Figure 12, #WPLGs are spaced apart from each other in the D1 direction).
Choi does not disclose a pair of word line separation slits extending in a first direction; and
the cell array portion including a plurality of vertical isolation portions; and
the word line edge portion is disposed between the pair of word line separation slits; and
a plurality of supporters disposed between the word line separation slits and supporting the word line edge portion of the word line stack
wherein the plurality of supporters comprise:
first supporters extending parallel to the word line separation slits; and
second supporters extending along a second direction intersecting the first direction and disposed on opposite sides of the contact plugs and between adjacent ones of the contact plugs in the first direction;
wherein the first supporters are disposed on opposite sides of the second supporters in the second direction and between the second supporters and the word line separation slits.
However, Xie discloses A semiconductor device (#400, Figures 4A-4C are various views, 3D memory device), comprising:
a pair of word line separation slits (#436 upper and lower, Figure 4B, gate line slits) extending in a first direction (Figure 4B, #436 upper and lower both extend in the x-direction);
a cell array portion (#421, Figure 4A, core region) including a plurality of vertical isolation portions (#438s, Figure 4B, additional gate line slits);
a contact portion (#423, Figure 4A, staircase regions) horizontally spaced apart from the cell array portion (Figure 4A, the contact locations in #423s are separate from the #421 portion);
a word line stack (#420, Figure 4A, stack structure) including a word line main portion which is disposed in the cell array portion (Figure 4B, sections of #421 which are disposed between the #436s) and a word line edge portion (Figure 4B, sections of #423 which are disposed between the #436s) which is disposed between the pair of the word line separation slits (Figures 4B, identified sections of #421 and #423 which are between upper and lower #436s);
a plurality of supporters (#425/#412, Figures 4A – 4C, support structures) disposed between the word line separation slits (Figures 4B and 4C, #412s are disposed between the upper and lower #436s) and supporting the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack); and
a plurality of contact plugs (#424, Figure 4A, contact plugs) respectively connected to [[the]] word lines of the word line stack (Figure 4A, #424s are electrically connected to #426s of the stack) and spaced apart from each other along the first direction (Figures 4A-4C, #424s are spaced apart from each other along the x-direction),
wherein the plurality of supporters comprise:
first supporters (1st Supporters, Figure 4B annotated) extending parallel to the word line separation slits (Figures 4B annotated and 4C, 1st supporters at least extend in the x-direction parallel to the #436 upper and lowers, noting here that extend does not require reference to the longest direction in which extension takes place); and
second supporters (2nd Supporters, Figure 4B annotated) extending along a second direction intersecting the first direction (Figures 4B annotated and 4C, 2nd supporters at least extend in the y-direction intersecting the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place) and disposed on opposite sides of the contact plugs and between adjacent ones of the contact plugs in the first direction (Figures 4B annotated and 4C, 2nd supporters are disposed on opposite sides of #424s and between adjacent #424s in the x-direction);
wherein the first supporters are disposed on opposite sides of the second supporters in the second direction (Figures 4B annotated and 4C, 1st supporters are disposed on opposite sides of the second supporters in the y-direction) and between the second supporters and the word line separation slits (Figure 4B annotated, all of the 1st supporters are disposed between a second supporter and either the upper or lower #436 in the y-direction).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider incorporating the word line separation slits (gate line slits, #436s of Xie), the vertical isolation portions (additional gate line slits, #438s of Xie), and the plurality of supporters (support structures, #425s/#412s of Xie) from Xie into the device of Choi in order to separate the memory cores into a plurality of individual memory regions and support the semiconductor structure to prevent bending of the conductive layers ([0036]-[0038] and [0062] of Xie).
Regarding Claim 20. Choi in view of Xie disclose The semiconductor device of claim 11, wherein the cell array portion includes:
a horizontally oriented active layer (Choi, #SP, Figure 6B, semiconductor pattern);
a vertical bit line (Choi, #BL, Figure 6B, bit line) coupled to a first side of the active layer (Choi, Figure 6B, #BL is coupled to a left side of #SP);
a capacitor (Choi, #CAP, Figure 6B, capacitor) coupled to a second side of the active layer (Choi, Figure 6B, #CAP is coupled to a right side of #SP); and
a double structure in which the word lines extend horizontally with the active layer interposed therebetween (Choi, Figure 6B, the word lines #WL are observed to extend horizontally with the active layers #SP between them).
Response to Arguments/Amendments
Applicant’s amendments to claim 11 and corresponding remarks, see pages 8-9 of the remarks, filed 04/25/2026, with respect to the objection to claim 11 and its dependent claims have been fully considered. While the amendments resolved the previous informality, the amendments appear to have introduced a new informality as described above. Claims 11-14 and 16-20 remain objected to.
Applicant’s amendments to claims 1 and 11 and corresponding arguments, see pages 9-14 of the remarks, filed 04/25/2026, with respect to the 35 U.S.C. 102 rejection of claims 1 and 11, and their respective dependent claims, have been fully considered but are not found persuasive. Claim(s) 1-4, 7-14, and 16-19 stand rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”).
Applicant first argues that Xie does not disclose the claimed arrangement of the contact plugs, second supporters, first supporters, and word line separation slits. Applicant further argues that Xie does not disclose dividing the supporters into “distinct first and second supporter groups” based on orientation and hierarchal placement. Examiner respectfully disagrees.
As described above, Xie does disclose the plurality of supporters (#425/#412, Figures 4A – 4C, support structures) comprise: first supporters (1st Supporters, Figure 4B annotated) extending parallel to the word line separation slits (Figures 4B annotated and 4C, 1st supporters at least extend in the x-direction parallel to the #436 upper and lowers, noting here that extend does not require reference to the longest direction in which extension takes place); and second supporters (2nd Supporters, Figure 4B annotated) extending along a second direction intersecting the first direction (Figures 4B annotated and 4C, 2nd supporters at least extend in the y-direction intersecting the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place) and disposed on opposite sides of the contact plugs and between adjacent ones of the contact plugs in the first direction (Figures 4B annotated and 4C, 2nd supporters are disposed on opposite sides of #424s and between adjacent #424s in the x-direction); wherein the first supporters are disposed on opposite sides of the second supporters in the second direction (Figures 4B annotated and 4C, 1st supporters are disposed on opposite sides of the second supporters in the y-direction) and between the second supporters and the word line separation slits (Figure 4B annotated, all of the 1st supporters are disposed between a second supporter and either the upper or lower #436 in the y-direction).
While applicant is correct that Xie does not reference these groups explicitly as different groups, the groupings may be arbitrarily defined so long as it meets the required claim limitations. The claims do not currently require any difference in size or materials of the respective groups. All of the supporters have the same function in both the instant application and the reference of improving the structural stability of the device. Examiner notes that claim 6 for example requires them to all include a dielectric material. Referring to a structure by a different name does not render that structure different from the prior art if that structure remains functionally the same as that which is claimed. Examiner does not understand what applicant is referring to when referencing a “hierarchal placement”. The groups identified by the examiner do meet the claimed orientation (or placement) limitations relative to one another in order to match the claimed layout. While there may be differences in the relative sizes of the groups of support structures relative to one another between the instant application and the prior art which may impact functionality, those limitations are not currently claimed. For these reasons, it is the examiner’s interpretation that Xie does disclose a plurality of supporters which may be reasonably divided into different groups to meet the currently required claim limitations.
Applicant’s amendments to claims 11 and corresponding arguments, see pages 15-16 of the remarks, filed 04/25/2026, with respect to the 35 U.S.C. 103 rejection of claim 11, and its respective dependent claims, have been fully considered but are not found persuasive. Claim(s) 11 and 20 stand rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0068859 A1; Choi et al.; 03/2022; (“Choi”) in view of US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”).
Applicant argues that the cited references in combination do not recite all of the limitations required of the first and second supporters required of claim 11 in the same manner as considered above for the 35 U.S.C. 102 rejection of claim 11. Examiner respectfully disagrees for the same reasons as provided above. It is the examiner’s interpretation that Xie does teach all the required limitations of the first and second supporters as required by the claims such that the limitations need not be remedied by Choi as motivation to combine from Xie is provided as detailed above in the 35 U.S.C. 103 rejection.
Applicant’s new claims 21-23 and corresponding arguments, see page 16 of the remarks, filed 04/25/2026, with respect to their allowability for their dependence on claim 1, have been fully considered but are not found persuasive. Claim 1 stands rejected for the reasons provided above. Claim(s) 21-23 stand rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”).
Conclusion
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/TYLER J WIEGAND/Examiner, Art Unit 2812 /CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
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