DETAILED ACTION
This action is responsive to the amendment received on 01/02/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in REPUBLIC OF KOREA on 12/22/2022.
Claim Objections
Claim(s) 11-14 and 16-20 is/are objected to because of the following informalities where proposed corrections are bolded and underlined:
Claim 11, line 14, “intersecting the first supporters”, in order to agree with the earlier recitation of “first supporters”.
The balance of claims are objected to at least for their dependencies. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-14 and 16-19 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”). An annotated version of Figure 4B from Xie is provided below for clarity in the rejections that follow.
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Regarding Claim 1. Xie discloses A semiconductor device (#400, Figures 4A-4C are various views, 3D memory device), comprising:
a pair of word line separation slits (#436 upper and lower, Figure 4B, gate line slits);
a word line stack (#420, Figure 4A, stack structure) disposed between the pair of the word line separation slits (Figure 4B, #420 is at least partially between the upper and lower #436s) and including a plurality of word lines that are vertically stacked (#426, Figure 4A, conductive layers included in #420);
a plurality of supporters (#425/#412, Figures 4A – 4C, support structures) disposed between the word line separation slits (Figures 4B and 4C, #412s are disposed between the upper and lower #436s) and supporting the word line stack ([0035]-[0036], support structures are provided to support the 3D memory stack); and
contact plugs (#424, Figure 4A, contact plugs) electrically connected to the word line stack (Figure 4A, #424s are electrically connected to #426s of the stack)
wherein the plurality of supporters comprise:
first supporters (Figures 4C, #412s which are located between #424s and #405s) extending in the same direction as the word line separation slits (Figures 4B and 4C, #412s between #424s and #405s in Figure 4C at least extend in the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place and #412s all extend in both the x- and y-directions, and the #436s also extend in the x-direction) and disposed between the word line separation slits and the contact plugs (Figures 4B and 4C, #412s between #424s and #405s in Figure 4C are between #436s at the top and bottom and #424s in Figure 4B); and
second supporters (Figures 4B and 4C, #412s which are nearest to the central #413 in Figure 4C or the outer 436s in Figure 4B) extending in a direction intersecting the first supporters (Figures 4B and 4C, #412s nearest to the central #413 in Figure 4C at least extend in the y-direction, noting here that extend does not require reference to the longest direction in which extension takes place and #412s all extend in both the x- and y-directions, the y-direction intersecting the extension direction of the first supporters in the x-direction as described above) and disposed between the contact plugs (Figures 4C, #412s which are nearest to the central #413 are disposed between adjacent #424s).
Regarding Claim 2. Xie discloses The semiconductor device of claim 1, wherein the word line stack includes:
a word line main portion (#421, Figure 4A, core region), and
a stepped word line edge portion (#423, Figure 4A, staircase regions) extending from the word line main portion (Figure 4A, #423s extend from the #421 portion).
Regarding Claim 3. Xie discloses The semiconductor device of claim 2, further comprising:
a plurality of isolation portions (#438s, Figure 4B, additional gate line slits) suitable for supporting the word line main portion of the word line stack (Figures 4A and 4B, [0035]-[0036], gate line slits may provide support to the 3D memory stack as extending through the stack as a vertical support beam).
Regarding Claim 4. Xie discloses The semiconductor device of claim 2, wherein the plurality of supporters extend vertically to pass through the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack).
Regarding Claim 5. Xie discloses The semiconductor device of claim 1, wherein
the first supporters are disposed adjacent to the word line separation slits (Figures 4B and 4C, #412s which are located between #424s and #405s are disposed adjacent to the upper and lower #436s where “adjacent to” does not require a particular distance); and
second supporters disposed adjacent to the contact plugs (Figures 4B-4C, #412s which are nearest to the central #413 are adjacent to the #424s where “adjacent to” does not require a particular distance).
Regarding Claim 6. Xie discloses The semiconductor device of claim 5, wherein the first supporters and the second supporters are disposed to extend in directions intersecting with each other (Figures 4B and 4C, first and second #412s, as described in the rejection of claim 1 above, all extend in both the x- and y-directions which intersect with one another).
Regarding Claim 7. Xie discloses The semiconductor device of claim 1, wherein the plurality of supporters include a dielectric material ([0039], support structures are formed through deposition of an insulating material into their respective trenches).
Regarding Claim 8. Xie discloses The semiconductor device of claim 1, further comprising:
edge isolation portions (portions of #413, Figures 4B and 4C, strip shaped support structures) spaced apart from the plurality of supporters (Figures 4B and 4C, #413s portions are spaced apart from the #412s),
wherein the edge isolation portions extend in the same direction as the second supporters (Figures 4B and 4C, strip shaped support structures of #413 also extend in both the x- and y- directions which is the same as the extension y-direction extension of the second supporters).
Regarding Claim 9. Xie discloses The semiconductor device of claim 8, wherein the edge isolation portions include:
protrusions disposed adjacent to first-side ends of the word line separation slits (Figure 4B, outwardly extending bumps of the portions of #413 are protrusions which are adjacent to the inner ends of the upper and lower #436s as “adjacent” does not carry a particular distance requirement).
Regarding Claim 10. Xie discloses The semiconductor device of claim 8, further comprising:
an edge supporter disposed adjacent to the edge isolation portions (Figures 4B-4C, #412s which are between adjacent first supporters and are adjacent to portions of #413 where “adjacent to” does not require a particular distance).
Regarding Claim 11. Xie discloses A semiconductor device (#400, Figures 4A-4C are various views, 3D memory device), comprising:
a pair of word line separation slits (#436 upper and lower, Figure 4B, gate line slits);
a cell array portion (#421, Figure 4A, core region) including a plurality of vertical isolation portions (#438s, Figure 4B, additional gate line slits);
a contact portion (#423, Figure 4A, staircase regions) horizontally spaced apart from the cell array portion (Figure 4A, the contact locations in #423s are separate from the #421 portion);
a word line stack (#420, Figure 4A, stack structure) including a word line main portion which is disposed in the cell array portion (Figure 4B, sections of #421 which are disposed between the #436s) and a word line edge portion (Figure 4B, sections of #423 which are disposed between the #436s) which is disposed between the pair of the word line separation slits (Figures 4B, identified sections of #421 and #423 which are between upper and lower #436s);
a plurality of supporters (#425/#412, Figures 4A – 4C, support structures) disposed between the word line separation slits (Figures 4B and 4C, #412s are disposed between the upper and lower #436s) and supporting the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack); and
contact plugs (#424, Figure 4A, contact plugs) electrically connected to the word line edge portion of the word line stack (Figure 4A, #424s are electrically connected to staircase regions of #426s of the stack)
wherein the plurality of supporters comprise:
first supporters (Figures 4C, #412s which are located between #424s and #405s) extending in the same direction as the word line separation slits (Figures 4B and 4C, #412s between #424s and #405s in Figure 4C at least extend in the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place and #412s all extend in both the x- and y-directions, and the #436s also extend in the x-direction) and disposed between the word line separation slits and the contact plugs (Figures 4B and 4C, #412s between #424s and #405s in Figure 4C are between #436s at the top and bottom and #424s in Figure 4B); and
second supporters (Figures 4B and 4C, #412s which are nearest to the central #413 in Figure 4C or the outer 436s in Figure 4B) extending in a direction intersecting the first supporters (Figures 4B and 4C, #412s nearest to the central #413 in Figure 4C at least extend in the y-direction, noting here that extend does not require reference to the longest direction in which extension takes place and #412s all extend in both the x- and y-directions, the y-direction intersecting the extension direction of the first supporters in the x-direction as described above) and disposed between the contact plugs (Figures 4C, #412s which are nearest to the central #413 are disposed between adjacent #424s).
Regarding Claim 12. Xie discloses The semiconductor device of claim 11, wherein the word line edge portion includes a stepped structure (Figure 4A, #423s include a stepped region).
Regarding Claim 13. Xie discloses The semiconductor device of claim 11, wherein the plurality of supporters extend vertically to pass through the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack).
Regarding Claim 14. Xie discloses The semiconductor device of claim 11, wherein
the first supporters are disposed adjacent to the word line separation slits (Figures 4B and 4C, #412s which are located between #424s and #405s are disposed adjacent to the upper and lower #436s where “adjacent to” does not require a particular distance), and the second supporters are disposed adjacent to the contact plugs (Figures 4B-4C, #412s which are nearest to the central #413 are adjacent to the #424s where “adjacent to” does not require a particular distance).
Regarding Claim 16. Xie discloses The semiconductor device of claim 11, wherein the plurality of supporters include a dielectric material ([0039], support structures are formed through deposition of an insulating material into their respective trenches).
Regarding Claim 17. Xie discloses The semiconductor device of claim 11, further comprising:
edge isolation portions (portions of #413, Figures 4B and 4C, strip shaped support structures) disposed between the cell array portion and the contact portion (Figure 4B, portions of #413 are disposed at least partially between upper/lower cell array regions and lower/upper (opposite) staircase edge regions) and spaced apart from the plurality of supporters (Figures 4B and 4C, #413’s portions are spaced apart from the #412s).
Regarding Claim 18. Xie discloses The semiconductor device of claim 17, wherein the edge isolation portions include:
protrusions disposed adjacent to first-side ends of the word line separation slits (Figure 4B, outwardly extending bumps of the portions of #413 are protrusions which are adjacent to the inner ends of the upper and lower #436s as “adjacent” does not carry a particular distance requirement).
Regarding Claim 19. Xie discloses The semiconductor device of claim 17, further comprising:
an edge supporter disposed adjacent to the edge isolation portions, wherein the edge supporter is disposed adjacent to the edge isolation portions (Figures 4B-4C, #412s which are between adjacent first supporters and are adjacent to portions of #413 where “adjacent to” does not require a particular distance).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0068859 A1; Choi et al.; 03/2022; (“Choi”) in view of US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”). An annotated version of Figure 4B from Xie was provided above for clarity in the rejections that follow.
Regarding Claim 11. Choi discloses A semiconductor device (Figures 5B and 6B, 3D memory device), comprising:
a cell array portion (#BLB, Figure 5B, bit line connection region);
a contact portion (#WLB, Figure 5B, word-line connection region) horizontally spaced apart from the cell array portion (Figure 5B, #BLB and #WLB are at least partially spaced apart in a vertical #D1 direction);
a word line stack (Figures 5B and 6B, stack of word lines #WL) including a word line main portion which is disposed in the cell array portion (Figures 5B and 6B, main portion of #WLs is disposed in the #BLB region) and a word line edge portion (Figure 5B, the word lines have an edge extending towards/into the #WLB region); and
contact plugs electrically connected to the word line edge portion of the word line stack ([0093], Figure 12, word line contact plugs #WPLG connected to the staircase portion of the word lines).
Choi does not disclose a pair of word line separation slits; and
the cell array portion including a plurality of vertical isolation portions; and
the word line edge portion is disposed between the pair of word line separation slits; and
a plurality of supporters disposed between the word line separation slits and supporting the word line edge portion of the word line stack
wherein the plurality of supporters comprise:
first supporters extending in the same direction as the word line separation slits and disposed between the word line separation slits and the contact; and
second supporters extending in a direction intersecting the first supporters and disposed between the contact plugs.
However, Xie discloses A semiconductor device (#400, Figures 4A-4C are various views, 3D memory device), comprising:
a pair of word line separation slits (#436 upper and lower, Figure 4B, gate line slits);
a cell array portion (#421, Figure 4A, core region) including a plurality of vertical isolation portions (#438s, Figure 4B, additional gate line slits);
a contact portion (#423, Figure 4A, staircase regions) horizontally spaced apart from the cell array portion (Figure 4A, the contact locations in #423s are separate from the #421 portion);
a word line stack (#420, Figure 4A, stack structure) including a word line main portion which is disposed in the cell array portion (Figure 4B, sections of #421 which are disposed between the #436s) and a word line edge portion (Figure 4B, sections of #423 which are disposed between the #436s) which is disposed between the pair of the word line separation slits (Figures 4B, identified sections of #421 and #423 which are between upper and lower #436s);
a plurality of supporters (#425/#412, Figures 4A – 4C, support structures) disposed between the word line separation slits (Figures 4B and 4C, #412s are disposed between the upper and lower #436s) and supporting the word line edge portion of the word line stack (Figure 4A, #425s extend vertically through the staircase edge portion of the stack); and
contact plugs (#424, Figure 4A, contact plugs) electrically connected to the word line edge portion of the word line stack (Figure 4A, #424s are electrically connected to staircase regions of #426s of the stack).
wherein the plurality of supporters comprise:
first supporters (Figures 4C, #412s which are located between #424s and #405s) extending in the same direction as the word line separation slits (Figures 4B and 4C, #412s between #424s and #405s in Figure 4C at least extend in the x-direction, noting here that extend does not require reference to the longest direction in which extension takes place and #412s all extend in both the x- and y-directions, and the #436s also extend in the x-direction) and disposed between the word line separation slits and the contact plugs (Figures 4B and 4C, #412s between #424s and #405s in Figure 4C are between #436s at the top and bottom and #424s in Figure 4B); and
second supporters (Figures 4B and 4C, #412s which are nearest to the central #413 in Figure 4C or the outer 436s in Figure 4B) extending in a direction intersecting the first supporters (Figures 4B and 4C, #412s nearest to the central #413 in Figure 4C at least extend in the y-direction, noting here that extend does not require reference to the longest direction in which extension takes place and #412s all extend in both the x- and y-directions, the y-direction intersecting the extension direction of the first supporters in the x-direction as described above) and disposed between the contact plugs (Figures 4C, #412s which are nearest to the central #413 are disposed between adjacent #424s).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider incorporating the word line separation slits (gate line slits, #436s of Xie), the vertical isolation portions (additional gate line slits, #438s of Xie), and the plurality of supporters (support structures, #425s/#412s of Xie) from Xie into the device of Choi in order to separate the memory cores into a plurality of individual memory regions and support the semiconductor structure to prevent bending of the conductive layers ([0036]-[0038] and [0062] of Xie).
Regarding Claim 20. Choi in view of Xie disclose The semiconductor device of claim 11, wherein the cell array portion includes:
a horizontally oriented active layer (Choi, #SP, Figure 6B, semiconductor pattern);
a vertical bit line (Choi, #BL, Figure 6B, bit line) coupled to a first side of the active layer (Choi, Figure 6B, #BL is coupled to a left side of #SP);
a capacitor (Choi, #CAP, Figure 6B, capacitor) coupled to a second side of the active layer (Choi, Figure 6B, #CAP is coupled to a right side of #SP); and
a double structure in which the word lines extend horizontally with the active layer interposed therebetween (Choi, Figure 6B, the word lines #WL are observed to extend horizontally with the active layers #SP between them).
Response to Arguments/Amendments
Applicant’s amendments to the title and corresponding remarks, see page 9 of the remarks, filed 01/02/2026, with respect to the objection to the title have been fully considered. The objection to the title has been withdrawn.
Applicant’s amendments to claim 5 and corresponding remarks, see pages 9-10 of the remarks, filed 01/02/2026, with respect to the 35 U.S.C. 112(b) rejection of claims 5-6 have been fully considered. The 35 U.S.C. 112(b) rejection of claims 5-6 has been withdrawn.
Applicant’s amendments to claim 1 and corresponding arguments, see pages 10-14 of the remarks, filed 01/02/2026, with respect to the 35 U.S.C. 102 rejection of claims 1-10 have been fully considered but are not found persuasive. The 35 U.S.C. 102 rejection of claims 1-10 has been maintained.
Applicant argues that US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”) does not disclose first supporters extending in the same direction as the word line separation slits and disposed between the word line separation slits and the contact plugs; and second supporters extending in a direction intersecting the first supporters and word line separation slits, and disposed between the contact plugs. The examiner respectfully disagrees with applicant’s arguments.
Examiner believes applicant has considered an interpretation of the phrase “extending in a direction” which is narrower than the broadest reasonable interpretation. It is the examiner’s interpretation that an element may extend in any direction in which it has a width/length/thickness even if that dimension is not the greatest dimension of the element. In Figure 4B of Xie (see annotated version provided above and again below for clarity), all of the first and second supporters (numbered as #412 in Figure 4C of Xie), extend in both the x- and y-direction because they have a width/length in the respective direction. Based on this interpretation, the first supporters are extending in the same direction as the word line separation slits (both the first supporters and the gate line slits #436s extend in the x-direction) and disposed between the word line separation slits and the contact plugs (the first supporters are all disposed between #436s and contact plugs #424s); and second supporters extending in a direction intersecting the first supporters and word line separation slits (the second supporters extend in the y-direction which intersects with the x-direction extension direction of the first supporters and the gate line slits #436s), and disposed between the contact plugs (the second supporters are all disposed between contact plugs #424s on either side of them). For these reasons, it is the examiner’s interpretation that Xie does disclose the identified limitations in amended claim 1. Claim(s) 1-10 stand(s) rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”).
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Applicant’s amendments to claim 11 and corresponding arguments, see pages 14-15 of the remarks, filed 01/02/2026, with respect to the 35 U.S.C. 102 rejection of claims 11-14 and 16-19 have been fully considered but are not found persuasive. The 35 U.S.C. 102 rejection of claims 11-14 and 16-19 has been maintained.
Applicant argues that US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”) does not disclose the amendments to claim 11 which are similar to those of claim 1 and described above. The examiner respectfully disagrees with applicant’s arguments for at least the same reasons provided above in relation to claim 1. Examiner believes applicant has considered an interpretation of the phrase “extending in a direction” which is narrower than the broadest reasonable interpretation and that Xie does disclose the identified limitations in amended claim 11. Claim(s) 11-14 and 16-20 stand(s) rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”).
Applicant’s amendments to claim 11 and corresponding arguments, see pages 15-18 of the remarks, filed 01/02/2026, with respect to the 35 U.S.C. 103 rejection of claims 11 and 20 have been fully considered but are not found persuasive. The 35 U.S.C. 103 rejection of claims 11 and 20 has been maintained.
Applicant argues that the combination of US 2022/0068859 A1; Choi et al.; 03/2022; (“Choi”) and US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”) is not readily achievable due to the differences in their channel structure since Choi employs a horizontal channel structure while Xie employs a vertical channel structure (argument ‘a’). Applicant further argues that the claimed first supporters and second supporters are structurally different from those identified in Xie for reasons similar to those argued for claim 1 above (argument ‘b’). The examiner respectfully disagrees.
With regard to argument ‘a’, applicant is correct that the two identified references do consider channel structures which extend in different directions. However, it remains the examiner’s position that this would not prevent the incorporation of the identified features of Xie into the structure of Choi for the reasons provided above. In particular, both references teach the formation of three dimensional memory structures comprising a stack of gate lines which extend in the horizontal direction (Choi, Figures 5B and 6B, stack of word lines #WL; Xie, #420, Figure 4A, stack structure of interleaved conductive layers #426 functioning as gate lines according to [0057]) and a neighboring staircase region where contact is made to the respective gate line stack (Choi, Figures 5B and 6B, [0098], “word-line pads WLP may be provided at opposite ends of each of the word lines WL. The word-line pads WLP may be stacked on the first substrate 100 such that they form a staircase structure in the word-line connection regions WLB”; Xie, #423-1/2, Figure 4A, staircase region adjacent to the memory cores). The purpose for the incorporation of the support structures of Xie is that formation of the contact plugs and the support structures in the staircase region in the identified configuration “offers an all-around protection of the vertical structure of contact plug 424 against undesired squeezing or bending forces created when stack structure 420 is fabricated to be very high, thus exerting tremendous pressure on the internal components of the 3D memory device” (see [0062] of Xie). This benefit is interpreted to be a sufficient motivation to add the corresponding support structures to the staircase region of Choi to provide equivalent protection to the 3D memory device from excessive damage from bending, regardless of the channel structures and their orientations in the separate cell region of the device.
With regard to argument ‘b’, the same counter argument is provided as considered above with respect to the 35 U.S.C. 102 rejection of claim 11 in view of Xie. Examiner believes applicant has considered an interpretation of the phrase “extending in a direction” which is narrower than the broadest reasonable interpretation. It is the examiner’s interpretation that an element may extend in any direction in which it has a width/length/thickness even if that dimension is not the greatest dimension of the element. In Figure 4B of Xie (see annotated version provided above and again below for clarity), all of the first and second supporters (numbered as #412 in Figure 4C of Xie), extend in both the x- and y-direction because they have a width/length in the respective direction. Based on this interpretation, the first supporters are extending in the same direction as the word line separation slits (both the first supporters and the gate line slits #436s extend in the x-direction) and disposed between the word line separation slits and the contact plugs (the first supporters are all disposed between #436s and contact plugs #424s); and second supporters extending in a direction intersecting the first supporters and word line separation slits (the second supporters extend in the y-direction which intersects with the x-direction extension direction of the first supporters and the gate line slits #436s), and disposed between the contact plugs (the second supporters are all disposed between contact plugs #424s on either side of them). For these reasons, it is the examiner’s interpretation that Xie does teach the identified limitations in amended claim 11. Claim(s) 11 and 20 stand(s) rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0068859 A1; Choi et al.; 03/2022; (“Choi”) in view of US 2023/0084615 A1; Xie et al.; 03/2023; (“Xie”).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER JAMES WIEGAND whose telephone number is (571)270-0096. The examiner can normally be reached Mon-Fri. 8AM-5PM.
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/TYLER J WIEGAND/Examiner, Art Unit 2812
/CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812