DETAILED ACTION
This office action is in response to the amendments filed on January 27, 2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgement
Applicant’s amendments filed on January 27, 2026 in reply to office action mailed on October 27, 2025 is acknowledged. The present office action is made with all the suggested amendments being fully considered. Accordingly, pending in this office action are claims 11-30. Claims 1-10 are canceled.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/25/2023 is being considered by the examiner.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 29 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park (US 2020/0211938).
With respect to Claim 29, Park shows (Fig. 9) all aspects of the current invention including a semiconductor package, comprising:
a redistribution structure (140) comprising at least one redistribution layer (141) and at least one redistribution insulating layer (142) alternately stacked;
a semiconductor chip (120) on an upper surface of the redistribution structure and electrically connected to the at least one redistribution layer;
a cover insulating layer (130) on the upper surface of the redistribution structure and contacting and covering a side surface of the semiconductor chip,
wherein the cover insulating layer is configured as a single build-up film layer (see Par 83)
wherein the cover insulating layer has a maximum thickness less than 37.5 µm from an upper surface to a lower surface of the cover insulating layer (par 107; the cover insulating layer is an ABF film having a thickness of 22 µm)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Park (US 2020/0211938).
With respect to Claim 29, Park discloses (Fig. 9) most aspects of the current invention including a semiconductor package, comprising:
a redistribution structure (140) comprising at least one redistribution layer (142) and at least one redistribution insulating layer (141) alternately stacked;
a semiconductor chip (120) on an upper surface of the redistribution structure and electrically connected to the at least one redistribution layer;
a cover insulating layer (130) on the upper surface of the redistribution structure and contacting and covering a side surface of the semiconductor chip,
wherein the cover insulating layer is configured as a single build-up film layer (see Par 83)
Further, although Park discloses wherein the cover insulating layer is an ABF film having a thickness of 22 µm (par 107), Park does not explicitly disclose the cover insulating layer having a maximum thickness less than 37.5 µm from an upper surface to a lower surface of the cover insulating layer.
However, it is noted that the specification fails to provide teachings about the criticality of the cover insulating layer having a maximum thickness less than 37.5 µm from an upper surface to a lower surface of the cover insulating layer, as claimed in the instant application.
Regarding claim 29, the courts have held that differences in the thicknesses will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such thicknesses are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation.” See In re Aller, 220 F.2d 454, 456, 105, USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality of the thicknesses and similar thicknesses are known in the art (see e.g. Park), it would have been obvious to one of the ordinary skill in the art to use these values in the device.
Criticality: The specification contains no disclosure of either the critical nature of the claimed thicknesses or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed Cir. 1990).
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Song (US 2022/0068818).
With respect to Claim 29, Song discloses (Fig 9) most aspects of the current invention including a semiconductor package, comprising:
a redistribution structure (RD1) comprising at least one redistribution layer (RT1-RT4) and at least one redistribution insulating layer (IL1-IL4) alternately stacked;
a semiconductor chip (CH1) on an upper surface of the redistribution structure and electrically connected to the at least one redistribution layer;
a cover insulating layer (MD1) on the upper surface of the redistribution structure and contacting and covering a side surface of the semiconductor chip, wherein the cover insulating layer is configured as a single build-up film layer
Further, although Song discloses wherein the cover insulating layer has a thickness in a range of 30-40 µm from an upper surface of the cover insulating layer to the upper surface of the semiconductor chip (par 31, Fig 3A) and the cover insulating layer is used to protect the semiconductor chip (par 43); Song does not disclose the cover insulating layer having a maximum thickness less than 37.5 µm from an upper surface to a lower surface of the cover insulating layer.
However, it is noted that the specification fails to provide teachings about the criticality of the cover insulating layer having a maximum thickness less than 37.5 µm from an upper surface to a lower surface of the cover insulating layer, as claimed in the instant application.
Regarding claim 29, the courts have held that differences in the thicknesses will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such thicknesses are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation.” See In re Aller, 220 F.2d 454, 456, 105, USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality of the thicknesses and similar thicknesses are known in the art (see e.g. Song), it would have been obvious to one of the ordinary skill in the art to use these values in the device.
Criticality: The specification contains no disclosure of either the critical nature of the claimed thicknesses or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed Cir. 1990).
Allowable Subject Matter
Claim 30 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 11, the prior art of record fails to disclose or suggest a semiconductor package, comprising an insulating bend partially contacting a portion of an outer surface of the cover insulating layer and partially contacting a portion of an upper surface of the cover insulating layer.
Examiner’s comments: the closest prior art references (Ko US 2020/0312801) directed in part to a semiconductor package similar to the present invention.
For example, Ko teaches (Fig 14) a semiconductor package, comprising a cover insulating layer (130) on the upper surface of a redistribution structure (140) and contacting and covering a side surface of a semiconductor chip (120), and an insulating material (170) partially contacting a portion of an upper surface (top surface) of the cover insulating layer and at an edge of the cover insulating layer. Ko teaches the insulating material (170) may serve to prevent separation between the metal layers and to protect the end portions of the metal layers, and may also serve to attach the carrier substrate to the encapsulant, similar to the instant invention.
However, Ko neither anticipates nor renders obvious the following features of the insulating material being an insulating bend partially contacting a portion of an outer surface of the cover insulating layer.
Regarding Claim 17, the prior art of record fails to disclose or suggest a semiconductor package, comprising an insulating bend partially contacting a portion of an outer surface of the cover insulating layer and partially contacting a portion of an upper surface of the cover insulating layer.
Examiner’s comments: the closest prior art references (Ko US 2020/0312801) directed in part to a semiconductor package similar to the present invention.
For example, Ko teaches (Fig 14) a semiconductor package, comprising a cover insulating layer (130) on the upper surface of a redistribution structure (140) and contacting and covering a side surface of a semiconductor chip (120), and an insulating material (170) partially contacting a portion of an upper surface (top surface) of the cover insulating layer and at an edge of the cover insulating layer. Ko teaches the insulating material (170) may serve to prevent separation between the metal layers and to protect the end portions of the metal layers, and may also serve to attach the carrier substrate to the encapsulant, similar to the instant invention.
However, Ko neither anticipates nor renders obvious the following features of the insulating material being an insulating bend partially contacting a portion of an outer surface of the cover insulating layer.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to QUINTON A BRASFIELD whose telephone number is (571)272-0804. The examiner can normally be reached M-F 9AM-4PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Q.A.B/ Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814