Prosecution Insights
Last updated: April 19, 2026
Application No. 18/324,192

MANUFACTURING METHOD OF DISPLAY DEVICE AND CVD DEVICE

Non-Final OA §103
Filed
May 26, 2023
Examiner
HENRY, CALEB E
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magnolia White Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
93%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
1052 granted / 1217 resolved
+18.4% vs TC avg
Moderate +6% lift
Without
With
+6.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
48 currently pending
Career history
1265
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
49.8%
+9.8% vs TC avg
§102
36.3%
-3.7% vs TC avg
§112
11.2%
-28.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1217 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Claims 1-8 in the reply filed on 9/23/2025 is acknowledged. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Song (20160005992), in view of Yamazaki (20030034497), in view of Summerfelt (20090061632). Regarding claim 1, Song teaches a manufacturing method of a display device, comprising: preparing a processing substrate (fig. 7A: 110) by forming a lower electrode (fig. 7A: 146) above a substrate, forming a rib (fig. 7A: 150; par. 53 teaches 150 can be double layered; the lower layer is considered the “a rib” in this instant case) comprising an aperture overlapping the lower electrode (please see fig. 7A which shows aperture between elements 150s and 150 overlapping 146), and forming a partition (fig. 7A: 150; par. 53 teaches 150 can be double layered; the upper layer is considered the “a partition” in this instant case) including a lower portion located on the rib and an upper portion located on the lower portion and protruding from a side surface of the lower portion (the upper layer will have an upper and lower portion that satisfies this limitation); forming an organic layer (fig. 7A: 153) on the lower electrode in the aperture; forming an upper electrode (fig. 7B: 156) which is located on the organic layer and is in contact with the partition; forming a cap layer (363: capping layer) on the upper electrode (par. 166 teaches this step); and forming a sealing layer (par. 167: sealing layer) which is located on the cap layer and is in contact with the partition (par. 167 teaches this step). Song is silent concerning the following teachings: wherein the forming the sealing layer includes: after the processing substrate in which the cap layer is formed is carried into a chamber, a deposition process of introducing a material gas into the chamber, depositing silicon nitride on the processing substrate, stopping introduction of the material gas and evacuating a residual gas of inside of the chamber; and following the deposition process, an etching process of introducing a cleaning gas into the chamber through a same route as the material gas, performing anisotropic dry etching for removing part of the silicon nitride deposited on the processing substrate, and evacuating a residual gas of the inside of the chamber, and a combination of the deposition process and the etching process is performed at least twice Yamazaki teaches forming an OLED having a sealing layer, similar to that seen in Song, wherein the forming the sealing layer includes (par. 317 teaches a method of forming a sealing layer): after the processing substrate in which the cap layer is formed is carried into a chamber (see fig. 19 which shows substrate placed in chambers 804 and 809 to have sealing layer placed atop the structure), a deposition process of introducing a material gas into the chamber (par. 321 teaches releasing material into chamber 804, as well as other gasses, to form SiN), depositing silicon nitride on the processing substrate (par. 321 and 322 teaches forming SiN), stopping introduction of the material gas and evacuating a residual gas of inside of the chamber; and following the deposition process (par. 322 teaches stop/evacuating, via a vacuum, previous gases in the chamber) Forming layers in primary prior art, in the manner taught by Yamazaki, would have been known to a PHOSITA, at the time of filing, since this process enables the inventor to carefully modulate variables used to make a sealing layer, thus allowing for improvements in the sealing layer (e.g. mechanical strength). Since aforementioned prior arts are in the same field of endeavor, a PHOSITA at the time of invention would have recognized that aforementioned limitations could be applied the same way and would have yielded predictable results. Summerfelt teaches for a dielectric, such as SiN (par. 22), wherein: an etching process of introducing a cleaning gas into the chamber through a same route as the material gas (par. 21 teaches using an etch based cleaning process, in the chamber, using a cleaning gas), performing anisotropic dry etching for removing part of the silicon nitride deposited on the processing substrate (par. 21 teaches using an dry etching process in the chamber to remove residue from the substrate to prepare for the next deposition [par. 22]; please note that dry etching is predominantly anisotropic, meaning it etches in one direction (usually vertically), which allows for precise control and the creation of high-aspect-ratio structures with straight sidewalls), and evacuating a residual gas of the inside of the chamber (par. 14-16 teaches process being used in multiple steps of the ongoing method, allowing for cleaning for or after deposition steps), and a combination of the deposition process and the etching process is performed at least twice (par. 14-16 teaches process being used in multiple steps of the ongoing method, allowing for cleaning for or after deposition steps) Using a cleaning method in the primary prior art, as recited in Summerfelt, allows for the minimization of contaminants in subsequent steps, enabling the creation of layers having minimal impurities. Since aforementioned prior arts are in the same field of endeavor, a PHOSITA at the time of invention would have recognized that aforementioned limitations could be applied the same way and would have yielded predictable results. Thus, it would have been obvious to a PHOSITA, at the time of filing, to utilize aforementioned teachings of the prior art(s) in the primary prior art(s) due to aforementioned reason(s). Allowable Subject Matter Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: manufacturing method of claim 1, wherein in the single deposition process, silicon nitride having a thickness greater than or equal to 0.5 μm is formed, and in the single etching process, silicon nitride having a thickness greater than or equal to 0.2 μm is removed. Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: manufacturing method of claim 1, wherein after the processing substrate is carried out of the chamber, the cleaning gas is introduced into the chamber through a same route as the material gas, and the inside of the chamber is cleaned by isotropic dry etching. Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: manufacturing method of claim 1, wherein the etching process is performed at a temperature lower than the deposition process. Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: manufacturing method of claim 1, further comprising: forming a patterned resist on the sealing layer; and performing dry etching for the sealing layer using the resist as a mask. Claim 6 is objected to based on its dependency on claim 5. Claim 7 is objected to based on its dependency on claim 6. Claim 8 is objected to based on its dependency on claim 7. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEB E HENRY/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

May 26, 2023
Application Filed
Nov 04, 2025
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604596
METHOD FOR MANUFACTURING A PEROVSKITE SOLAR CELL WITH AN IMPROVED HOLE TRANSPORT LAYER AND A PEROVSKITE SOLAR CELL WITH AN IMPROVED HOLE TRANSPORT LAYER MANUFACTURED BY THE SAME METHOD
2y 5m to grant Granted Apr 14, 2026
Patent 12604650
METHOD FOR MANUFACTURING THE LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING DEVICE USING PHOTOLITHOGRAPHY TECHNIQUE
2y 5m to grant Granted Apr 14, 2026
Patent 12598801
SEMICONDUCTOR DEVICE OF PHYSICAL UNCLONABLE FUNCTION AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12588440
SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS FOR ETCHING USING OXDIZATION
2y 5m to grant Granted Mar 24, 2026
Patent 12584068
COMPOUND FOR ORGANIC ELECTRIC ELEMENT, ORGANIC ELECTRIC ELEMENT USING THE SAME, AND AN ELECTRONIC DEVICE THEREOF
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
93%
With Interview (+6.2%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1217 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month