Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18325034 filed on 05/29/203.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election without traverse of claims 1-2, 4-10 in the reply filed on 5/29/2023 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 10 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The specification related to the elected species does not appear to disclose Claim 10 limitation “wherein the first second-conductivity-type region and the second second-conductivity-type region are physically connected to each other”.
Allowable subject matter
Claims 2, 4-9 are objected to as being dependent upon a rejected base claim (independent claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kojima et al. (US 2021/0226031).
With respect to dependent claim 2, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the silicide film is provided at a bottom and sidewalls of the second trench”.
With respect to dependent claim 4 (specification discloses criticality), the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein a width of the silicide film in a second direction orthogonal to the first direction is less than a width of the first second-conductivity-type region, and a width of each of the plurality of non-operating regions in the second direction is in a range of 0.1 m to 1.0m”.
With respect to dependent claim 5 (specification discloses criticality), the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein an amount of a surface area of the plurality of non-operating regions is in a range of 5% to 35% of an amount of a surface area of the silicon carbide semiconductor device”.
With respect to dependent claim 6 (specification discloses criticality), the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein an amount of a surface area of the plurality of non-operating regions is in a range of 35% to 90% of an amount of a surface area of the first second-conductivity-type region”.
With respect to dependent claim 7 (specification discloses criticality), the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein an amount of a surface area of the plurality of non-operating regions is in a range of 15% to 40% of an amount of a surface area of the active region”.
With respect to dependent claims 8-9, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a third trench provided in the first-conductivity-type region from the first surface of the first-conductivity-type region, wherein the second second-conductivity-type region is selectively provided in contact with the first-conductivity-type region in the third trench, and has a side facing the active region in contact with the first electrode”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Kojima et al. (US 2021/0226031) in view of Hori et al. (US 2017/0077236).
Regarding Independent claim 1, Kojima et al. teach a silicon carbide (paragraph 0024) semiconductor device, comprising:
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a semiconductor substrate (Figs. 1 & 3, element 30, paragraph 0078) containing silicon carbide and having an active region (Fig. 1, element 10) and an edge termination region (Fig. 1, element 20) that surrounds a periphery of the active region, the semiconductor substrate having a first main surface and a second main surface that are opposite to each other (Fig. 1);
a first-conductivity-type region (Fig. 3, element 12, paragraph 0065) provided in the semiconductor substrate and exposed at the first main surface of the semiconductor substrate, the first-conductivity-type region having a first surface and a second surface that are opposite to each other, the first surface being exposed at the first main surface of the semiconductor substrate (Fig. 1);
a first second-conductivity-type region (Fig. 3, element 13, paragraph 0077) provided in the active region, the first second-conductivity-type region being in contact with the first- conductivity-type region;
a first electrode (Fig. 3, element 14, paragraph 0078) in contact with the first second-conductivity-type region and the first-conductivity-type region, the first electrode including a silicide film (Fig. 3, element 33a, paragraph 0097) in ohmic contact with the first second-conductivity-type region;
a second electrode (Fig. 3, element 19, paragraph 0110) provided at the second main surface of the semiconductor substrate; and
a second second-conductivity-type region (Fig. 3, element 21, paragraph 0082) surrounding the active region and provided in the edge termination region, wherein the active region is configured by an ohmic region (see annotated figure) in which the silicide film is in contact with the first second- conductivity-type region (Fig. 3),
a plurality of non-operating regions (see annotated figure) in which the first electrode is in contact with the first second-conductivity-type region, and
a Schottky region (see annotated figure) in which the first electrode is in contact with the first- conductivity-type region, the ohmic region, the plurality of non-operating regions, and the Schottky region form a striped pattern, stripes of which extend in a first direction (paragraph 0011 discloses the capability of forming stripe), and
a bottom of the silicide film that is a portion of the silicide film closer to the second main surface of the semiconductor substrate than are the rest of portions of the silicide film in the ohmic region is positioned closer to the second main surface of the semiconductor substrate than is an interface between the first electrode and the first second-conductivity- type region in each of the plurality of non-operating regions (Fig. 3).
Kojima et al. do not explicitly disclose a first trench in the active region, provided in the first-conductivity-type region from the first surface of the first-conductivity-type region; a first second-conductivity-type region provided at a bottom of the first trench.
Hori et al. teach a SiC device comprising a first trench (Fig. 1, paragraph 0045 discloses p type region 25 formed in a trench) in the active region (Fig. 1, element region), provided in the first-conductivity-type region (Fig. 1, element 20, paragraph 0022) from the first surface of the first-conductivity-type region; a first second-conductivity-type region (Fig. 1, element 25, paragraph 0022) provided at a bottom of the first trench.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Kojima et al. according to the teachings of Hori et al. with the motivation to make a large surge current flow through the PIN diode section by modulating the conductivity of the PIN diode section (paragraph 0003).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813