Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-13 and 20-24 are rejected under 35 U.S.C. 103 as being unpatentable over JP 2008-205083A (cited in IDS - with English translation attached) in view of Thompson et al (US 2021/0398882 A1).
Regarding claim 1, JP ‘083 (Fig. 6) discloses a semiconductor package, comprising: a semiconductor die 13 (page 3 of English translation, last paragraph) having a first surface, a second surface opposing the first surface, a first contact pad 13D (i.e., electrode, page 3 of English translation, last paragraph) on the first surface and a second contact pad 13S (i.e., electrode, page 3 of English translation, last paragraph) on the second surface; a die pad 12 (lead frame functioning as die pad, page 3, last paragraph) and at least one lead 11 (page 3, last paragraph) spaced apart from the die pad 12, wherein the first contact pad 13D of the semiconductor die 13 is mounted on the die pad 12 and the second contact pad 13S is electrically connected to the at least one lead 11 by a connector 21 (page 4 of English translation, second paragraph); a mold compound 25 (page 4 of English translation, third paragraph) covering the semiconductor die 13, the connector 21, and an upper surface of the die pad 12 and of the at least one lead 11; and a metallic member 22 (page 4 of English translation, second paragraph) inductively coupled to the connector 21 (page 4 of English translation, fourth paragraph) and electrically resistively insulated from the connector 21 (i.e., insulated by insulating layer 23, page 4 of English translation, fourth paragraph), wherein the metallic member 22 comprises a web portion arranged above the second surface of the semiconductor die 13.
JP ‘083 (Fig. 6) does not explicitly disclose the metallic member comprising at least one peripheral rim portion that extends from the web portion in a direction towards the first surface of the semiconductor die; a distal end of the first peripheral rim portion is below an upper surface of the at least one lead.
Thompson discloses the metallic member 126, 124, 125 (Fig 7, Para. 19) comprising at least one peripheral rim portion 124 that extends from the web portion 125 in a direction towards the first surface of the semiconductor die 110 (Para. 21); a distal end of the first peripheral rim 124 portion is below an upper surface of the at least one lead 126.
Thompson teaches the above modification is used to improve heat dissipation of the device (Para. 2). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute JP ‘083 (Fig. 6) metallic member with Thompson’s metallic member as suggested above to improve heat dissipation of the device (Para. 2).
Regarding claims 2, 8-9 and 10, JP ‘083 (Fig. 6) further discloses the metallic member 22 is electrically floating (page 4 of translation, third paragraph); the metallic member 22 partially covers the second surface of the semiconductor die or entirely covers the second surface of the semiconductor die 13; the metallic member 22 partially covers the connector or entirely covers the connector 21; and the connector 21 is a contact clip that has a clip web portion (i.e., flat portion) mounted on the second contact pad 13S and a clip peripheral portion (i.e., vertical portion) mounted on the at least one lead 11.
Regarding claim 3, Fig. 6 of JP ‘083 discloses the metallic member 22 is electrically resistively insulated from the connector 21 by a portion of the insulating layer 23, but Fig. 6 of JP ‘083 does not disclose the metallic member is electrically resistively insulated from the connector by a portion of the mold compound.
However, JP ‘083 further teaches another embodiment (Fig. 7) comprising the metallic member 22 being electrically resistively insulated from the connector 11 by a portion of the mold compound 30 (page 5, last paragraph). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the metallic member being electrically resistively insulated from the connector by a portion of the insulating layer or by the molding compound because it would be a matter of obvious design choice and the same purposes of reducing the effective inductance of the conductor would result (see page 6 of English translation, first paragraph).
Regarding claim 4, Thompson discloses the semiconductor package of claim 1, wherein the web portion 125 of the metallic member 122 is substantially planar and the distal end 124 of the first peripheral rim portion is laterally spaced apart from the at least one lead 126.
Regarding claim 5, Thompson discloses the semiconductor package of claim 1, wherein the metallic member further comprises a second peripheral rim portion 124 (right) extending from an opposing lateral side of the web portion 125 as the first peripheral rim portion 124 (left).
Regarding claim 6, Thompson discloses the semiconductor package of claim 1, wherein the metallic member 122 further comprises two additional peripheral rim portions 130 extending from adjoining lateral sides of the web portion 125.
Regarding claim 7, Thompson discloses the semiconductor package of claim 1, wherein the metallic member 122 further comprises three additional peripheral rim portions 130, 124 extending from adjoining lateral sides of the web portion 125.
Regarding claim 20, Thompson discloses the semiconductor package of claim 1, wherein the distal end of the first peripheral rim portion 124 is substantially coplanar with a lower surface of the at least one lead 126.
Regarding claim 11, JP ‘083 (Fig. 6) discloses the clip peripheral rim portion of the contact clip 21 is spaced from the peripheral sides of the molding compound 25 by a portion of the mold compound 25, and Chuang (Fig. 2) teaches that the peripheral rim portion (i.e., vertical portion) of the metallic member 30 is at the peripheral sides of the molding compound 32. Therefore, as modified by Chuang of forming the peripheral rim portion of the metallic member at the peripheral sides of the molding compound, the clip peripheral rim portion of the contact clip 21 of JP ‘083 would be spaced apart from the peripheral rim portion of the metallic member.
Fig. 6 of JP ‘083 discloses the web portion of the metallic member 22 is spaced apart from the clip web portion of the contact clip 21 by a portion of an insulating layer 23, but Fig. 6 of JP ‘083 does not disclose the web portion of the metallic member is spaced apart from the clip web portion of the contact clip by a portion of the mold compound.
However, JP ‘083 further teaches another embodiment (Fig. 7) comprising the web portion of the metallic member 22 is spaced apart from the clip web portion of the contact clip 11 by a portion of the mold compound. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the web portion of the metallic member being spaced apart from the clip web portion of the contact clip by a portion of the insulating layer or the mold compound because it would be a matter of obvious design choice and the same purposes of reducing the effective inductance of the conductor would result (see page 6 of English translation, first paragraph).
Regarding claim 12, JP ‘083 (Fig. 6) further discloses a thickness of the mold compound between a lower surface of the metallic member 22 and an upper surface of the connector 21 is D and 10 um ≤ D ≤ 200 um (i.e., equal to thickness of layer 23, page 4 of English translation, third paragraph and page 5, sixth paragraph).
Regarding claim 13, JP ‘083 does not disclose the metallic member has a thickness and at a predetermined target frequency of operation of the semiconductor die has a skin depth, wherein the thickness is within a skin depth range as claimed.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the thickness of the metallic member within the skin depth range as claimed because such thickness could be optimized during routine experimentation, depending upon the desired materials of the metallic member and the frequency of operation of the semiconductor die.
Regarding claim 21, JP ‘083 (Fig. 6) discloses an assembly, comprising:
a semiconductor package, comprising: a semiconductor die 13 (page 3 of English translation, last paragraph) having a first surface, a second surface opposing the first surface, a first contact pad 13D (i.e., electrode, page 3 of English translation, last paragraph) on the first surface and a second contact pad 13S (i.e., electrode, page 3 of English translation, last paragraph) on the second surface; a die pad 12 (lead frame functioning as die pad, page 3, last paragraph) and at least one lead 11 (page 3, last paragraph) spaced apart from the die pad 12, wherein the first contact pad 13D of the semiconductor die 13 is mounted on the die pad 12 and the second contact pad 13S is electrically connected to the at least one lead 11 by a connector 21 (page 4 of English translation, second paragraph); a mold compound 25 (page 4 of English translation, third paragraph) covering the semiconductor die 13, the connector 21, and an upper surface of the die pad 12 and of the at least one lead 11; and a metallic member 22 (page 4 of English translation, second paragraph) inductively coupled to the connector 21 (page 4 of English translation, fourth paragraph) and electrically resistively insulated from the connector 21 (i.e., insulated by insulating layer 23, page 4 of English translation, fourth paragraph), wherein the metallic member 22 comprises a web portion arranged above the second surface of the semiconductor die 13.
JP ‘083 (Fig. 6) does not explicitly disclose a circuit board; and a semiconductor package mounted onto an upper surface of the circuit board, the metallic member comprising at least one peripheral rim portion that extends from the web portion in a direction towards the first surface of the semiconductor die; wherein a distal end of the first peripheral rim portion is below an upper surface of the at least one lead.
However, Thompson discloses a circuit board (Para. 3); and a semiconductor package (Fig. 7) mounted onto an upper surface of the circuit board (Para. 3), the metallic member 122 comprising at least one peripheral rim portion 124 that extends from the web portion 125 in a direction towards the first surface of the semiconductor die 110 (Para. 21); wherein a distal end of the first peripheral rim portion 124 is below an upper surface of the at least one lead 126 (Para. 19).
It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute JP ‘083 (Fig. 6) metallic member with Thompson’s metallic member as suggested above to improve heat dissipation of the device (Para. 2).
Regarding claim 22, Thompson further discloses the assembly of claim 21, wherein the distal end of the peripheral rim portion of the metallic member 124 is spaced apart from and above the upper surface of the circuit board (Para. 3).
Regarding claim 23, Thompson further discloses the assembly of claim 21, wherein the distal end of the peripheral rim portion of the metallic member 124 contacts the upper surface of the circuit board (Para. 3, claim does not specify directly contact).
Regarding claim 24, Thompson further discloses the assembly of claim 23, wherein the distal end of the peripheral rim portion 124 of the metallic member 122 is electrically connected to a conductive trace arranged on the upper surface of the circuit board (Para. 3).
Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over JP ‘083 and Thompson et al as applied to claim 1 above, and further in view of Cheah et al (US 2008/0048342).
Regarding claim 14, JP ‘083 discloses the semiconductor die 13 comprises a transistor device (page 3 of translation, last paragraph).
JP ‘083 does not disclose the first contact pad is a source pad and the second contact pad is a drain pad, wherein the source pad is mounted on and electrically connected to the die pad, and wherein the drain pad is electrically connected to the at least one lead by the connector.
However, Cheah (Fig. 14) teaches a semiconductor die comprises a transistor device Q2, the first contact pad 46 is a source pad ([0007]) and the second contact pad 44 is a drain pad ([0007]), wherein the source pad 46 is mounted on and electrically connected to the die pad 50 ([0007]), and wherein the drain pad 44 is electrically connected to the at least one lead by the connector 56 ([0010]). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the device of JP ‘083 by forming the semiconductor die comprising a transistor device having the structures as set forth above because it is a design choice for forming a typical multi-chip module (MCM) that includes a plurality of diverse elements enclosed within a molded housing, as taught by Cheah ([0002]).
Regarding claim 15, Cheah (Fig. 14) further teaches the first surface of the semiconductor die further comprises a gate pad 48 ([0007]) that is mounted on a gate lead 52 ([0007]) that is spaced apart from the die pad 50.
.
Allowable Subject Matter
Claims 16-17 and 19 are allowed.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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BILKIS . JAHAN
Primary Examiner
Art Unit 2817
/BILKIS JAHAN/ Primary Examiner, Art Unit 2817
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